AT24HC04B - Complete

AT24HC04B
I2C-Compatible (2-Wire) Serial EEPROM
4K (512 x 8)
DATASHEET
Features

Write Protect Pin for Hardware Data Protection
̶
Utilizes Different Array Protection Compared to the AT24C04B

Low-voltage and Standard-voltage Operation

Internally Organized 512 x 8 (4K)
2-Wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1MHz (5V) and 400kHz (1.8V, 2.5V, 2.7V) Clock Rate
16-byte Page
Partial Page Writes Allowed
Self-timed Write Cycle (5ms Max)
High Reliability
̶








̶
1.8V (VCC = 1.8V to 5.5V)
̶


Endurance: 1,000,000 Write Cycles
Data Retention: 100 Years
8-lead PDIP, 8-lead JEDEC SOIC, and 8-lead TSSOP Packages
Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
Description
The Atmel® AT24HC04B provides 4,096 bits of Serial Electrically Erasable and
Programmable Read-Only Memory (EEPROM) organized as 512 words of 8 bits
each. The device is optimized for use in many industrial and commercial
applications where low-power and low-voltage operation are essential. The
AT24HC04B is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, and
8-lead TSSOP packages and is accessed via a 2-wire serial interface. In addition,
the entire family is available in 1.8V (1.8V to 5.5V) version.
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
1.
Pin Configurations and Pinouts
Table 1-1.
Pin Configuration
Pin Name
Function
NC
No Connect
NC
1
8
VCC
NC
1
8
VCC
A1 and A2
Address Inputs
A1
2
7
WP
A1
2
7
WP
A2
3
6
SCL
A2
3
6
SCL
GND
4
5
SDA
GND
4
5
SDA
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
VCC
Device Power Supply
8-lead PDIP
8-lead SOIC
Top View
Top View
8-lead TSSOP
NC
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
Top View
Note:
2.
Absolute Maximum Ratings*
Operating Temperature . . . . . . . . . . .-40C to +125C
Storage Temperature . . . . . . . . . . . . .-65C to +150C
Voltage on Any Pin
with Respect to Ground . . . . . . . . . . . . -1.0V to +7.0V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . 5.0 mA
2
Drawings are not to scale.
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
*Notice: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions beyond those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect device reliability.
3.
Block Diagram
Figure 3-1.
Block Diagram
VCC
GND
WP
START
STOP
LOGIC
SERIAL
CONTROL
LOGIC
LOAD
DEVICE
ADDRESS
COMPARATOR
A2
A1
A0
R/W
EN
H.V. PUMP/TIMING
COMP
LOAD
DATA RECOVERY
INC
DATA WORD
ADDR/COUNTER
X DEC
SCL
SDA
Y DEC
EEPROM
SERIAL MUX
DOUT/ACK
LOGIC
DIN
DOUT
4.
Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative
edge clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open collector devices.
Device/Page Addresses (A2, A1, and A0): The A2 and A1 pins are device address inputs that must be
hardwired for the AT24HC04B. As many as four 4K devices may be addressed on a single bus system. The
A0 pin is a no connect. (Device addressing and Page addressing are discussed in detail in Section 7., “Device
Addressing and Page Addressing”).
Write Protect (WP): The AT24HC04B has a WP pin which provides hardware data protection. The WP pin
allows normal read/write operations when connected to ground (GND). When the WP pin is connected to VCC,
the write protection feature is enabled and operates as shown.
Table 4-1.
Write Protect
WP Pin Status
Part of the Array Protected
At VCC
Upper Half (2K) Array
At GND
Normal Read/Write Operations
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
3
5.
Memory Organization
AT24HC04B, 4K Serial EEPROM: The 4K is internally organized with 32 pages of 16 bytes each. Random
word addressing requires an 9-bit data word address.
5.1
Pin Capacitance (1)
Applicable over recommended operating range from TAI = 25C, f = 1.0MHz, VCC = +1.8V.
Symbol
Test Condition
CI/O
CIN
Note:
5.2
1.
Max
Units
Conditions
Input/Output Capacitance (SDA)
8
pF
VI/O = 0V
Input Capacitance (A0, A1, A2, and SCL)
6
pF
VIN = 0V
This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TAI = -40C to +85C, VCC = +1.8V to +5.5V (unless otherwise noted).
Symbol
Parameter
VCC1
Supply Voltage
VCC2
Max
Units
1.80
5.50
V
Supply Voltage
2.50
5.50
V
VCC3
Supply Voltage
2.70
5.50
V
VCC4
Supply Voltage
4.50
5.50
V
ICC
Supply Current VCC = 5.0V
Read at 100kHz
0.40
1
mA
ICC
Supply Current VCC = 5.0V
Write at 100kHz
2
3
mA
ISB1
Standby Current VCC = 1.8V
VIN = VCC or VSS
0.60
3
μA
ISB2
Standby Current VCC = 2.5V
VIN = VCC or VSS
1.40
4
μA
ISB3
Standby Current VCC = 2.7V
VIN = VCC or VSS
1.60
4
μA
ISB4
Standby Current VCC = 5.0V
VIN = VCC or VSS
8
18
μA
ILI
Input Leakage Current
VIN = VCC or VSS
0.10
3
μA
ILO
Output Leakage Current
VOUT = VCC or VSS
0.05
3
μA
VIL
Input Low Level (1)
0.60
VCC x 0.30
V
VIH
Input High Level (1)
VCC x 0.70
VCC + 0.50
V
VOL2
Output Low Level VCC = 3.0V
IOL = 2.10mA
0.40
V
VOL1
Output Low Level VCC = 1.8V
IOL = 0.15mA
0.20
V
Note:
4
1.
Test Condition
VIL min and VIH max are reference only and are not tested.
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
Min
Typ
Table 5-1.
AC Characteristics
Applicable over recommended operating range from TAI = –40C to +85C, VCC = +5.5V, CL = 1 TTL Gate and 100pF (unless
otherwise noted). Test conditions are listed in Note 2.
1.8V, 2.5V, 2.7V
Symbol
Parameter
Min
Max
5V
Min
Units
1000
kHz
fSCL
Clock Frequency, SCL
tLOW
Clock Pulse Width Low
1.20
0.40
μs
tHIGH
Clock Pulse Width High
0.60
0.40
μs
tI
Noise Suppression Time
tAA
Clock Low to Data Out Valid
0.10
tBUF
Time the bus must be free before a new
transmission can start.
1.20
0.50
μs
tHD.STA
Start Hold Time
0.60
0.25
μs
tSU.STA
Start Setup Time
0.60
0.25
μs
tHD.DAT
Data In Hold Time
0
0
μs
tSU.DAT
Data In Setup Time
100
100
ns
tR
Inputs Rise Time (1)
0.30
0.30
μs
tF
Inputs Fall Time (1)
300
100
ns
tSU.STO
Stop Setup Time
tDH
Data Out Hold Time
tWR
Write Cycle Time
Endurance(1)
5.0V, 25C, Byte Mode
Notes:
1.
2.
400
Max
50
0.90
0.05
40
ns
0.55
μs
0.60
.25
μs
50
50
ns
5
5
1,000,000
ms
Write Cycles
This parameter is ensured by characterization only.
AC measurement conditions:

RL (connects to VCC): 1.3k (2.5V, 5.5V), 10k (1.7V)

Input pulse voltages: 0.3VCC to 0.7VCC

Input rise and fall times:  50ns

Input and output timing reference voltages: 0.5 x VCC
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
5
6.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin
may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or
Stop condition as defined below.
Figure 6-1.
Data Validity
SDA
SCL
Data Stable
Data Stable
Data
Change
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition that must precede any other
command.
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the
Stop condition will place the EEPROM in a standby power mode.
Figure 6-2.
Start and Stop Definition
SDA
SCL
Start
6
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
Stop
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words..
The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock
cycle.
Figure 6-3.
Output Acknowledge
1
SCL
8
9
DATA IN
DATA OUT
Start
Acknowledge
Standby Mode: The AT24HC04B features a low-power standby mode that is enabled:


Upon power-up.
After the receipt of the Stop condition, and the completion of any internal operations.
2-Wire Software Reset: After an interruption in protocol, power loss or system reset, any 2-wire part can be
protocol reset by following these steps:
1.
2.
3.
Create a start condition (if possible).
Clock nine cycles.
Create another Start condition followed by Stop condition as shown below.
The device should be ready for the next communication after above steps have been completed. In the event
that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to reset
the device.
Figure 6-4.
Software Reset
Dummy Clock Cycles
SCL
1
Start
Condition
2
3
8
9
Start
Condition
Stop
Condition
SDA
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
7
Figure 6-5.
Bus Timing
tHIGH
tF
tR
tLOW
SCL
tSU.STA
tLOW
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
SDA IN
tAA
tDH
tBUF
SDA OUT
Figure 6-6.
Write Cycle Timing
SCL
SDA
8th bit
ACK
WORDn
twr
Stop
Condition
Note:
8
1.
(1)
Start
Condition
The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal
clear/write cycle.
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
7.
Device Addressing and Page Addressing
The 4K EEPROM device requires an 8-bit device address word following a Start condition to enable the chip for
a read or write operation, as shown in the below figure.
Figure 7-1.
4K
1
MSB
Device Address
0
1
0
A2
A1
P0
R/W
LSB
The device address word consists of a mandatory “1”, “0” sequence for the first four most significant bits as
shown. This is common to all the EEPROM devices.
The next two bits are the A2 and A1 device address bits for the 4K EEPROM. These two bits must compare to
their corresponding hardwired input pins. The A0 pin is a no connect.
The next bit is the memory page address bit. This bit is the MSB of the 9-bit data word address.
The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is
high, and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the chip will
return to a standby state.
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
9
8.
Write Operations
Byte Write: A Write operation requires an 8-bit data word address following the device address word and
acknowledgement. Upon receipt of this address, the EEPROM will again respond with a zero, and then clock in
the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the
addressing device, such as a microcontroller, must terminate the write sequence with a Stop condition. At this
time, the EEPROM enters an internally-timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled
during this write cycle, and the EEPROM will not respond until the write is complete.
Figure 8-1.
Byte Write
S
T
A
R
T
Device
Address
W
R
I
T
E
Word Address
S
T
O
P
Data
SDA LINE
M
S
B
L R A M
S / C S
BW K B
L A
S C
B K
A
C
K
Page Write: The 4K EEPROM is capable of a 16-byte Page Write.
A Page Write is initiated the same as a Byte Write, but the microcontroller does not send a Stop condition after
the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the
microcontroller can transmit up to fifteen more data words. The EEPROM will respond with a zero after each
data word received. The microcontroller must terminate the Page Write sequence with a Stop condition.
The data word address lower four bits are internally incremented following the receipt of each data word. The
higher data word address bits are not incremented, retaining the memory page row location. When the word
address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the
same page. If more than sixteen data words are transmitted to the EEPROM, the data word address will
roll-over and previous data will be overwritten.
Figure 8-2.
Page Write
S
T
A
R
T
Device
Address
W
R
I
T
E
Word Address (n)
Data (n)
Data (n + 1)
S
T
O
P
Data (n + x)
SDA LINE
M
S
B
L R A
S / C
BW K
A
C
K
A
C
K
A
C
K
A
C
K
Acknowledge Polling: Once the internally-timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address
word. The Read/Write bit is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero allowing the read or write sequence to continue.
10
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
9.
Read Operations
Read operations are initiated the same way as Write operations with the exception that the Read/Write select bit
in the device address word is set to one. There are three Read operations:



Current Address Read
Random Address Read
Sequential Read
Current Address Read: The internal data word address counter maintains the last address accessed during
the last Read or Write operation, incremented by one. This address stays valid between operations as long as
the chip power is maintained. The address roll-over during read is from the last byte of the last memory page to
the first byte of the first page. The address roll-over during write is from the last byte of the current page to the
first byte of the same page.
Once the device address with the Read/Write select bit set to one is clocked in and acknowledged by the
EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an
input zero but does generate a following Stop condition.
Figure 9-1.
Current Address Read
S
T
A
R
T
Device
Address
R
E
A
D
S
T
O
P
SDA LINE
L R A
S / C
BW K
M
S
B
Data
N
O
A
C
K
Random Read: A Random Read requires a dummy byte write sequence to load in the data word address. Once
the device address word and data word address are clocked in and acknowledged by the EEPROM, the
microcontroller must generate another Start condition. The microcontroller now initiates a Current Address
Read by sending a device address with the Read/Write select bit high. The EEPROM acknowledges the device
address and serially clocks out the data word. The microcontroller does not respond with a zero but does
generate a following Stop condition.
Figure 9-2.
Random Read
S
T
A
R
T
Device
Address
W
R
I
T
E
S
T
A
R
T
Word
Address n
R
E
A
D
Device
Address
S
T
O
P
SDA LINE
M
S
B
L R A M
S / C S
BW K B
L A
S C
B K
M
S
B
L
S
B
A
C
K
DATA n
N
O
A
C
K
Dummy Write
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
11
Sequential Read: Sequential Reads are initiated by either a current address read or a Random Address Read.
After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM
receives an Acknowledge, it will continue to increment the data word address and serially clock out sequential
data words. When the memory address limit is reached, the data word address will roll-over and the Sequential
Read will continue. The Sequential Read operation is terminated when the microcontroller does not respond
with a zero but does generate a following Stop condition.
Figure 9-3.
Sequential Read
Device
Address
R
E
A
D
Data (n)
Data (n + 1)
Data (n + 2)
S
T
O
P
Data (n + x)
SDA Line
R A
/ C
WK
12
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
A
C
K
A
C
K
A
C
K
N
O
A
C
K
10.
Ordering Code Detail
AT2 4 H C 0 4 B N - S H - B
Shipping Carrier Option
Atmel Designator
B or Blank = Bulk (Tubes)
T = Tape and Reel
Product Family
Package Device Grade or
Wafer/Die Thickness
24HC = I2C-compatible
Serial EEPROM with
Half Array Protection
H = Green, NiPdAu Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
U = Green, Matte Tin Lead Finish
Industrial Temperature Range
(-40°C to +85°C)
11 = 11mil Wafer Thickness
Device Density
04 = 4 kilobit
Device Revision
Package Option
Package Variation
S
T
P
W
(Package Type Dependent)
N = 0.150” width SOIC
11.
= JEDEC SOIC
= TSSOP
= PDIP
= Wafer Unsawn
Ordering Code Information
Delivery Information
Atmel Ordering Code
AT24HC04B-PU
Lead Finish
Matte Tin
(Lead-free/Halogen-free)
Package
Voltage
8P3
AT24HC04BN-SH-B
Form
Quantity
Bulk (Tubes)
50 per Tube
Bulk (Tubes)
100 per Tube
Tape and Reel
4,000 per Reel
Bulk (Tubes)
100 per Tube
Tape and Reel
5,000 per Reel
Operation
Range
8S1
AT24HC04BN-SH-T
AT24HC04B-TH-B
NiPdAu
1.8V
(Lead-free/Halogen-free)
Industrial
Temperature
(-40C to 85C)
8X
AT24HC04B-TH-T
AT24HC04B-W-11
Note:
N/A
Wafer Sale
Note 1
1. Available in tape and reel and wafer form; order as SL788 for inkless wafer form. Bumped die available upon request.
Please contact the Atmel sales office.
Package Type
8P3
8-pin, 0.30” wide, Plastic Dual Inline (PDIP)
8S1
8-lead, 0.15” wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8X
8-lead, 4.40mm body, Plastic Thin Shrink Small Outline (TSSOP)
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
13
12.
Part Marking Scheme
AT24HC04B Package Marking Information
8-lead TSSOP
8-lead SOIC
ATMLHYWW
### %
AAAAAAAA
8-lead PDIP
HYWW
###%
ATMLUYWW
### %
AAAAAAAA
Note: Lot Number and location of assembly
and on the bottom side of the package.
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT24HC04B
Truncation Code ###: H4B
Date Codes
Y = Year
4: 2014
5: 2015
6: 2016
7: 2017
Voltages
8: 2018
9: 2019
0: 2020
1: 2021
M = Month
A: January
B: February
...
L: December
WW = Work Week of Assembly
02: Week 2
04: Week 4
...
52: Week 52
Country of Assembly
Lot Number
@ = Country of Assembly
AAA...A = Atmel Wafer Lot Number
Trace Code
% = Minimum Voltage
1: 1.8V min
Grade/Lead Finish Material
U: Industrial/Matte Tin/SnAgCu
H: Industrial/NiPdAu
Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code)
Example: AA, AB.... YZ, ZZ
AT: Atmel
ATM: Atmel
ATML: Atmel
6/10/15
TITLE
DRAWING NO.
REV.
24HC04BSM
B
24HC04BSM, AT24HC04B Package Marking Information
Package Mark Contact:
[email protected]
14
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
13.
Packaging Information
13.1
8P3 — 8-lead PDIP
E
1
E1
.381
Gage Plane
N
Top View
c
eA
End View
COMMON DIMENSIONS
(Unit of Measure = mm)
D
e
D1
A2 A
A1
b2
b3
b v
4 PLCS
Side View
L
0.254 m C
SYMBOL
MIN
MAX
A
-
-
5.334
A1
0.381
-
-
NOTE
2
A2
2.921
3.302
4.953
b
0.356
0.457
0.559
5
b2
1.143
1.524
1.778
6
b3
0.762
0.991
1.143
6
c
0.203
0.254
0.356
D
9.017
9.271
10.160
3
D1
0.127
0.000
0.000
3
E
7.620
7.874
8.255
4
E1
6.096
6.350
7.112
3
3.810
2
e
2.540 BSC
eA
L
Notes:
NOM
7.620 BSC
2.921
3.302
4
1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information.
2. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3.
3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed 0.010 inch.
4. E and eA measured with the leads constrained to be perpendicular to datum.
5. Pointed or rounded lead tips are preferred to ease insertion.
6. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25 mm).
07/31/14
Package Drawing Contact:
[email protected]
TITLE
GPC
DRAWING NO.
8P3, 8-lead, 0.300” Wide Body, Plastic Dual
In-line Package (PDIP)
PTC
8P3
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
REV.
E
15
13.2
8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
A1
SYMBOL
A
MIN
–
–
1.75
A1
0.10
–
0.25
b
0.31
–
0.51
C
0.17
–
0.25
D
D
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
MAX
NOM
NOTE
4.90 BSC
E
6.00 BSC
E1
3.90 BSC
e
1.27 BSC
L
0.40
–
1.27
Ø
0°
–
8°
3/6/2015
Package Drawing Contact:
[email protected]
16
TITLE
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
GPC
SWB
DRAWING NO.
REV.
8S1
H
13.3
8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
N
L
Top View
End View
A
b
A1
e
COMMON DIMENSIONS
(Unit of Measure = mm)
A2
D
SYMBOL
Side View
Notes:
1. This drawing is for general information only.
Refer to JEDEC Drawing MO-153, Variation AA, for proper
dimensions, tolerances, datums, etc.
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.08mm total in excess
of the b dimension at maximum material condition. Dambar
cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
MIN
NOM
MAX
A
-
-
1.20
A1
0.05
-
0.15
NOTE
A2
0.80
1.00
1.05
D
2.90
3.00
3.10
2, 5
E
6.40 BSC
E1
4.30
4.40
4.50
3, 5
b
0.19
0.25
0.30
4
e
L
0.65 BSC
0.45
L1
C
0.60
0.75
1.00 REF
0.09
-
0.20
2/27/14
TITLE
Package Drawing Contact:
[email protected]
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
GPC
TNR
DRAWING NO.
8X
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
REV.
E
17
14.
18
Revision History
Doc. Rev.
Date
5227H
12/2015
5227G
06/2015
Comments
Corrected the ordering code detail.
Updated package drawings, ordering code table, and part marking page.
Added the ordering code detail.
Updated Atmel template (no changes to functional specification). logos, and disclaimer
page, part markings to a single page, and package drawings 8P3, 8S1, and 8A2 to 8X.
5227F
02/2014
5227E
11/2008
Updated pin configurations.
5227D
01/2008
Removed ‘preliminary’ status.
5227C
08/2007
Added Part Marking Scheme.
5227B
08/2007
5227A
04/2007
Updated the Random Read figure and add the AC measurement conditions note to the
AC Characteristics table.
Updated to new template and common figures.
Added Part Marking tables.
Initial document release.
AT24HC04B [DATASHEET]
Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015
XXXXXX
Atmel Corporation
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© 2015 Atmel Corporation. / Rev.: Atmel-5227H-SEEPROM-AT24HC04B-Datasheet_122015.
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