AT22LV10(L) - Mature

Features
• Low-voltage Programmable Logic Device
•
•
•
•
– Wide Power Supply Range - 3.0V to 5.5V
– Ideal for Battery Powered Systems
High-speed Operation
– 20 ns Maximum Propagation Delay at VCC = 3.0V
Commercial and Industrial Temperature Ranges
Familiar 22V10 Logic Architecture
Low-power 3-volt CMOS Operation
Temp
AT22LV10L
AT22LV10
Com./Ind.
Com./Ind.
4/5
35/45
ICC (mA)
Low-voltage UV
Erasable
Programmable
Logic Device
VCC = 3.6V
• CMOS and TTL Compatible Inputs and Outputs
– 10 µA Leakage Maximum
• Reprogrammable – Tested 100% for Programmability
• High-reliability CMOS Technology
– 2000V ESD Protection
– 200 mA Latchup Immunity
• Dual-in-line and Surface Mount Packages
AT22LV10
AT22LV10L
Logic Diagram
Description
The AT22LV10 and AT22LV10L are low-voltage compatible CMOS high-performance
Programmable Logic Devices (PLDs). Speeds down to 20 ns and power dissipation
as low as 14.4 mW are offered. All speed ranges are specified over the 3.0V to 5.5V
range. All pins offer a low ±10 µA leakage.
The AT22LV10L provides the optimum low-power CMOS PLD solution, with low DC
power (1 mA typical at V CC = 3.3V) and full CMOS output levels. The AT22LV10L
significantly reduces total system power, allowing battery powered operation.
(continued)
Pin Configurations
Clock and Logic Input
IN
Logic Inputs
I/O
Bidirectional Buffers
*
No Internal Connection
VCC
3.0V to 5.5V Supply
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
IN
IN
IN
*
IN
IN
IN
4
3
2
1
28
27
26
CLK/IN
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
5
6
7
8
9
10
11
25
24
23
22
21
20
19
12
13
14
15
16
17
18
Function
IN
IN
GND
*
IN
I/O
I/O
Pin Name
PLCC
IN
IN
CLK/IN
*
VCC
I/O
I/O
DIP/SOIC
All Pinouts Top View
I/O
I/O
I/O
*
I/O
I/O
I/O
Rev. 0190E–08/99
1
Full CMOS output levels help reduce power in many other
system components.
Logic Options
The AT22LV10 and AT22LV10L logic architectures are
identical to the familiar 22V10. Each output is allocated
from eight to 16 product terms, which allows highly
complex logic functions to be realized.
Two additional product terms are included to provide
synchronous preset and asynchronous reset. These terms
are common to all ten registers. All registers are automatically cleared upon power-up.
Register preload simplifies testing. A security fuse prevents
unauthorized copying of programmed fuse patterns.
Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground ........................................-2.0V to +7.0V (1)
Voltage on Input Pins
with Respect to Ground
During Programming....................................-2.0V to +14.0V (1)
Output Options
Programming Voltage with
Respect to Ground ......................................-2.0V to +14.0V (1)
Integrated UV Erase Dose..............................7258 W•sec/cm2
*NOTICE:
Note:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other conditions beyond those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
1. Minimum voltage is -0.6V DC which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum pin
voltage is VCC + 0.75V DC which may undershoot to
VCC + 2.0V for pulses of less than 20 ns.
DC and AC Operating Conditions
Operating Temperature (Ambient)
VCC Power Supply
2
AT22LV10(L)
Commercial
Industrial
0°C - 70°C
-40°C - 85°C
3.0V to 5.5V
3.0V to 5.5V
AT22LV10(L)
DC Characteristics
Symbol
Parameter
Condition(2)
ILI
Input Load Current
ILO
Output Leakage
Current
ICC
Power Supply
Current
Max
Units
VIN = -0.1V to VCC + 1V
10
µA
VOUT = -0.1V to VCC + 0.1V
10
µA
VCC = 3.6V/5.5V,
VIN = GND,
Outputs Open
Min
Typ
Com.
20/50
35/90
mA
Ind.
20/50
45/100
mA
Com.
1/2
4/12
mA
Ind.
1/2
5/15
mA
-120
mA
AT22LV10
AT22LV10L
IOS(1)
Output Short Circuit
Current
VOUT = 0.5V
VIL1
Input Low Voltage
4.5V ≤ VCC ≤ 5.5V
-0.6
0.8
V
VIL2
Input Low Voltage
3.0V ≤ VCC < 4.5V
-0.6
0.6
V
VIH
Input High Voltage
2.0
VCC + 0.75
V
VOL
Output Low Voltage
VIN = VIH or VIL
VOH
Notes:
Output High Voltage
VCC = 3.0V
Com., Ind.
IOL = 8 mA
0.5
V
VCC = 4.5V
Com., Ind.
IOL = 16 mA
0.5
V
VCC = 3.0V
Com., Ind.
IOL = 6 mA
0.35
V
VIN = VIH or VIL,
VCC = 3.0V/4.5V
IOH = -100 µA
VCC - 0.3
IOH = -0.4 mA/-4.0 mA
2.4
1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.
2. For DC characteristics, the test condition of VCC = Max corresponds to 3.6V.
V
V
3
AC Characteristics for the AT22LV10
AT22LV10-20
Symbol
Parameter
tPD
Input or Feedback to NonRegistered Output
tEA
Typ
Max
Units
20
15
25
ns
Input to Output Enable
20
15
25
ns
tER
Input to Output Disable
20
15
25
ns
tCF
Clock to Feedback
0
4
9
0
5
9
ns
tCO
Clock to Output
0
8
14
0
10
17
ns
tS
Input or Feedback Setup Time
10
6
12
7
tH
Hold Time
0
0
ns
tP
Clock Period
10
12
ns
tW
Clock Width
5
6
ns
FMAX
Min
AT22LV10-25
Typ
Max
12
Min
ns
External Feedback 1/(tS+tCO)
41.6
34.5
MHz
Internal Feedback 1/(tS + tCF)
52.6
47.6
MHz
No Feedback 1/(tP)
100.0
83.3
MHz
tAW
Asynchronous Reset Width
20
12
25
15
ns
tAR
Asynchronous Reset,
Synchronous Preset,
Recovery Time
20
12
25
15
ns
tAP
Asynchronous Reset to
Registered Output Reset
15
25
18
28
AC Waveforms(1)
Note:
4
1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
AT22LV10(L)
ns
AT22LV10(L)
AC Characteristics for the AT22LV10L
AT22LV10L-25
Symbol
Parameter
tPD
Typ
Max
Units
Input or Feedback to Non-Registered Output
15
25
ns
tEA
Input to Output Enable
15
25
ns
tER
Input to Output Disable
15
25
ns
tCF
Clock to Feedback
0
5
9
ns
tCO
Clock to Output
0
10
14
ns
tSF
Feedback Setup Time
12
7
ns
tS
Input Setup Time
17
15
ns
tH
Hold Time
0
ns
tP
Clock Period
12
ns
tW
Clock Width
6
ns
FMAX
Min
External Feedback 1/(tS + tCO)
32.2
MHz
Internal Feedback 1/(tSF + tCF)
47.6
MHz
No Feedback 1/(tP)
83.3
MHz
tAW
Asynchronous Reset Width
25
15
ns
tAR
Asynchronous Reset Recovery Time
25
15
ns
tAP
Asynchronous Reset to Registered Output Reset
Input Test Waveforms and
Measurement Levels
18
28
ns
Output Test Loads
Commercial
5
Functional Logic Diagram AT22LV10(L)
6
AT22LV10(L)
AT22LV10(L)
Preload of Registered Outputs
The registers in the AT22LV10 and AT22LV10L are provided with circuitry to allow loading of each register
asynchronously with either a high or a low. This feature will
simplify testing since any state can be forced into the registers to control test sequencing. A VIH level on the I/O pin
will force the register high; a VIL will force it low, independent of the polarity bit (C0) setting. The preload state is
entered by placing an 11.5V to 13V signal on pin 8 on
DIPs, and pin 10 on SMPs. When the clock pin is pulsed
high, the data on the I/O pins is placed into the ten
registers.
Level Forced on Registered Output
Pin During Preload Cycle
Register State After
Cycle
VIH
High
VIL
Low
Power-up Reset
The registers in the AT22LV10 and AT22LV10L are
designed to reset during power-up. At a point delayed
slightly from VCC crossing 2.5V, all registers will be reset to
the low state. The output state will depend on the polarity of
the output buffer.
This feature is critical for state machine initialization.
However, due to the asynchronous nature of reset and the
uncertainty of how V CC actually rises in the system, the
following conditions are required:
1. The VCC rise must be monotonis;
2. After reset occurs, all input and feedback setup
times must be met before driving the clock pin high,
and
Parameter
tPR
Description
Power-up
Reset Time
Min
Typ
Max
Units
600
1000
ns
3. The clock must remain stable during tPR.
Pin Capacitance
(f = 1 MHz, T = 25°C) (1)
CIN
COUT
Note:
Typ
Max
Units
5
8
pF
Conditions
VIN = 0V
6
8
pF
VOUT = 0V
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Erasure Characteristics
The entire fuse array of an AT22LV10 or AT22LV10L is
erased after exposure to ultraviolet light at a wavelength of
2537 Å. Complete erasure is assured after a minimum of
20 minutes exposure using 12,000 µW/cm2 intensity lamps
spaced one inch away from the chip. Minimum erase time
for lamps at other intensity ratings can be calculated from
the minimum integrated erasure dose of 15 W•sec/cm2. To
prevent unintentional erasure, an opaque label is recommended to cover the clear window on any UV erasable
PLD which will be subjected to continuous fluorescent
indoor lighting or sunlight.
7
8
AT22LV10(L)
AT22LV10(L)
9
Ordering Information
tPD
(ns)
tS
(ns)
tCO
(ns)
20
10
14
25
25
12
17
17
14
Ordering Code
Package
Operation Range
AT22LV10-20JC
AT22LV10-20PC
AT22LV10-20SC
28J
24P3
24S
Commercial
(0°C to 70°C)
AT22LV10-20JI
AT22LV10-20PI
AT22LV10-20SI
28J
24P3
24S
Industrial
(-40°C to 85°C)
AT22LV10-25JC
AT22LV10-25PC
AT22LV10-25SC
28J
24P3
24S
Commercial
(0°C to 70°C)
AT22LV10-25JI
AT22LV10-25PI
AT22LV10-25SI
28J
24P3
24S
Industrial
(-40°C to 85°C)
AT22LV10L-25JC
AT22LV10L-25PC
AT22LV10L-25SC
28J
24P3
24S
Commercial
(0°C to 70°C)
AT22LV10L-25JI
AT22LV10L-25PI
AT22LV10L-25SI
28J
24P3
24S
Industrial
(-40°C to 85°C)
Using “C” Product for Industrial
To use commercial product for Industrial temperature ranges, down-grade one speed grade from the “I” to the “C” device
(7 ns “C” = 10 ns “I”) and de-rate power by 30%.
Package Type
28J
28-lead, Plastic J-leaded Chip Carrier OTP (PLCC)
24P3
24-lead, 0.300" Wide, Plastic Dual Inline Package OTP (PDIP)
24S
24-lead, 0.300" Wide, Plastic Gull-Wing Small Outline OTP (SOIC)
10
AT22LV10(L)
AT22LV10(L)
Packaging Information
28J, 28-lead, Plastic J-leaded Chip Carrier (PLCC)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-018 AB
24P3, 24-lead, 0.300” Wide. Plastic
Dual Inline Package (PDIP)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-011 AB
.045(1.14) X 45° PIN NO. 1
IDENTIFY
.045(1.14) X 30° - 45°
.456(11.6)
SQ
.450(11.4)
.032(.813)
.026(.660)
.495(12.6)
SQ
.485(12.3)
.050(1.27) TYP
.300(7.62) REF SQ
1.27(32.3)
1.25(31.7)
.012(.305)
.008(.203)
PIN
1
.266(6.76)
.250(6.35)
.430(10.9)
SQ
.390(9.91)
.021(.533)
.013(.330)
.090(2.29)
MAX
1.100(27.94) REF
.043(1.09)
.020(.508)
.120(3.05)
.090(2.29)
.180(4.57)
.165(4.19)
.022(.559) X 45° MAX (3X)
.200(5.06)
MAX
.005(.127)
MIN
SEATING
PLANE
.070(1.78)
.020(.508)
.023(.584)
.014(.356)
.151(3.84)
.125(3.18)
.110(2.79)
.090(2.29)
.065(1.65)
.040(1.02)
.325(8.26)
.300(7.62)
.012(.305)
.008(.203)
0 REF
15
.400(10.2) MAX
24S, 24-lead, 0.300” Wide, Plastic Gull-Wing Small
Outline (SOIC)
Dimensions in Inches and (Millimeters)
.020(.508)
.013(.330)
.299(7.60) .420(10.7)
.291(7.39) .393(9.98)
PIN 1 ID
.050(1.27) BSC
.616(15.6)
.598(15.2)
.105(2.67)
.092(2.34)
.012(.305)
.003(.076)
.013(.330)
.009(.229)
0 REF
8
.050(1.27)
.015(.381)
11
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© Atmel Corporation 1999.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for
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0190E–08/99/xM
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