AT27C256R - Complete

Features
• Fast read access time – 45ns
• Low-power CMOS operation
•
•
•
•
•
•
•
•
– 100µA max standby
– 20mA max active at 5MHz
JEDEC standard packages
– 28-lead PDIP
– 32-lead PLCC
5V±10% supply
High reliability CMOS technology
– 2,000V ESD protection
– 200mA latchup immunity
Rapid programming algorithm – 100µs/byte (typical)
CMOS- and TTL-compatible inputs and outputs
Integrated product identification code
Industrial and automotive temperature ranges
Green (Pb/halide-free) packaging option
1.
256K (32K x 8)
One-time
Programmable,
Read-only Memory
Atmel AT27C256R
Description
The Atmel® AT27C256R is a low-power, high-performance, 262,144-bit, one-time programmable, read-only memory (OTP EPROM) organized as 32K by 8 bits. It requires only
one 5V power supply in normal read mode operation. Any byte can be accessed in less than
45ns, eliminating the need for speed reducing WAIT states on high-performance microprocessor systems.
The Atmel scaled CMOS technology provides low active power consumption and fast programming. Power consumption is typically only 8mA in active mode and less than 10µA in
standby mode.
The AT27C256R is available in a choice of industry-standard, JEDEC-approved, one-time
programmable (OTP) PDIP and PLCC packages. All devices feature two-line control (CE,
OE) to give designers the flexibility to prevent bus contention.
With 32K byte storage capability, the AT27C256R allows firmware to be stored reliably and
to be accessed by the system without the delays of mass storage media.
The AT27C256R has additional features to ensure high quality and efficient production use.
The rapid programming algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100µs/byte. The
integrated product identification code electronically identifies the device and manufacturer.
This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages.
0014O–EPROM–10/11
Pin configurations
Addresses
O0 - O7
Outputs
CE
Chip enable
OE
Output enable
NC
No connect
28-lead PDIP
Top view
A7
A12
VPP
NC
VCC
A14
A13
A0 - A14
32-lead PLCC
Top view
A6
A5
A4
A3
A2
A1
A0
NC
O0
4
3
2
1
32
31
30
Function
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
14
15
16
17
18
19
20
Pin name
A8
A9
A11
NC
OE
A10
CE
O7
O6
O1
O2
GND
NC
O3
O4
O5
2.
Note:
3.
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
PLCC package pins 1
and 17 are “don’t
connect”
System considerations
Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless
accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance.
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible.
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
Figure 3-1.
2
Block diagram
Atmel AT27C256R
0014O–EPROM–10/11
Atmel AT27C256R
4.
Absolute maximum ratings*
*NOTICE:
Temperature under bias . . . . . . . . . . . . . .-55°C to +125°C
Storage temperature . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on any pin with
respect to ground . . . . . . . . . . . . . . . . . . . -2.0V to +7.0V(1)
Stresses beyond those listed under “Absolute
maximum ratings” may cause permanent damage to
the device. This is a stress rating only, and functional
operation of the device at these or any other conditions
beyond those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect device reliability.
Voltage on A9 with
respect to ground . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)
VPP supply voltage with
respect to ground . . . . . . . . . . . . . . . . . . -2.0V to +14.0V(1)
Note:
5.
1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is
VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns.
DC and AC characteristics
Table 5-1.
Operating Modes
Mode/Pin
CE
OE
Ai
VPP
Outputs
Read
VIL
VIL
Ai
Output disable
VIL
Standby
Rapid program(2)
(2)
PGM verify
Optional PGM verify
(2)
(1)
X
VCC
High Z
(1)
VCC
High Z
X
X
VIL
VIH
Ai
VPP
DIN
VIL
Ai
VPP
DOUT
VIL
Ai
VCC
DOUT
(1)
VPP
High Z
VCC
Identification code
(1)
VIL
PGM inhibit
VIH
VIH
Product identification(4)
VIL
VIL
Notes:
DOUT
VIH
X
(2)
VIH
VCC
(1)
X
A9 = VH(3)
A0 = VIH or VIL
A1 - A14 = VIL
1. X can be VIL or VIH.
2. Refer to programming characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled low (VIL) to select the manufacturer’s identification byte and high (VIH) to select the device code byte.
Table 5-2.
DC and AC operating conditions for read operation
Atmel AT27C256R
Operating temp. (case)
Ind.
-45
-70
-40C - 85C
-40C - 85C
Auto.
VCC supply
-40C - 125C
5V ±10%
5V ±10%
3
0014O–EPROM–10/11
Table 5-3.
DC and operating characteristics for read operation
Symbol
Parameter
Condition
ILI
Input load current
VIN = 0V to VCC
ILO
Output leakage current
IPP1
(2)
VPP(1)
read/standby current
Min
Max
Units
Ind.
±1
µA
Auto.
±5
µA
Ind.
±5
µA
Auto.
±10
µA
VPP = VCC
10
µA
ISB1 (CMOS), CE = VCC  0.3V
100
µA
ISB2 (TTL), CE = 2.0 to VCC + 0.5V
1
mA
f = 5MHz, IOUT = 0mA, E = VIL
20
mA
VOUT = 0V to VCC
ISB
VCC(1) standby current
ICC
VCC active current
VIL
Input low voltage
-0.6
0.8
V
VIH
Input high voltage
2.0
VCC + 0.5
V
VOL
Output low voltage
IOL = 2.1mA
0.4
V
VOH
Output high voltage
IOH = -400µA
Notes:
2.4
V
1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and
IPP.
Table 5-4.
AC characteristics for read operation
Atmel AT27C256R
-45
Symbol
Parameter
Condition
tACC(1)
Address to output delay
CE = OE = VIL
tCE(1)
CE to output delay
tOE(1)
OE to output delay
tDF(1)
OE or CE high to output float, whichever occurred first
tOH
Output hold from address, CE or OE, whichever occurred
first
Note:
4
Min
-70
Max
Units
45
70
ns
OE = VIL
45
70
ns
CE = VIL
20
30
ns
20
25
ns
7
Max
Min
7
ns
1. See AC waveforms for read operation.
Atmel AT27C256R
0014O–EPROM–10/11
Atmel AT27C256R
Figure 5-1.
Notes:
AC waveforms for read operation(1)
1. Timing measurement reference level is 1.5V for -45 devices. Input AC drive levels are VIL = 0.0V and VIH = 3.0V. Timing
measurement reference levels for all other speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL =
0.45V and VIH = 2.4V.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC.
4. This parameter is only sampled, and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
Figure 5-2.
Input test waveforms and measurement levels
For -45 devices only:
tR, tF < 5ns (10% to 90%)
For -70 devices:
tR, tF < 20ns (10% to 90%)
5
0014O–EPROM–10/11
Figure 5-3.
Note:
Output test load
1. CL = 100pF including jig capacitance, except for the -45 devices, where CL = 30pF.
Table 5-5.
Pin capacitance
f = 1MHz, T = 25°C(1)
Symbol
Typ
Max
Units
Conditions
CIN
4
6
pF
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled, and is not 100% tested.
Figure 5-4.
Notes:
Programming Waveforms(1)
1. The input timing reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device, but must be accommodated by the programmer.
3. When programming the Atmel AT27C256R, a 0.1µF capacitor is required across VPP and ground to suppress spurious voltage transients.
6
Atmel AT27C256R
0014O–EPROM–10/11
Atmel AT27C256R
Table 5-6.
DC programming characteristics
TA = 25  5°C, VCC = 6.5  0.25V, VPP = 13.0  0.25V
Limits
Symbol
Parameter
Test Conditions
ILI
Input load current
VIN = VIL,VIH
VIL
Input low level
VIH
Input high level
VOL
Output low volt
IOL = 2.1mA
VOH
Output high volt
IOH = -400µA
ICC2
VCC supply current (program and verify)
IPP2
VPP current
VID
A9 product identification voltage
Table 5-7.
Min
Max
Units
±10
µA
-0.6
0.8
V
2.0
VCC + 1
V
0.4
V
2.4
V
CE = VIL
11.5
25
mA
25
mA
12.5
V
AC programming characteristics
TA = 25  5°C, VCC = 6.5  0.25V, VPP = 13.0  0.25V
Limits
Symbol
Parameter
tAS
Address setup time
tOES
OE setup time
tDS
Data setup time
tAH
Address hold time
tDH
Data hold time
tDFP
OE high to output float delay(2)
tVPS
VPP setup time
tVCS
VCC setup time
Test conditions
Min
Input rise and fall times
(10% to 90%) 20ns
Input pulse levels
0.45V to 2.4V
Max
(3)
CE program pulse width
µs
2
µs
2
µs
0
µs
2
µs
tOE
Data valid from OE(2)
tPRT
VPP pulse rise time during programming
130
ns
2
µs
2
µs
95
Output timing reference level
0.8V to 2.0V
Units
2
0
Input timing reference level
0.8V to 2.0V
tPW
Notes:
(1)
105
µs
150
ns
50
ns
1. VCC must be applied simultaneously with or before VPP and removed simultaneously with or after VPP.
2. This parameter is only sampled, and is not 100% tested. Output float is defined as the point where data is no longer driven.
See timing diagram.
3. Program pulse width tolerance is 100µs 5%.
Table 5-8.
The Atmel AT27C256R integrated product identification code
Pins
A0
O7
O6
O5
O4
O3
O2
O1
O0
Hex
data
Manufacturer
0
0
0
0
1
1
1
1
0
1E
Device type
1
1
0
0
0
1
1
0
0
8C
Codes
7
0014O–EPROM–10/11
6.
Rapid programming algorithm
A 100µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to
13.0V. Each address is first programmed with one 100µs CE pulse without verification. Then a verification/reprogramming
loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100µs pulses are
applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is
considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then
lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device
passes or fails.
Figure 6-1.
8
Rapid programming algorithm
Atmel AT27C256R
0014O–EPROM–10/11
Atmel AT27C256R
7.
Ordering information
Green package (Pb/halide-free)
ICC (mA)
tACC
(ns)
Active
Standby
Atmel ordering code
Package
Lead finish
Operation range
45
20
0.1
AT27C256R-45JU
AT27C256R-45PU
32J
28P6
Matte tin
Matte tin
Industrial
(-40C to 85C)
70
20
0.1
AT27C256R-70JU
AT27C256R-70PU
32J
28P6
Matte tin
Matte tin
Industrial
(-40C to 85C)
Package type
32J
32-lead, plastic, J-leaded chip carrier (PLCC)
28P6
28-lead, 0.600" wide, plastic, dual inline package (PDIP)
9
0014O–EPROM–10/11
8.
Packaging information
32J – PLCC
1.14(0.045) X 45°
PIN NO. 1
IDENTIFIER
1.14(0.045) X 45°
0.318(0.0125)
0.191(0.0075)
E1
E2
B1
E
B
e
A2
D1
A1
D
A
0.51(0.020)MAX
45° MAX (3X)
COMMON DIMENSIONS
(Unit of measure = mm)
D2
Notes:
1. This package conforms to JEDEC reference MS-016, variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.10mm) maximum.
SYMBOL
MIN
NOM
MAX
A
3.175
–
3.556
A1
1.524
–
2.413
A2
0.381
–
–
D
12.319
–
12.573
D1
11.354
–
11.506
D2
9.906
–
10.922
E
14.859
–
15.113
E1
13.894
–
14.046
E2
12.471
–
13.487
B
0.660
–
0.813
B1
0.330
–
0.533
e
NOTE
Note 2
Note 2
1.270 TYP
10/04/01
Package drawing contact:
[email protected]
10
TITLE
32J, 32-lead, plastic J-leaded chip carrier (PLCC)
DRAWING NO.
32J
REV.
B
Atmel AT27C256R
0014O–EPROM–10/11
Atmel AT27C256R
28P6 – PDIP
D
PIN
1
E1
A
SEATING PLANE
A1
L
B
B1
e
E
0º ~ 15º
C
eB
Notes:
1. This package conforms to JEDEC reference MS-011, variation AB
2. Dimensions D and E1 do not include mold flash or protrusion
mold flash or protrusion shall not exceed 0.25mm (0.010")
COMMON DIMENSIONS
(Unit of Measure = mm)
REF
SYMBOL
MIN
NOM
MAX
A
–
–
4.826
A1
0.381
–
–
D
36.703
–
37.338
E
15.240
–
15.875
E1
13.462
–
13.970
B
0.356
–
0.559
B1
1.041
–
1.651
L
3.048
–
3.556
C
0.203
–
0.381
eB
15.494
–
17.526
e
NOTE
Note 2
Note 2
2.540 TYP
09/28/01
Package drawing contact:
[email protected]
TITLE
28P6, 28-lead (0.600"/15.24mm wide) plastic dual
inline package (PDIP)
DRAWING NO.
28P6
REV.
B
11
0014O–EPROM–10/11
9.
12
Revision history
Doc. rev.
Date
Comments
0014O
10/2011
Correct pinouts
0014N
04/2011
Remove TSOP and SOIC packages
Add lead finish to ordering information
0014M
12/2007
Atmel AT27C256R
0014O–EPROM–10/11
Atmel Corporation
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San Jose, CA 95131
USA
Tel: (+1) (408) 441-0311
Fax: (+1) (408) 487-2600
www.atmel.com
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GERMANY
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JAPAN
Tel: (+81) (3) 3523-3551
Fax: (+81) (3) 3523-7581
© 2011 Atmel Corporation. All rights reserved. / Rev.: 0014O–EPROM–10/11
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