ATA5551M-PPMY - Complete

ATA5551M-PPMY
Standard Read/Write ID Transponder with Anti-collision
DATASHEET
Features
● Read/write anti-collision ID transponder in plastic package
● Contactless read/write data transmission
● Inductive coupled power supply at 125kHz
● Basic component: R/W Atmel® IDIC® e5551
● Anti-collision mode by password request
● E.g. 10 transponders read out in < 500ms (RF/32, Maxblock 2) depending on the
application
● Built-in coil and capacitor for circuit antenna
● Starts with cyclical data read out
● 224-bit EEPROM user programmable in 32-bit blocks
● Typically < 50ms to write and verify a block
● Write protection by lock bits
● Malprogramming protection
● Options set by EEPROM
● Bit rate [bit/s]: RF/8, RF/16, RF/32, RF/40, RF/50, RF/64, RF/100, RF/128
● Modulation: BIN, FSK, PSK, Manchester, bi-phase
Application
● Access control systems
● Brand protection
● Process control and automation systems
● Installation and medical equipment
● Asset management systems
● Industrial
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1.
Description
The Atmel® ATA5551M-PPMY is a completely programmable R/W transponder which implements all important functions for
identification systems, including anti-collision (e.g., 10 transponders in < 500ms depending on the application). It allows the
contactless reading and writing of data which are transmitted bi-directionally between a read/write base station and the
transponder. It is a plastic-packaged device which accommodates the IDIC e5551 and also the antenna realized as an LCcircuit. No additional external power supply is necessary for the transponder because it receives power from the RF field
generated by the base station. Data are transmitted by modulating the amplitude of the RF field. The Atmel ATA5551MPPMY can be used to adjust and modify the ID code or any other stored data, e.g., rolling code systems. The on-chip 264-bit
EEPROM (8 blocks, 33 bits per block) can be read and written block wise from the base station. The blocks can be protected
against overwriting. One block is reserved for setting the operation modes of the IC. Another block can obtain a password to
prevent unauthorized writing.
Figure 1-1. System Block Diagram
2.
General
The transponder is the mobile part of the closed coupled identification system (see Figure 4-1 on page 3), whereas the
reader (writer) is based on an IC or on discrete solutions, and the read/write transponder is based on the Atmel IDIC e5551.
The transponder is a plastic cube device consisting of the following parts:
● The transponder antenna, realized as a tuned LC circuit
●
3.
Read/write Atmel IDIC (e5551) with EEPROM
Transponder Antenna
The antenna consists of a coil and a capacitor for tuning the circuit to the nominal carrier frequency of 125kHz. The coil has
a ferrite core for improving the distance of read, write and programming operations.
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4.
Read/Write IDIC e5551
The read/write Atmel IDIC e5551 is part of the transponder Atmel ATA5551M-PPMY. The data are transmitted bidirectionally
between the base station and the transponder. The transponder receives power via a single coil from the RF signal
generated by the base station. The single coil is connected to the chip and also serves as the IC’s bi-directional
communication interface.
Data are transmitted by modulating the amplitude of the RF signal. Reading of register contents occurs by damping the coil
by an internal load. Writing into registers occurs by interrupting the RF field in a specific way. The Atmel ATA5551M-PPMY
transponder operates at a nominal frequency of 125kHz. There are different bit rates and encoding schemes.
The on-chip 264-bit EEPROM (8 block, 33 bits each) can be read and written block wise from the base station. The blocks
can be protected against overwriting by using lock bits. One block is reserved for setting the operation modes of the IC.
Another block contains a password to prevent unauthorized writing.
Features
●
●
●
●
●
●
●
●
●
●
●
Low-power, low-voltage operation
Contactless power supply
Contactless read/write data transmission
Radio frequency (RF): 100kHz to 150kHz
264 bit EEPROM memory in 8 blocks of 33 bits
224 bits in 7 blocks of 32 bits are free for user data
Block write protection
Extensive protection against contactless malprogramming of the EEPROM
Anticollision using answer-on-request (AOR)
Typical < 50ms to write and verify a block
Other options set by EEPROM:
●
Bitrate [bit/s]: RF/8, RF/16, RF/32, RF/40, RF/50, RF/64, RF/100, RF/128
●
Modulation: BIN, FSK, PSK, Manchester, bi-phase
●
Other: Terminator mode, password mode
Figure 4-1. RFID System using e5551 Tag
Power
Reader/
Writer
Data
Controller
Transponder
Coil Interface
4.1
Memory
e5551
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4.2
Atmel e5551 Building Blocks
4.2.1
Analog Front End (AFE)
The AFE includes all circuits which are directly connected to the coil. It generates the IC’s power supply and handles the
bidirectional data communication with the reader unit. It consists of the following blocks:
● Rectifier to generate a dc supply voltage from the ac coil voltage
●
●
●
4.2.2
Clock extractor
Switchable load between Coil1/ Coil2 for data transmission from the IC to the reader unit (read)
Field gap detector for data transmission from the reader unit into the IC (write)
Controller
The main controller has following functions:
● Load mode register with configuration data from EEPROM block 0 after power-on and also during reading
4.2.3
●
●
●
Control memory access (read, write)
●
In password mode, the 32 bits received after the OPcode are compared with the stored password in block 7.
Handle write data transmission and the write error modes
The first two bits of the write data stream are the OPcode. There are two valid OP-codes (standard and stop) which
are decoded by the controller.
Bitrate Generator
The bitrate generator can deliver the following bitrates: RF/8 - RF/16 - RF/32 - RF/40 - RF/50 - RF/64 - RF/100 - RF/128
4.2.4
Write Decoder
Decode the detected gaps during writing. Check if write data stream is valid.
4.2.5
Test Logic
Test circuitry allows rapid programming and verification of the IC during test.
4.2.6
HV Generator
Voltage pump which generates ≈ 18V for programming of the EEPROM.
4.2.7
Pad Layout
Figure 4-2. Pad Layout
Coil1
e5551
Coil2
VDD VSS
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Test pads
Figure 4-3. Block Diagram Atmel e5551
POR
Modulator
Coil2
VDD
4.2.8
Write
Decoder
Mode Register
Memory
(264-bit EEPROM)
Controller
Bitrate
Generator
Analog Frontend
Coil1
VSS
Input Register
Test Logic
HV Generator
Test Pads
Power-on Reset (POR)
The power-on reset is a delay reset which is triggered when supply voltage is applied.
4.2.9
Mode Register
The mode register stores the mode data from EEPROM block 0. It is continually refreshed at the start of every block. This
increases the reliability of the device (if the originally loaded mode information is false, it will be corrected by subsequent
refresh cycles).
4.2.10 Modulator
The modulator consists of several data encoders in two stages, which may be freely combined to obtain the desired
modulation. The basic types of modulation are:
● PSK: phase shift: 1) every change; 2) every ‘1’; 3) every rising edge (carrier: fc/2, fc/4 or fc/8)
●
●
●
Note:
FSK: 1) f1 = rf/8, f2 = rf/5; 2) f1 = rf/8, f2 = rf/10
Manchester: rising edge = H; falling edge = L
Biphase: every bit creates a change, a data ‘H’ creates an additional mid-bit change
The following modulation type combinations will not work:
●
Stage1 Manchester or biphase, stage2 PSK2, at any PSK carrier frequency (because the first stage output frequency
is higher than the second stage strobe frequency)
●
Stage1 Manchester or biphase and stage2 PSK with bitrate = rf/8 and PSK carrier frequency = rf/8 (for the same
reason as above)
●
Any stage1 option with any PSK for bitrates rf/50 or rf/100 if the PSK carrier frequency is not an integer multiple of the
bitrate (e.g., br = rf/50, PSKcf = rf/4, because 50/4 = 12.5). This is because the PSK carrier frequency must maintain
constant phase with respect to the bit clock.
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4.2.11 Memory
The memory of the Atmel® e5551 is a 264 bit EEPROM, which is arranged in 8 blocks of 33 bits each. All 33 bits of a block,
including the lock bit, are programmed simultaneously. The programming voltage is generated on-chip.
Block 0 contains the mode data, which are not normally transmitted (see Figure 4-5).
Block 1 to 6 are freely programmable. Block 7 may be used as a password. If password protection is not required, it may be
used for user data.
Bit 0 of every block is the lock bit for that block. Once locked, the block (including the lockbit itself) cannot be fieldreprogrammed.
Data from the memory is transmitted serially, starting with block 1, bit 1, up to block ‘MAXBLK’, bit 32. ‘MAXBLK’ is a mode
parameter set by the user to a value between 0 and 7 (if maxblk=0, only block 0 will be transmitted).
Figure 4-4. Memory Map
0 1
32
L
User Data or Password
Block 7
L
User Data
Block 6
L
User Data
Block 5
L
User Data
Block 4
L
User Data
Block 3
L
User Data
Block 2
L
User Data
Block 1
L
Configuration Data
Block 0
32 Bits
Not transmitted
Figure 4-5. Modulator Block Diagram
Carrier Frequency
PSK1
PSK2
Manchester
From Memory
Direct
Biphase
PSK3
MUX
Direct
FSK1, 1a
FSK2, 2a
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MUX
To Load
Figure 4-6. Memory Map of Block 0
0
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1
reserved
BR
MS1
[2] [1] [0]
lock bit (never transmitted)
MS2
PSKCF
MAXBLK
* [1] [0] [2] [1] [0] [1] [0]
* [2] [1] [0]
”0”
res’d
”0”
*useSTOP
useBT
AOR
useST
usePWD
Key:
AOR
BT
ST
PWD
STOP
BR
MS1
MS2
PSKCF
MAXBLK
reserved
send Blocks:
Anwer-On-Request
use Block
use Sequence Terminator
use Password
obey stop header (active low!)
Bit Rate
Modulator Stage 1
Modulator Stage 2
PSK Clock Frequency
see Maxblock feature
do not use
0
0
0
0
1
1
1
1
* Bit 15 and 24 must always be at ”0”,
otherwise malfunction appear.
0
0
1
1
1
0
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
RF/8
RF/16
RF/32
RF/40
RF/50
RF/64
RF/100
RF/128
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1 to 2
1 to 3
1 to 4
1 to 5
1 to 6
1 to 7
RF/2
RF/4
RF/8
reserved
0
0
0
0
0
0
1
1
0
1
0
1
direct
psk1 (phase change when input changes)
psk2 (phase change on bit clk if input high)
psk3 (phase change on rising edge of input)
1
1
1
1
0
0
1
1
0
1
0
1
o/p freq.
fsk1
fsk2
fsk1a
fsk2
Data = 1
rf/8
rf/8
rf/5
rf/10
Data = 0
rf/5
rf/10
rf/8
rf/8
direct
Manchester
Biphase
reserved
bitrate_8cpb
bitrate_16cpb
bitrate_32cpb
bitrate_40cpb
bitrate_50cpb
bitrate_64cpb
bitrate_100cpb
bitrate_128cpb
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4.3
Operating the Atmel e5551
4.3.1
General
The basic functions of the Atmel® e5551 are: supply IC from the coil, read data from the EEPROM to the reader, write data
into the IC and program these data into the EEPROM. Several errors can be detected to protect the memory from being
written with the wrong data (see Figure 4-21 on page 15).
4.3.2
Supply
The Atmel e5551 is supplied via a tuned LC circuit which is connected to the Coil 1 and Coil 2 pads. The incoming RF
(actually a magnetic field) induces a current into the coil. The on-chip rectifier generates the dc supply voltage (VDD, VSS
pads). Overvoltage protection prevents the IC from damage due to high-field strengths. Depending on the coil, the opencircuit voltage across the LC circuit can reach more than 100V. The first occurrence of RF triggers a power-on reset pulse,
ensuring a defined start-up state.
4.3.3
Read
Reading is the default mode after power-on reset. It is done by switching a load between the coil pads on and off. This
changes the current through the IC coil, which can be detected from the reader unit.
4.3.4
Start-up
The many different modes of the Atmel e5551 are activated after the first readout of block 0. The modulation is off while
block 0 is read. After this set-up time of 256 field clock periods, modulation with the selected mode starts. Any field gap
during this initialization will restart the complete sequence.
4.3.5
Read Datastream
The first block transmitted is block 1. When the last block is reached, reading restarts with block 1. Block 0, which contains
mode data, is normally never transmitted. However, the mode register is continuously refreshed with the contents of
EEPROM block 0.
Figure 4-7. Application Circuit
Reader coil
Tuned LC
Energy
IAC
125kHz
e5551
Data
Figure 4-8. Voltage at Coil1/Coil2 after Power-on
Damping on
Damping off
VCoil 1 - Coil2
≤ 2ms
Power-on
Reset
Loading block 0 (256 FC ≈ 2ms)
* FC → Field clocks
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Read data with configured
modulation and bitrate
Figure 4-9. Terminators
Bit Period
Block Terminator
Data Bit ”1”
Block
Last Bit
First Bit
Sequence Terminator
Data Bit ”1”
Data Bit ”1”
Last Bit
Sequence
First Bit
VCoil 1 - Coil2
Waveform for Different
Modulations
First Bit ”0” or ”1”
Manchester
FSK
FSK
Terminator not suitable for Biphase Modulation
Figure 4-10. Read Data Streams and Terminators
ST
BT
off
off
0
Block 1
Block 2
Loading Block 0
on
off
0
Block 7
on
Block 1
0
Block 2
Sequence Terminator
Block 2
Block 7
Loading Block 0
off
Block 1
Block 1
Block 2
Block Terminator
Block 1
Block 2
Block 7
Block 1
Block 2
Loading Block 0
on
on
0
Block 1
Block 2
Block 7
Block 1
Block 2
Loading Block 0
Figure 4-11. MAXBLK Examples
MAXBLK = 5
0
Block 1
Block 4
Block 5
Block 1
Block 2
Block 2
Block 1
Block 2
Block 1
Block 0
Block 0
Block 0
Block 0
Loading Block 0
MAXBLK = 2
0
Block 1
Loading Block 0
MAXBLK = 0
0
Block 0
Loading Block 0
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4.3.6
Maxblock Feature
If it is not necessary to read all user data blocks; the MAXBLK field in block 0 can be used to limit the number of blocks read.
For example, if MAXBLK = 5, the Atmel® e5551 repeatedly reads and transmits only blocks 1 to 5 (see Figure 4-10 on page
9). If MAXBLK is set to ‘0’, block 0 – which is normally not transmitted – can be read.
4.3.7
Terminators
The terminators are (optionally selectable) special damping patterns, which may be used to synchronize the reader. There
are two types available; a block terminator which precedes every block, and a sequence terminator which always follows the
last block.
The sequence terminator consists of two consecutive block terminators. The terminators may be individually enabled with
the mode bits ST (sequence terminator enable) or BT (block terminator enable).
Note:
4.3.8
It is not possible to include a sequence terminator in a transmission where MAXBLK = 0.
Direct Access
The direct access command allows the reading of an individual block by sending the OP-code (’10‘), the lock-bit and the 3-bit
address.
Note:
4.3.9
PWD has to be 0.
Modulation and Bitrate
There are two modulator stages in the Atmel e5551 (see Figure 4-3 on page 5) whose mode can be selected using the
appropriate bits in block 0 (MS1[1:0] and MS[2:0]). Also the bitrate can be selected using BR[2:0] in block 0. These options
are described in detail in Figure 4-23 on page 17 through Figure 4-26 on page 20.
4.3.10 Anticollision Mode
When the AOR bit is set, the IC does not start modulation after loading configuration block 0. It waits for a valid AOR data
stream (wake-up command) from the reader before modulation is enabled.
The wake-up command consists of the OP-code (’10‘) following by a valid password. The IC will remain active until the RF
field is turned off or a stop OP-code is received.
Table 4-1.
Atmel e5551 - Modes of Operation
PWD
AOR
STOP
Behavior of Tag after Reset/POR
Anticollision mode:
1
1
0
●
Modulation starts after wake-up with a
matching PWD
●
●
Programming needs valid PWD
STOP Function
STOP OP-code (’11‘) defeats
modulation until RF field is turned off
AOR allows programing with read
protection (no read after write)
Password mode:
1
0
0
1
0
●
●
●
●
0
●
0
x
10
0
0
0
1
●
●
●
Programming needs valid PWD
Modulation starts after wake-up command
Programming with modulation defeat
without previous wake-up possible
AOR allows programing with read
protection (no read after write)
Modulation starts after reset
Direct access command
Programming without password
See corresponding modes above
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Modulation starts after reset
STOP OP-code ignored, modulation
continues until RF field is turned off
Figure 4-12. Answer-on-request (AOR) Mode
Modulation on
VCoil 1 - Coil2
Loading Block 0
POR
No Modulation
(STOP = 0, AOR = 1)
OP-code (”10”) followed by valid Password
Figure 4-13. Anticollision Procedure
Base Station
TAG
Initialize tags with
AOR = ”1”, PWD = ”1” Stop ”0”
Field OFF → ON
Wait for tW > 2.5 ms
POWER ON RESET
read configuration
Wait for OPCODE + PWD
(== wake up command)
”Select single tag”
send OPCODE + PWD
(== wake up command)
Write damping
NO
PWD correct ?
YES
NO
Decode data
Send block 1 to MAXBLK
until STOP command
Send stop command
Enter AOR mode
Internal reset sequence
All tags read ?
YES
EXIT
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4.3.11 Writing Data into the Atmel ATA5551M-PPMY
Writing data into the IC occurs via the Atmel write method. It is based on interrupting the RF field with short gaps. The time
between two gaps encodes the ‘0/1’ information to be transmitted.
The write sequence of the Atmel® ATA5551M-PPMY is shown below. Writing data into the transponder occurs by
interrupting the RF field with short gaps. After the start gap the standard write OP code (10) is followed by the lock bit. The
next 32 bits contain the actual data. The last three bits denote the destination block address. If the correct number of bits
have been received, the actual data is programmed into the specified memory block.
Figure 4-14. Write Protocol
Standard OP-code
RF Field
Address bits (e.g. block 4)
32bit
1
0
0
Start gap
1
0
0
> 64 clocks
Lock bit
Read mode
Write mode
Figure 4-15. Signals during Writing
> 64 FCs = stop write
RF_Field
1
Start
0
1
1
0
Gap
Write Mode
Modulation during read mode
Damping
Load Off
Load On
Write Data
Data Clock
Field Clock
Read mode
Writing
Programming Read mode
The time elapsing between two detected gaps is used to encode the information. As soon as a gap is detected, a counter
starts counting the number of field clock cycles until the next gap is detected. Depending on how many field clocks elapse,
the data is regarded as “0” or “1”. The required number of field clocks is shown in Figure 4-16. A valid “0” is assumed if the
number of counted clock periods is between 16 and 32, for a valid “1” it is 48 or 64 respectively. Any other value being
detected results in an error, and the device exits write mode and returns to read mode.
Figure 4-16. Write Data Decoding Schemes
1
Write data decoder
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16
fail
32
0
48
fail
64
1
writing done
Figure 4-17. Atmel e5551 – OP-code Formats
OP
Standard Write
10 L
1
Data Bits
32 2
Addr
0
OP
Password Mode
10 1
Passwort
32
Passwort
32
L
1
Data Bits
32 2
Addr
0
OP
AOR (wake-up command)
10 1
OP
Direct Access
10 L
2
Addr
0
OP
Stop Command
11
4.3.12 Start Gap
The first gap is the start gap which triggers write mode. In write mode, the damping is permanently enabled which eases gap
detection. The start gap may need to be longer than subsequent gaps in order to be detected reliably.
A start gap will be detected at any time after block 0 has been read (field-on plus approximately 2 ms).
Figure 4-18. Start of Writing
Read mode
Write mode
RF
Start of writing
(start gap)
4.3.13 Decoder
The duration of the gaps is usually 50 to 150µs. The time between two gaps is nominally 24 field clocks for a ‘0’ and 56 field
clocks for a ‘1’. When there is no gap for more than 64 field clocks after previous gap, the IDIC exits write mode; it starts with
programming if the correct number of valid bits were received.
If there is a gap fail - i.e., one or more of the intervals did represent not a valid ‘0’ or ‘1’ - the IC does not program, but enters
read mode beginning with block 1, bit 1.
4.3.14 Writing Data into the Atmel e5551
The Atmel® e5551 expects a two bit OP-code first. There are two valid OP-codes (‘10’ and ‘11’). If the OP-code is invalid, the
Atmel e5551 starts read mode beginning with block 1 after the last gap. The OP-code (‘10’) is followed by different
information (see Figure 4-16 on page 12):
● Standard writing needs the OP-code, the lock bit, the 32 data bits and the 3-bit block address.
●
●
●
Note:
Writing with usePWD set requires a valid password between OP-code and address/data bits.
In AOR mode with usePWD, OP-code and a valid password are necessary to enable modulation.
The STOP OP-code is used to silence the e5551 (disable damping until power is cycled).
The data bits are read in the same order as written.
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4.3.15 STOP OP-Code
The STOP OP-code (‘11’) is used to stop modulation until a power-on reset occurs. This feature can be used to have a
steady RF field where single transponders are collected one by one. Each IC is read and than disabled, so that it does not
interfere with the next IC.
Note:
The STOP OP-code should contain only the two OP-code bits to disable the IC. Any additional data sent will
not be ignored, and the IC will not stop modulation.
Figure 4-19. OP-code Transmission
Standard OP-code
1
0
more data ...
Start gap
Stop OP-code
1
Read mode
1
> 64 clocks
Write mode
4.3.16 Password
When password mode is on (usePWD = 1), the first 32 bits after the OP-Code are regarded as the password. They are
compared bit-by-bit with the contents of block 7, starting at bit 1. If the comparison fails, the IC will not program the memory,
but restart in read mode at block 1 once writing has completed.
Notes:
●
If PWD is not set, but the IC receives a write datastream containing any 32 bits in place of a password, the IC will
enter programming mode.
●
In password mode, MAXBLK should be set to a value below 7 to prevent the password from being transmitted by the
Atmel® e5551.
●
Every transmission of 2 OP-code bits, 32 password bits, one lock bit, 32 data bits and 3 address bits (= 70 bits) needs
about 35 ms. Testing all 232 possible combinations (about 4.3 billion) takes about 40,000 h, or over four years. This is
a sufficient password protection for a general-purpose IDIC.
Figure 4-20. Programming
Writing done (> 64 clocks since last gap)
Write mode
Programming ends
Check VPP
16ms
0.12ms
Programming starts
(HV at EEPROMs
HV on
HV on for testing if VPP is ok
Reading starts
Modulation
Operation
14
Write
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VPP/Lock ok?
Program EEPROM
Read
Figure 4-21. Coil Voltage after Programming of Block 0
VCoil 1 - Coil 2
16ms
Read programming block
Programming
(= block 0)
Read next block
with updated modes
(e.g., new bitrate)
Write data into the IC
4.3.17 Programming
When all necessary information has been written to the Atmel® e5551, programming may proceed. There is a 32-clock delay
between the end of writing and the start of programming. During this time, Vpp - the EEPROM programming voltage - is
measured and the lock bit for the block to be programmed is examined. Further, Vpp is continually monitored throughout the
programming cycle. If at any time Vpp is too low, the chip enters read mode immediately.
The programming time is 16 ms.
After programming is done, the Atmel e5551 enters read mode, starting with the block just programmed. If either block or
sequence terminators are enabled, the block is preceded by a block terminator. If the mode register (block 0) has been
reprogrammed, the new mode will be activated after the just-programmed block has been transmitted using the previous
mode.
4.3.18 Error Handling
Several error conditions can be detected to ensure that only valid bits are programmed into the EEPROM. There are two
error types which lead to different actions.
4.3.19 Errors during Writing
There are four detectable errors which could occur during writing data into the Atmel e5551:
● Wrong number of field clocks between two gaps
●
●
●
The OP-code is neither the standard OP-code (‘10’) nor the stop OP-code (‘11’)
Password mode is active but the password does not match the contents of block 7
The number of bits received is incorrect; valid bit counts are
●
Standard write 38 bits (PWD not set)
●
Password write 70 bits (PWD set)
●
AOR wake-up 34 bits
●
Stop command 2 bits
If any of these four conditions are detected, the IC starts read mode immediately after leaving write mode. Reading starts
with block 1.
ATA5551M-PPMY [DATASHEET]
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15
4.3.20 Errors During Programming
If writing was successful, the following errors could prevent programming:
● The lock bit of the addressed block is set
●
VPP is too low
In these cases, programming stops immediately. The IC reverts to read mode, starting with the currently addressed block.
Figure 4-22. Functional Diagram of the Atmel e5551
Power-on reset
Loading
block 0
READ
addr = 1
Write mode
Stop
11
OP-code
ok
fail
10
Password
fail
ok
Number of bits
fail
ok
Lock bit
fail
ok
HV
fail
ok
PROGRAM
ok
16
ATA5551M-PPMY [DATASHEET]
9334B–RFID–05/14
fail
addr = current
RF-field
Inverted modulator
signal
Manchester coded
Data stream
1
12
8 FC
8
9
8 FC
16 1
Data rate =
50 Field Clocks (FC)
8
9
0
16
1
8
0
16 1
8
9
1
16
12
8
9
1
16 1
8
9
0
16
Figure 4-23. Example of Manchester Coding with Data Rate RF/16
ATA5551M-PPMY [DATASHEET]
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18
ATA5551M-PPMY [DATASHEET]
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RF-field
Inverted modulator
signal
Biphase coded
Data stream
1
12
8 FC
8
9
8 FC
16
Data rate =
50 Field Clocks (FC)
1
8 9
0
16
1
8
0
16
1
8
9
1
16
12
8
9
1
16
1
8 9
0
16
Figure 4-24. Example of Biphase Coding with Data Rate RF/16
RF-field
f1 = RF/5
f0 = RF/8
Inverted modulator
signal
Data stream
1
1 5
Data rate =
40 Field Clocks (FC)
1
8
0
1
8
0
1 5
1
1 5
1
1
8
0
Figure 4-25. Example of FSK Coding with Data Rate RF/40, Subcarrier
ATA5551M-PPMY [DATASHEET]
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20
ATA5551M-PPMY [DATASHEET]
9334B–RFID–05/14
RF-field
Subcarrier RF/2
Inverted modulator
signal
Data stream
12
8 FC
8 9
8 FC
16 1
Data rate =
16 Field Clocks (FC)
1
8
0
16 1
8
0
16 1
8
1
16 1
8
1
16 1
8
0
Figure 4-26. Example of PSK1 Coding with Data Rate RF/16
RF-field
subcarrier RF/2
Inverted
modulator signal
Data stream
1
12
8 FC
8 9
8 FC
16 1
Data rate =
16 Field Clocks (FC)
8
0
16 1
8
0
16 1
8
1
16 1
8
1
16 1
8
0
Figure 4-27. Example of PSK2 Coding with Data Rate RF/16
ATA5551M-PPMY [DATASHEET]
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21
22
ATA5551M-PPMY [DATASHEET]
9334B–RFID–05/14
RF-field
Inverted
modulator signal
subcarrier RF/2
Data stream
1
12
8 FC
8 9
8 FC
16 1
Data rate =
16 Field Clocks (FC)
8
0
16 1
8
0
16 1
8
1
16 1
8
1
16 1
8
0
Figure 4-28. Example of PSK3 Coding with Data Rate RF/16
4.4
Operating Characteristics e5551
Tamb = 25°C, f RF = 125kHz
Parameters
Test Conditions
Symbol
Programming time
Min.
tp
Startup time
Typ.
Data retention
Unit
18
tstartup
(1)
Max.
ms
4
tretention
ms
10
Years
(1)
Programming cycles
ncycle
100,000
Note:
1. Since EEPROM performance may be influenced by assembly and packaging, we can confirm the parameters for dow
(= die-on-wafer) and ICs assembled in standard package.
5.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability
Parameters
Symbol
Value
Unit
Operating temperature range
Tamb
–40 to +85
°C
Storage temperature range
Tstg
–40 to +125
°C
Assembly temperature t < 5 minutes
Tass
170
°C
Magnetic field strength at 125kHz
Hpp
1000
A/m
6.
Operating Characteristics: Transponder
Tamb = 25°C, f = 125kHz, unless otherwise specified
Parameters
Test Conditions
Inductance
Symbol
Min.
L
Typ.
Max.
4.0
Unit
Type*
mH
Q
LC Circuit
Resonance frequency
Room temperature
Quality factor
fr
120
125
130
kHz
T
QLC
31
Q
Hpp not
1.5
A/m
Q
Hpp 25
18
A/m
Q
Hpp
50
A/m
Q
A/m
Q
Magnetic Field Strength (H)
Maximum field strength where tag
does not modulate
Min. field strength for modulation
Min field strength for
programming
Maximum field strength
No influence to other tags in the
field
Hpp max
600
*) Type means: T: directly or indirectly tested during production; Q: based on initial product design
ATA5551M-PPMY [DATASHEET]
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23
7.
Measurement Assembly
All measurements are done with commercial RFID reader/writer supplied by “GIS”.
ATA5551M-PPMY
External
antenna
Figure 7-1. Testing Application
Reader
Reader type: TS-RW38 plus USB EA
Antenna type: TS-A50-K1000, circular antenna, inner diameter 51mm, L = 1.08mH
Supplier: GIS
8.
Actual Behavior of the Device
The Atmel® ATA5551M-PPMY detects a gap if the voltage across the coils decreases below the threshold value of an
internal MOS transistor. Until then, the clock pulses are counted. The number given for a valid “0” or “1” (see Figure 4-16 on
page 12) refers to the actual clock pulses counted by the device. However, there are always more clock pulses being
counted than were applied by the base station. The reason for this is the fact that an RF field cannot be switched off
immediately. The coil voltage decreases exponentially. So although the RF field coming from the base station is switched off,
it takes some time until the voltage across the coils reaches the threshold value of an internal MOS transistor and the device
detects the gap.
Referring to the following diagram (see Figure 8-1), this means that the device uses the times t0 internal and t1 internal. The exact
times for t0 and t1 are dependent on the application (e.g., field strength, etc.).
Measured write-time frames of the IDIC demo kit software are:
t0 = 50µs to 130µs
t1 = 270µs to 390µs
tgap = 180µs to 400µs
Antennas with a high Q-factor require longer times for tgap and shorter time values for t0 and t1.
Figure 8-1. Ideal and Real Behavior Signals
t1
Coil
voltage
tgap
1
t0
0
t1
1
Coil
voltage
1
tgap
t0
0
t1 internal
Gap detect
9.
1
t0 internal
Gap detect
Ideal behavior
Actual behavior
RF level reduces to zero immediately
RF level decreases exponentially
Operating Distance
The maximum distance between the base station and the Atmel ATA5551M-PPMY depends mainly on the reader station,
the coil geometries and the modulation options chosen. Under laboratory conditions, a distance of up to 9cm can be
reached. When using the Atmel RFID demo kit ATA2270-EK2, the typical distances in the range of 0cm to 5cm can be
achieved.
24
ATA5551M-PPMY [DATASHEET]
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10.
Ordering Information
10.1
Available Ordering Codes
ATA5551M-PPMY
10.2
Configuration on Delivery
In production the transponder is configured as shown in Table 10-1. All blocks are unlocked. Block 0 is the configuration
register and is pre-programmed to the Atmel default operating mode. Manchester modulation with a data rate of RF/32. 2
data blocks (block 1 and block 2) are transmitted. The data setting in all blocks are listed in Table 10-1.
Table 10-1. Configuration on Delivery
Block
Address
Value
Configuration
block 0
0x E608 8042
Use data block 1
block 1
0x 7EFF FFFF
Use data block 2
block 2
0x 7DFF FFFF
Use data block 3
block 3
0x 7BFF FFFF
Use data block 4
block 4
0x 77FF FFFF
Use data block 5
block 5
0x 6FFF FFFF
Use data block 6
block 6
0x 5FFF FFFF
Use data block 7
block 7
0x 3FFF FFFF
Comment
Manchester RF/32, Maxblock 2, disabled stop mode
ATA5551M-PPMY [DATASHEET]
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25
11.
Package Information
3±0.2
7°±0.2°
1.2±0.1
4.9±0.1
11.9±0.2
7°±0
.2°
4.2±0.1
7 °±
7°±
0.2
0.2
°
1±0.2x45°
5.7±0.1
technical drawings
according to DIN
specifications
°
Dimensions in mm
11/11/13
TITLE
Package Drawing Contact:
packagedrawings@atmel.com
26
Package: Transponder
ATA5551M-PPMY [DATASHEET]
9334B–RFID–05/14
GPC
DRAWING NO.
REV.
6.549-5041.01-4
1
12.
Revision History
Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this
document.
Revision No.
9334B-RFID-05/14
History
Section 6 “Operating Characteristics: Transponder” on page 23 updated
Section 7 “Measurement Assembly” on page 24 updated
ATA5551M-PPMY [DATASHEET]
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27
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© 2014 Atmel Corporation. / Rev.: 9334B–RFID–05/14
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