AT24HC02B/04B Automotive - Complete

AT24HC02B and AT24HC04B
2-wire Automotive Temperature Serial EEPROM
2K (256 x 8) and 4K (512 x 8)
DATASHEET
Features

Write Protect Pin for Hardware Data Protection
̶
Utilizes Different Array Protection Compared to the AT24C02B/04B

Medium-voltage and Standard-voltage Operation

Automotive Temperature Range -40C to 125C
Internally Organized 256 x 8 (2K) or 512 x 8 (4K)
2-Wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
400kHz (2.5V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page (2K) or 16-byte Page (4K) Write Modes
Partial Page Writes are Allowed
Self-timed Write Cycle (5ms max)
High-reliability
̶










̶
2.5V (VCC = 2.5V to 5.5V)
̶

Endurance: 1,000,000 Write Cycles
Data Retention: 100 Years
8-lead JEDEC SOIC and 8-lead TSSOP Packages
Description
The Atmel® AT24HC02B/04B provides 2,048/4,096 bits of Serial Electrically
Erasable and Programmable Read-Only Memory (EEPROM) organized as
256/512 words of 8 bits each. The device is optimized for use in many automotive
applications where low-power and low-voltage operation are essential. The
AT24HC02B/04B is available in space-saving 8-lead JEDEC SOIC and 8-lead
TSSOP packages and is accessed via a 2-wire serial interface. In addition, the
entire family operates at voltages from 2.5V to 5.5V.
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
1.
Pin Configurations and Pinouts
Table 1-1.
Pin Name
2.
Pin Configurations
Function
A0  A2
Address Inputs
GND
Ground
VCC
Power Supply
SDA
Serial Data
SCL
Serial Clock Input
WP
Write Protect
8-lead TSSOP
(Top View)
(Top View)
A0
1
8
VCC
A1
2
7
WP
A0
A1
A2
GND
A2
3
6
SCL
GND
4
5
SDA
Note:
Drawings are not to scale.
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
Absolute Maximum Ratings
Operating Temperature  55C to +125C
Storage Temperature 65C to +150C
Voltage on Any Pin
with Respect to Ground 1.0V to +7.0V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mA
2
8-lead SOIC
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
*Notice: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Block Diagram
Figure 3-1.
Block Diagram
VCC
GND
WP
Start
Stop
Logic
SCL
SDA
Serial
Control
Logic
LOAD
Device
Address
Comparator
A2
A1
A0
R/W
EN
H.V. Pump/Timing
COMP
LOAD
Data Word
ADDR/Counter
Y DEC
Data Recovery
INC
X DEC
3.
EEPROM
Serial MUX
DOUT/ACK
Logic
DIN
DOUT
AT24HC02B/04B Automotive [DATASHEET]
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3
4.
Pin Descriptions
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative
edge clock data out of each device.
Serial Data (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open-collector devices.
Device/Page Addresses (A2, A1, and A0): The A2, A1, and A0 pins are device address inputs that are hard
wired for the AT24HC02B. As many as eight 2K devices may be addressed on a single bus system (see
Section 7., “Device Addressing”).
The AT24HC04B uses the A2 and A1 inputs for hardware addressing, and a total of four 4K devices may be
addressed on a single bus system. The A0 pin is a no connect.
Write Protect (WP): The AT24HC02B/04B have a Write Protect pin that provides hardware data protection.
The Write Protect pin allows normal Read/Write operations when connected to Ground (GND). When the Write
Protect pin is connected to VCC, the write protection feature is enabled and operates as shown in the following
table.
Table 4-1.
4
Write Protect
WP Pin Status
Part of the Array Protected
At VCC
Upper Half (1K/2K) Array
At GND
Normal Read/Write Operations
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
5.
Memory Organization
AT24HC02B, 2K Serial EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K requires an 8-bit
data word address for random word addressing.
AT24HC04B, 4K Serial EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K requires an 9-bit
data word address for random word addressing.
5.1
Pin Capacitance
Table 5-1.
Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0MHz, VCC = +2.5V.
Symbol
Test Condition
CI/O
CIN
Note:
5.2
1.
Max
Units
Conditions
Input/Output Capacitance (SDA)
8
pF
VI/O = 0V
Input Capacitance (A0, A1, A2, SCL)
6
pF
VIN = 0V
This parameter is characterized and is not 100% tested.
DC Characteristics
Table 5-2.
DC Characteristics
Applicable over recommended operating range from: TA = -40°C to +125°C, VCC = +2.5V to +5.5V (unless otherwise noted).
Symbol
Parameter
Test Condition
VCC1
Supply Voltage
ICC
Supply Current VCC = 5.0V
Read at 100kHz
ICC
Supply Current VCC = 5.0V
ISB1
Max
Units
5.5
V
0.4
1.0
mA
Write at 100kHz
2.0
3.0
mA
Standby Current VCC = 2.5V
VIN = VCC or VSS
1.6
4.0
μA
ISB2
Standby Current VCC = 5.0V
VIN = VCC or VSS
8.0
18.0
μA
ILI
Input Leakage Current
VIN = VCC or VSS
0.10
3.0
μA
ILO
Output Leakage Current
VOUT = VCC or VSS
0.05
3.0
μA
0.6
VCC x 0.3
V
VCC x 0.7
VCC + 0.5
V
0.4
V
(1)
Input Low Level
VIH
Input High Level(1)
VOL
Output Low Level VCC = 2.5V
1.
Typ
2.5
VIL
Note:
Min
IOL = 3.0mA
VIL min and VIH max are reference only and are not tested.
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
5
5.3
AC Characteristics
Table 5-3.
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +125°C, VCC = +2.5V to +5.5V, CL = 1 TTL Gate and
100pF (unless otherwise noted).
Symbol
Parameter
fSCL
Clock Frequency, SCL
tLOW
Clock Pulse Width Low
1.2
μs
tHIGH
Clock Pulse Width High
0.6
μs
tI
Noise Suppression Time(1)
tAA
Clock Low to Data Out Valid
0.1
(2)
Max
Units
400
kHz
50
ns
0.9
μs
tBUF
Time the bus must be free before a new transmission can start.
1.2
μs
tHD.STA
Start Hold Time
0.6
μs
tSU.STA
Start Set-up Time
0.6
μs
tHD.DAT
Data In Hold Time
0
μs
tSU.DAT
Data In Set-up Time
100
ns
tR
Inputs Rise Time(2)
300
ns
tF
Inputs Fall Time(2)
300
ns
tSU.STO
Stop Set-up Time
0.6
μs
tDH
Data Out Hold Time
50
ns
tWR
Write Cycle Time
Endurance(2)
5.0V, 25C, Page Mode
Notes:
6
Min
1.
2.
This parameter is characterized and is not 100% tested (TA = 25C).
This parameter is ensured by characterization only.
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
5
1,000,000
ms
Write Cycles
6.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin
may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or
Stop condition as defined below.
Figure 6-1.
Data Validity
SDA
SCL
Data Stable
Data Stable
Data
Change
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any
other command.
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the
Stop command will place the EEPROM in a standby power mode.
Figure 6-2.
Start and Stop Definition
SDA
SCL
Start
Stop
AT24HC02B/04B Automotive [DATASHEET]
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7
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock
cycle.
Figure 6-3.
Output Acknowledge
1
SCL
8
9
Data In
Data Out
Acknowledge
Start
Standby Mode: The AT24HC02B/04B features a low-power standby mode which is enabled:


Upon power-up.
After the receipt of the Stop condition and the completion of any internal operations.
Software Reset: After an interruption in protocol, power loss or system reset, any 2-Wire part can be protocol
reset by following these steps:



Create a Start condition,
Clock nine cycles, and
Create another Start condition followed by Stop condition.
The device is ready for the next communication after above steps have been completed.
Figure 6-4.
Software Reset Protocol
Dummy Clock Cycles
SCL
1
2
Start
Condition
SDA
8
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
3
8
9
Start
Condition
Stop
Condition
Figure 6-5.
Bus Timing: SCL — Serial Clock, SDA: Serial Data I/O
tHIGH
tF
tR
tLOW
tLOW
SCL
tSU.STA
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
SDA In
tAA
tDH
tBUF
SDA Out
Figure 6-6.
Write Cycle Timing: SCL – Serial Clock, SDA – Serial Data I/O
8th bit
ACK
WORDn
tWR(1)
Stop
Condition
Note:
1.
Start
Condition
The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal
clear/write cycle.
AT24HC02B/04B Automotive [DATASHEET]
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7.
Device Addressing
The 2Kand 4K EEPROM devices all require an 8-bit device address word following a Start condition to enable
the device for a Read or Write operation.
The device address word consists of a mandatory one, zero sequence for the first four most significant bits as
shown. This is common to all the Serial EEPROM devices.
The next three bits are the A2, A1, and A0 device address bits for the 2K EEPROM. These three bits must
compare to their corresponding hardwired input pins.
The 4K EEPROM only uses the A2 and A1 device address bits with the third bit being a memory address bit.
The two device address bits must compare to their corresponding hardwired input pins. The A0 pin is no
connect.
The eighth bit of the device address is the Read/Write operation select bit. A Read operation is initiated if this bit
is high and a Write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the device
will return to a standby state.
Figure 7-1.
2K
1
Device Address
0
1
0
A2
A1
A0
MSB
4K
1
LSB
0
1
0
A2
A1
P0
MSB
10
R/W
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
R/W
LSB
8.
Write Operations
Byte Write: A Write operation requires an 8-bit data word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in
the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the
addressing device, such as a microcontroller, must terminate the Write sequence with a Stop condition. At this
time, the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled
during this write cycle and the EEPROM will not respond until the Write is complete.
Figure 8-1.
Byte Write
S
T
A
R
T
W
R
I
T
E
Device
Address
Word Address
S
T
O
P
Data
SDA LINE
M
S
B
L R AM
S / C S
BW K B
A
C
K
L A
SC
BK
Page Write: The 2K EEPROM is capable of an 8-byte Page Write, and the 4K EEPROM device is capable of
16-byte Page Writes.
A Page Write is initiated the same as a Byte Write, but the microcontroller does not send a Stop condition after
the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the
microcontroller can transmit up to seven (2K) or fifteen (4K) more data words. The EEPROM will respond with a
zero after each data word received. The microcontroller must terminate the Page Write sequence with a Stop
condition.
The data word address lower three bits (2K) or four (4K) are internally incremented following the receipt of each
data word. The higher data word address bits are not incremented, retaining the memory page row location.
When the word address, internally generated, reaches the page boundary, the following byte is placed at the
beginning of the same page. If more than eight (2K) or sixteen (4K) data words are transmitted to the EEPROM,
the data word address will roll-over and previous data will be overwritten.
Figure 8-2.
Page Write
S
T
A
R
T
Device
Address
W
R
I
T
E
Word Address (n)
Data (n + 1)
Data (n)
S
T
O
P
Data (n + x)
SDA Line
M
S
B
L R A
S / C
BWK
A
C
K
A
C
K
A
C
K
A
C
K
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address
word. The Read/Write bit is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero, allowing the Read or Write sequence to continue.
AT24HC02B/04B Automotive [DATASHEET]
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9.
Read Operations
Read operations are initiated the same way as Write operations with the exception that the Read/Write select bit
in the device address word is set to one. There are three read operations:



Current Address Read
Random Address Read
Sequential Read
Current Address Read: The internal data word address counter maintains the last address accessed during
the last Read or Write operation, incremented by one. This address stays valid between operations as long as
the device power is maintained. The address roll-over during read is from the last byte of the last memory page
to the first byte of the first page. The address roll-over during write is from the last byte of the current page to the
first byte of the same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the
EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an
input zero but does generate a following Stop condition.
Figure 9-1.
Current Address Read
S
T
A
R
T
Device
Address
R
E
A
D
S
T
O
P
Data
SDA Line
M
S
B
N
O
L R A
S / C
B WK
A
C
K
Random Read: A random Read requires a “dummy” Byte Write sequence to load in the data word address.
Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the
microcontroller must generate another Start condition. The microcontroller now initiates a current address read
by sending a device address with the read/write select bit high. The EEPROM acknowledges the device
address and serially clocks out the data word. The microcontroller does not respond with a zero but does
generate a following Stop condition.
Figure 9-2.
Random Read
S
T
A
R
T
Device
Address
W
R
I
T
E
S
T
A
R
T
Word
Address n
R
E
A
D
Device
Address
S
T
O
P
Data n
SDA Line
M
S
B
LR A M
S / C S
BW K B
Dummy Write
12
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
L A
SC
B K
M
S
B
L
S
B
A
C
K
N
O
A
C
K
Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Address
Read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM
receives an acknowledge, it will continue to increment the data word address and serially clock out sequential
data words. When the memory address limit is reached, the data word address will roll-over and the Sequential
Read will continue. The Sequential Read operation is terminated when the microcontroller does not respond
with a zero but does generate a following Stop condition.
Figure 9-3.
Sequential Read
Device
Address
R
E
A
D
Data (n)
A
C
K
Data (n + 1)
A
C
K
Data (n + 2)
A
C
K
S
T
O
P
Data (n + x)
SDA Line
R A
/ C
WK
10.
N
O
A
C
K
Power Recommendation
The device internal POR (Power-On Reset) threshold is just below the minimum operating voltage of the device.
Power shall rise monotonically from 0.0Vdc to full VCC in less than 1ms. Hold at full VCC for at least 100μs before
the first operation. Power shall drop from full VCC to 0.0Vdc in less than 1ms. Power dropping to a non-zero level
and then slowly going to zero is not recommended. Power shall remain off (0.0Vdc) for 0.5s minimum. Please
consult Atmel if your power conditions do not meet the above recommendations.
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
13
11.
Ordering Code Detail
AT 2 4 H C 0 2 B N - S P 2 5 - B
Atmel Designator
Product Family
24HC = 2-Wire Compatible
Serial EEPROM with
Half Array Protection
Shipping Carrier Option
B or Blank = Bulk (Tubes)
T = Tape and Reel
Operating Voltage
25 = 2.5V to 5.5V
Device Density
02 = 2 kilobit
04 = 4 kilobit
Device Revision
14
Package Device Grade
P = NiPdAu Lead Finish
Automotive Temperature Range
(-40°C to +125°C)
Package Variation
Package Option
(Package Type Dependant)
N = 0.150” width SOIC
S = JEDEC SOIC
T = TSSOP
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
12.
Product Markings
AT24HC02B & AT24HC04B: Automotive Package Marking Information
8-lead TSSOP
8-lead SOIC
ATMLPYWW
### %
AAAAAAAA
PYWW
### %
Note: Lot Number and location of assembly
and on the bottom side of the package.
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT24HC02B
Truncation Code ###: H2B
AT24HC04B
Truncation Code ###: H4B
Date Codes
Y = Year
4: 2014
5: 2015
6: 2016
7: 2017
Voltages
8: 2018
9: 2019
0: 2020
1: 2021
M = Month
A: January
B: February
...
L: December
WW = Work Week of Assembly
02: Week 2
04: Week 4
...
52: Week 52
Country of Assembly
Lot Number
@ = Country of Assembly
AAA...A = Atmel Wafer Lot Number
Trace Code
% = Minimum Voltage
2: 2.5V min
Grade/Lead Finish Material
P: Automotive/NiPdAu
Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code)
Example: AA, AB.... YZ, ZZ
AT: Atmel
ATM: Atmel
ATML: Atmel
4/25/14
TITLE
Package Mark Contact:
[email protected]
24HC02-04BAM, AT24HC02B & AT24HC04B Automotive
Package Marking Information
DRAWING NO.
REV.
24HC02-04BAM
A
AT24HC02B/04B Automotive [DATASHEET]
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13.
Ordering Code Information
Atmel Ordering Code
Lead Finish
Package
AT24HC02BN-SP25-B(1)
AT24HC02BN-SP25-T(2)
(1)
AT24HC02B-TP25-B
AT24HC04B-TP25-B
1.
2.
Automotive Temperature
(40C to 125C)
2.5V to 5.5V
Automotive Temperature
(40C to 125C)
8S1
NiPdAu Lead Finish
(Lead-free/Halogen-free)
AT24HC04B-TP25-T(2)
Notes:
2.5V to 5.5V
8X
AT24HC04BN-SP25-B(1)
(1)
Operation Range
8S1
NiPdAu Lead Finish
(Lead-free/Halogen-free)
AT24HC02B-TP25-T(2)
AT24HC04BN-SP25-T(2)
Voltage
8X
B = Bulk.
T = Tape and reel:

SOIC = 4,000 per reel.

TSSOP = 5,000 per reel.
Package Type
16
8S1
8-lead, 0.150" wide body, Plastic Gull Wing Small Outline (JEDEC SOIC)
8X
8-lead, 4.4mm body, Plastic Thin Shrink Small Outline Package (TSSOP)
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
14.
Packaging Information
14.1
8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
A1
D
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
SYMBOL MIN
A
1.35
NOM
MAX
–
1.75
A1
0.10
–
0.25
b
0.31
–
0.51
C
0.17
–
0.25
D
4.80
–
5.05
E1
3.81
–
3.99
E
5.79
–
6.20
e
NOTE
1.27 BSC
L
0.40
–
1.27
Ø
0°
–
8°
6/22/11
Package Drawing Contact:
[email protected]
TITLE
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
GPC
SWB
DRAWING NO.
REV.
8S1
G
AT24HC02B/04B Automotive [DATASHEET]
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17
14.2
8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
N
L
Top View
End View
A
b
A1
e
D
SYMBOL
Side View
Notes:
COMMON DIMENSIONS
(Unit of Measure = mm)
A2
1. This drawing is for general information only.
Refer to JEDEC Drawing MO-153, Variation AA, for proper
dimensions, tolerances, datums, etc.
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.08mm total in excess
of the b dimension at maximum material condition. Dambar
cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
MIN
NOM
MAX
A
-
-
1.20
A1
0.05
-
0.15
A2
0.80
1.00
1.05
D
2.90
3.00
3.10
2, 5
E
NOTE
6.40 BSC
E1
4.30
4.40
4.50
3, 5
b
0.19
0.25
0.30
4
e
L
0.65 BSC
0.45
L1
C
0.60
0.75
1.00 REF
0.09
-
0.20
2/27/14
TITLE
Package Drawing Contact:
[email protected]
18
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
GPC
TNR
DRAWING NO.
8X
REV.
E
15.
Revision History
Doc. Rev.
Date
Comments
5192D
08/2014
Added power recommendation, part markings, and ordering code detail. Updated
template, logos, and disclaimer page. No changes to functional specification.
5192C
01/2009
Removed Preliminary status.
5192B
03/2008
5192A
01/2007
Added information for AT24HC04B.
Updated to new template.
Initial document release.
AT24HC02B/04B Automotive [DATASHEET]
Atmel-5192D-SEEPROM-AT24HC02B-04B-Auto-Datasheet_082014
19
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