ATAVRFBKIT / EVLB001 Dimmable Fluorescent Ballast ............................................................................................................................... User Guide Section 1 Introduction ........................................................................................... 1-1 1.1 1.2 General Description ..................................................................................1-3 Ballast Demonstrator Features .................................................................1-3 Section 2 Ballast Demonstrator Device Features ................................................. 2-4 2.1 2.2 Atmel Supported Products ........................................................................2-4 IXYS® Supported Products .......................................................................2-4 Section 3 Microcontroller Port Pin Assignments ................................................... 3-6 Section 4 Ballast Demonstrator Operation ........................................................... 4-7 4.1 4.2 4.3 4.4 4.5 General Requirements ..............................................................................4-7 Startup features ........................................................................................4-7 Circuit Topology ........................................................................................4-8 Startup and PFC Description ....................................................................4-8 Lamp Operation Description ...................................................................4-10 Section 5 Device Design & Application............................................................... 5-13 5.1 5.2 5.3 5.4 5.5 5.6 Magnetics................................................................................................5-13 IXYS IXTP02N50D depletion mode Mosfet Used As Current Source ....5-13 IXYS IXD611 Half- bridge MOSFET driver .............................................5-13 IXYS IXI859 Charge Pump Regulator.....................................................5-14 IXYS IXTP3N50P PolarHVTM N-Channel Power MOSFET ...................5-15 Clare LDA111S Optocoupler...................................................................5-15 Section 6 ATPWMX Demonstrator Software ...................................................... 6-16 6.1 6.2 6.3 Main_pwmx_fluo_demo.c .......................................................................6-18 Pfc_ctrl.c .................................................................................................6-19 Lamp_ctrl.c .............................................................................................6-22 Section 7 Conclusion .......................................................................................... 7-25 7.1 7.2 7.3 7.4 7.5 ATAVRFBKIT / EVLB001 User Guide Appendix 1: SWITCH DIM ......................................................................7-25 Appendix 2: Capacitor Coupled Low Voltage Supply..............................7-26 Appendix 3: PFC Basics .........................................................................7-27 Appendix 4: Bill Of Material.....................................................................7-28 Appendix 5: Schematics..........................................................................7-31 1 7597B–AVR–10/07 Section 1 Introduction Efficient fluorescent lamps and magnetic ballasts have been the standard lighting fixture in commercial and industrial lighting for many years. Several lamp types, rapid start, high output, and others are available for cost effective and special applications. But incandescent lamps, in spite of the poor light to power ratio, typically one fourth of fluorescent, offer one feature - dimming - that hasn’t been available in fluorescent lamps until now. Dimming allows the user to conserve electrical power under natural ambient light or create effects to enhance mood or image presentation and projection for example. Typical rapid start fluorescent lamps have two pins at each end with a filament across the pins. The lamp has argon gas under low pressure and a small amount of mercury in the phosphor coated glass tube. As an AC voltage is applied at each end and the filaments are heated, electrons are driven off the filaments that collide with mercury atoms in the gas mixture. A mercury electron reaches a higher energy level then falls back to a normal state releasing a photon of ultraviolet (UV) wavelength. This photon collides with both argon assisting ionization and the phosphor coated glass tube. High voltage and UV photons ionize the argon, increasing gas conduction and releasing more UV photons. UV photons collide with the phosphor atoms increasing their electron energy state and releasing heat. Phosphor electron state decreases and releases a visible light photon. Different phosphor and gas materials can modify some of the lamp characteristics. ATAVRFBKIT / EVLB001 User Guide 1-1 7597B–AVR–10/07 Introduction Figure 1-1. Fluorescent Tube Composition Since the argon conductivity increases and resistance across the lamp ends decreases as the gas becomes excited, an inductance (ballast) must be used to limit and control the gas current. In the past, an inductor could be designed to limit the current for a narrow range of power voltage and frequency. A better method to control gas current is to vary an inductor’s volt-seconds to achieve the desired lamp current and intensity. A variable frequency inverter operating from a DC bus can do this. If the inductor is part of an R-L-C circuit, rapid start ignition currents, maximum intensity, and dimming currents are easily controlled depending on the driving frequency versus resonant frequency. A ballast should include a power factor corrector (PFC) to keep the main current and voltage in phase with a very low distortion over a wide range of 90 to 265 VAC 50/60 Hz. With microcontroller control, economical remote analog or digital control of lamp function and fault reporting are a reality. Moreover, adjusting the lamp power to correspond with human perceived light level is possible. An application specific microcontroller brings the designer the flexibility to increase performance and add features to the lighting product. Some of the possible features are described here in detail. The final design topology is shown in the block diagram of Figure 2-1. Now, a new way of dimming fluorescent lamps fills the incandescent/fluorescent feature gap plus adds many additional desirable features at a very reasonable cost. ATAVRFBKIT / EVLB001 User Guide 1-2 7597B–AVR–10/07 Introduction 1.1 General Description Fluorescent ballast topology usually includes line conditioning for CE and UL compliance, a power factor correction block including a boost converter to 400 V for universal input applications and a half bridge inverter. By varying the frequency of the inverter, the controller will preheat the filaments (high frequency), then ignite the lamp (reducing the frequency). Once the lamp is lit, varying the frequency will dim the light. The Atmel AT90PWM2B/216 microcontroller can be programmed to perform all of these functions. Figure 1-2. Ballast Demonstrator Board 1.2 Ballast Demonstrator Features • Automatic microcontroller dimmable ballast • Universal input – 90 to 265 VAC 50/60 Hz, 90 to 370 VDC • Power Factor Corrected (PFC) boost regulator • Power feedback for stable operation over line voltage range • Variable frequency half bridge inverter • 18W, up to 2 type T8 lamps • Automatic dimmable single lamp operation • Automatic detection of Swiss or DALI • Very versatile power saving options with microcontroller design for most functions 1-3 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide Section 2 Ballast Demonstrator Device Features 2.1 Atmel Supported AT90PWM2B/216 Microcontroller Products • High speed comparator for PFC zero crossover detection • 6 Analog inputs for A/D conversion, 2.56V reference level • 3 Digital inputs used for the dimming control input • 3 High speed configurabel PWM outputs used for the PFC and half bridge driver • A fully differential A/D with programmable gain used for efficient current sensing • SOIC 24 pin package • Low power consumption in standby mode 2.2 IXYS® Supported Products IXI859 Charge pump with voltage regulator and MOSFET driver • 3.3V regulator with undervoltage lockout • Converts PFC energy to regulated 15VDC • Low propagation delay driver with 15V out and 3V input for PFC FET gate IXTP3N50P MOSFET • 500V, low RDS (ON) power MOSFET, 3 used in design IXTP02N50D depletion mode MOSFET • 500V, 200mA, normally ON, TO-220 package and configured as current source IXD611S MOSFET driver • Up to 600mA drive current • half bridge, high and low side driver in a single surface mount IC • Undervoltage lockout ATAVRFBKIT / EVLB001 User Guide 2-4 7597B–AVR–10/07 Ballast Demonstrator Device Features LDA111S Optocoupler (by Clare Inc., an IXYS company) • 100mA continuous load rating • 3750VRMS input to output isolation Figure 2-1. Ballast Demonstrator Block Diagram RESONATING INDUCTOR AND FILAMENT TRANSFORMER INVERTER PFC BOOST REGULATOR BALANCE TRANSFORMER AND LAMPS Q1 R35 IX859 15V Regulator 3.3V IXD611 R10 & R14 Driver 2 11 3 12 10 5 1 8 6 Q4 C9 R39 C14 Driver T4 7 RESONATING CAPACITOR D3 BULK CAPACITOR IXTP02N50D R9 & R13 15V IXTP3N50P D4 T1 POWER VOLTAGE UVLO DECOUPLING CAPACITOR PFC Inductor T3 11 2 3 10 5 6 7 C11 8 PFC Driver Q5 R2 D2 Q3 R28 R42 AT90PWMX PFC_ZCD Dimming Control DALI+ DALI- Isolated DALI SWITCH SWITCH V_BUS V_HAVERSINE DALI_TX DALI_RX SWITCH_CTRL V_LAMP I_LAMP 2-5 7597B–AVR–10/07 ACMP0/PD7 PSCOUT00/PD0 ADC5/PB2 PFC Output ADC4/PB7 TXD/DALI/PD3 RXD/DALI/PD4 ADC7/PB6 ADC3/PD6 PSCOUT20/PB0 AMP0+/PB4 PSCOUT21/PB1 AMP0-/PB3 Inverter High Inverter Low ATAVRFBKIT / EVLB001 User Guide Section 3 Microcontroller Port Pin Assignments ATAVRFBKIT / EVLB001 User Guide PD0 PCOUT00 PFC_OUTPUT - To IXI859 FET driver input PD1 PSCIN0 DUAL_LAMP - Dual lamp detection PD3 TXD/DALI DALI_TX - DALI transmit line PD4 RXD/DALI DALI_RX - DALI receive line PD5 ADC2 LAMP_EOL - Not supported in hardware nor software PD6 ADC3 V_LAMP - Rectified lamp voltage sense, missing lamp, open or shorted filament, preheat, ignition & run. PD7 ACMP0 PFC_ZCD - Comparator for PFC zero current crossing sense PB0 PSCOUT20 INVERTER_L - Low side half bridge driver output PB1 PSCOUT21 INVERTER_H - High side half bridge driver output PB2 ADC5 V_BUS - 400VDC bus voltage sense for regulation. PB3 AMP0- GND - Diff amp - A/D, 1 ohm bus current shunt resistor PB4 AMP0+ I_LAMP - Diff amp + A/D PB5 ADC6 TEMPERATURE - Ambient temperature in lamp housing PB6 ADC7 SWITCH_CTRL - SWITCH Control input PB7 ADC4 V_HAVERSINE - Haversine input sense. PE0 RST# RESET - Reset pin for zero crossing detector PE1 PE1 XTAL1 PE2 ADC0 XTAL2 3-6 7597B–AVR–10/07 Section 4 Ballast Demonstrator Operation 4.1 General Requirements • Constant power as determined by DALI or Switch Control 400 volt DC bus as provided by a power factor correcting boost regulator (PFC) 100% to 2% dimming setting • One or two lamps, type T8 of 18W Ballast to compensate automatically Hardware is capable of up to 40W per lamp • Line voltage of 90 to 265 VAC, 50 or 60 Hz • Control method DALI power control – auto recognition of control means One touch “Switch” dimming100% ON after ignition then dim to the last or current programmed value, if any. 4.2 Startup features Software based features that are not fully implemented. End users are invited to develop features based on the following characteristics. •Auto re-strike -Missing lamp detection allows a default power of 100% on the remaining lamp with no dimming. -Open filament detection for one or two lamps as determined by combination of 400VDC current plus lamp voltage prior to ignition. -On board physical jumper to set for one or two lamp normal operation. •Shorted filament -Detection by voltage sense across lamp during preheat. 400VDC current monitor detects over current limit upon startup. The microcontroller will sense the expected DC current to the half bridge and resonant circuit relative to the drive frequency. ATAVRFBKIT / EVLB001 User Guide 4-7 7597B–AVR–10/07 Ballast Demonstrator Operation 4.3 Circuit Topology Input filter with varistor for noise suppression and protection. PFC / boost circuit including IXI859 MOSFET driver AT90PWM2B/216 microcontroller 24 pin SOIC half bridge driver half bridge power MOSFET stage for up to 2 lamps Voltage driven filaments for wider lamp variety and better stability under all conditions 400VDC bus voltage after the PFC boost 4.4 Startup and PFC Description Upon application of main power, the microcontroller does not drive the PFC MOSFET Q3. The C9 capacitor is charged to the peak line voltage. The depletion FET Q1 and the Zener Diode provide a DC voltage with enough current to supply the control portion of the ballast. As soon as the microcontroller requests the ballast to start, the PFC is enabled according to the following sequence. The microcontroller checks that the DC bus voltage is 90% of the haversine peak and the under voltage lockout (UVLO) requirements are met, then a series of fixed width soft-start pulses are sent to the PFC MOSFET (Q3) at 10 µS at a 20 kHz rate. At very low load currents the bus voltage should rise to 400V. If the bus rises to 415 VDC all PFC pulses stop. As the 400V drops, the zero crossing detector PD7 starts to sense a zero crossing from the PFC transformer secondary. A 400V DC bus and a zero crossing event start the PFC control loop. Checks are made to detect the presence of the rectified power (haversine) and bus voltage throughout normal operation. Main supply voltage senses at PB7 < 0.848 (90 VAC) or > 2.497 (265 VAC) peak faults the PFC to off, turns off the PFC MOSFET (Q3) and initiates a restart. Main Supply Voltage Actual switching frequency is higher than shown Ipeak = Vin x Ton / L Ioff Ion Imean = Ipeak/2 PFC DRIVING The control consists of measuring the error between VBUS and 400V (2.39V at PB2) to determine the PFC drive pulse width (PW). The PW is proportional to the error, and has to be constant over a complete half period. The update is done each time the haversine reaches zero. ATAVRFBKIT / EVLB001 User Guide 4-8 7597B–AVR–10/07 Ballast Demonstrator Operation The maximum current the PFC MOSFET (Q3) can sustain is 4.5A. The relation between PW and the peak current in PFC MOSFET (Q3) is: PW = t = L x Ipk / Vhaversine_max With L at 700µH and Ipk at 4.5A, PWmax = 8.5µS at high line (265 Vrms). With L at 700µH and Ipk at 4.5A, PWmax = 24.7µS at high line (90 Vrms). This also effectively limits the FET dissipation under upset conditions. Under normal operation, a pulse width maximum of 25µS is allowed for a maximum bus voltage error with the high line limitation. Regulation of 1% of the VBUS is achieved with this control scheme. After the PFC FET ON pulse, the PFC inductor flyback boosts the voltage through the PFC diode to the bulk filter capacitor. The boost current decays as measured by the inductor secondary. After the current goes to zero, the next pulse is started. This ensures operation in a critical conduction boost mode. The current zero crossing detection of PD7 sets the PFC off time. This off time is effectively proportional to the haversine amplitude with the lowest PFC frequency occurring at the haversine crest and the highest frequency at the haversine zero. Because of the haversine voltage and di=v*dt/L, the mains current envelope should follow the voltage for near unity power factor. This assumes a nearly constant error (di) of the DC bus over each haversine period. The PFC ON time is modified proportionally to the error between 400V and the actual value of the bus. In case the Vbus reaches the overshoot value of 415V the pulse is reduced to 0. This control loop will determine the regulation response to ripple current on the 400V bulk filter cap and the loads for a specific application design requirements. 4.4.1 System Sequential Step Description Main voltage applied. Undervoltage lockout (UVLO) released. IXI859 voltage regulator supplies 3.3V to microcontroller. Power microcontroller ON in low current standby mode. Disable half bridge drive output PB0 & PB1 Disable PD5 comparator (Not implemented). PB7, scaled haversine voltage must be >0.848 Vmin (90VAC) & <2.497 (265VAC) Vmax (haversine peak) for the PFC to start. PD0 soft start PFC with 10µS pulses at 50µS period for 800µS. Monitor comparator at PD7 for change 1 to 0 indicating a zero crossing of the PFC inductor secondary voltage. This occurs after the 10µS start pulse burst. If no PD7 change and after 800µS halt PD0, wait 1 second and provide again PD0 with 10µS pulses for 800µS. Try 10 times and if no crossing, set PFC alarm. After PD7 comparator transition and 400VDC (2.368V at PB2), enable PFC control loop. -Adjust PB2 (400VDC sense) setpoint to 2.368V with deadband. -If PB2 > 2.50V then inhibit PD0 pulse. -If PB2 = < 2.368V then use the control loop to establish the PD0 PFC pulse width. 4-9 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide Ballast Demonstrator Operation Limit pulse width to 25uS or as determined by the haversine peak voltage. The adjustment of the PFC TON and TOFF is down as follows: - The TOFF is automatically adjusted by hardware at each PFC inductor current zero crossing detection, - The TON is adjusted by software accordingly to the Vout measurement each time the main supply voltage reach zero (Each half period of the main voltage supply).. 4.5 Lamp Operation Description T4 primary and C11 form a serial resonant circuit driven by the output half bridge. Since the output is between 400V and 0V, DC isolation is provided by C14 to drive the lamp circuit with AC. The lamp is conected in parallel of the resonating capacitor C11 (But there is no current through the lamp). The lamp filaments are driven by windings on T1 secondaries to about 3Vrms so that the resonating inductor current provides the starting lamp filament current. Initially, the system is set up at 80KHz, a frequency well above resonance the frequency then ramps down to 55 kHz for ignition. 80 kHz provides a lagging power factor where most of the drive voltage appears across the inductor. A smaller voltage appears across the resonating capacitor C11 and the lamps. However with 1 mH gapped inductance, there is sufficient inductor current to heat the filaments. For lamp ignition, the frequency is decreased from 80 kHz to 40 kHz with 30 kHz/sec slope towards resonance causing the lamp voltage to rise to about 340V peak. Ignition occurs at about 40 kHz for a 18W T8 lamp. The plasma established in the lamp presents a resistive load across the resonating capacitor thereby reducing the voltage across the capacitor and shifting the reactive power in the bridge circuit to resistive power in the lamp. A further reduction in frequency to 32 kHz at 30 kHz/sec establishes maximum brightness as the resonant circuit now has a leading (capacitive) power factor causing more voltage and current (approx. 360 Vpeak) across the capacitor and the lamp. Dimming is accomplished by raising the drive frequency towards 100 kHz. The lower lamp (capacitor) voltage caused by changing from a leading to a lagging (inductive) power factor and the resulting drop in lamp current causes lamp dimming. The visual perception of brightness is logarithmic with applied power and must be taken into account in the control method scheme. 4.5.1 Single Lamp Operation Not implemented. Single lamp operation can be detected from the 400VDC bus current through a 1 ohm sense resistor sensed by the differential input PB3/PB4. The AT90PWM2B/216 differential amplifier has the gain preset in the source code at 10. This scales the 200mV for two lamps to a reasonable A/D resolution. PB4 requires low pass filtering. Through the 1 ohm sense resistor R28, V = I*R = 80 Watts*1/400V = 200mA*1 = 200mV. At preheat, the current for one lamp is half of that for two lamps. This current is also used to sense open filament condition or lamp removed under power condition. An abrupt change in ATAVRFBKIT / EVLB001 User Guide 4-10 7597B–AVR–10/07 Ballast Demonstrator Operation the bus current is a good indicator of lamp condition that does not require a high frequency response or a minimal response due to reactive currents. Once the single lamp condition is detected, the minimum run frequency is determined by lamp current PB4 < 100mV. If the single lamp condition occurs while running, as noted by a decrease in current of more than 20% from the preset level, increase the frequency until the PB4 = 90mV. If the PB4 increases to 120mV, assume the lamp has been replaced by a new one. Increase the frequency to 80 kHz to restart the ignition process. This is necessary to preheat the new lamp filament to ensure that the hot lamp will not ignite sooner than the cold lamp, exceeding the balance transformer range. Start the ignition sequence. With one cold lamp in parallel with one hot lamp, it may be necessary to restart several times to get both lamps to ignite. Note that the lamp and resonant circuit use a common return ground separate from the rest of the circuit. The ballast demonstrator uses active power feedback of the sense voltage versus drive frequency to meet power objectives. Also note that the differential amplifier is connected across the current sense resistor R28 to ensure a Kelvin connection. Layout of the amplifier + and – is critical for fast noise free loop response. 4.5.2 Lamp Sequential Step Description After PB2 (boost voltage at 400V) >= 2.400V (acros R42) start preheat Enable PD6 rectified lamp voltage sense Enable PB0 and PB1 half bridge drive output PB0 & PB1 12.5µS total period (80 kHz) 50% duty 180° out of phase. Check PB4 > 20mV, then 2 lamps. If PB4 < 20mV, assume a single lamp. If PB4 < 10mV, assume an empty fixture = fault & shutdown. Determine the lamp intensity control method: DALI (presence of data stream at PD4), or Switch (presence of 50/60 Hz modulated at PB6). 4.5.3 Start and Ignition Sequential Step Description Sweep PB0 and PB1 frequency down at 30 kHz/sec or 33µS/sec rate. Stop sweep at 40 kHz or 25µS period (12.5µS pulses for each half bridge FET) Check PB4 > 100mV (2 lamps) or > 30mV (1 lamp) for proof of ignition. Hold ignition frequency for 10mS. If no PD6 voltage, collapse to < 200mV for proof of ignition, increase frequency to 77 kHz for preheat for 1 second. Repeat ignition sequence 6 times then if fails, set DALI fail flag or shut down. Disable if dimmed frequency > 60 kHz. Disable if single lamp. Proceed to power setting command at 30 kHz/sec rate as established by external control or if no internal control proceed to PB4 195mV at input terminals before gain (about 32 kHz) for 100% power. If Switch control, proceed to max power. A continuous pressing of this switch will cause a progressive increase of frequency at 33 kHz per second. The exception for a single lamp will be minimum frequency for 97mV (39 watts) at PB4 for 100% brightness. This is the default power for a single lamp with no dimming. 4-11 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide Ballast Demonstrator Operation 4.5.4 Power Control Description Calculate input power for both lamps = PB4 (lamp current) * (lamp voltage). Use this data for DALI feedback verification if required. Set programmable gain of AMP0 to 10. 78 watts will be 0.195 VDC at the input of AMP0+ or 1.95V internal A/D input. Adjust frequency up (lower power) or down (higher power) at 30KHz/sec rate. Limit frequency to 100% (PB4 = 0.195V and 32KHz) to 80KHz dimming range. The dimming must be logarithmic for the best resolution. The largest lumen change will be at the lowest power setting. A small high frequency change 70 to 80kHz will give a large perceived dimmed range. If PB4 > 0.220V for two lamps or > 0.110V for one lamp, set half bridge drive off to avoid an over current. Start re-ignition sequence. Repeat 6 times and if still out of the limit, set TX DALI fail signal & shutdown PFC and half bridge drive. ATAVRFBKIT / EVLB001 User Guide 4-12 7597B–AVR–10/07 Section 5 Device Design & Application 5.1 Magnetics PFC – Power Factor Correction Without going into the derivations of the formulae used, the inductor design is as follows: L = 1.4 * 90VAC * 25µS = 700µH 4.5A peak The ON time has been discussed earlier and the OFF time maximum will occur at high line condition at the peak of the haversine. A 16mm core was chosen for the recommended power density at 200mT and 50 kHz. 5.2 IXYS IXTP02N50D DEPLETION MODE MOSFET USED AS CURRENT SOURCE The IXYS IXTP02N50D depletion mode MOSFET is used in this circuit to provide power and a start-up voltage to the Vcc pin of the IXI859 charge pump regulator. The IXTP02N50D acts as a current source and self regulates as the source voltage rises above the 15V zener voltage and causes the gate to become more negative than the source due to the voltage drop across the source resistor (R2). Enough energy is available from the current source circuit during the conduction angles to keep the IXI859 (U1) pin 1 greater than 14VDC as required to enable the Under Voltage Lock Out (UVLO) circuitry in the IXI859. 5.3 IXYS IXD611 Half- bridge MOSFET driver The IXD611 half bridge driver includes two independent high speed drivers capable of 600mA drive current at a supply voltage of 15V. The isolated high side driver can withstand up to 650V on its output while maintaining its supply voltage through a bootstrap diode configuration. In this ballast application, the IXD611 is used in a half bridge inverter circuit driving two IXYS IXTP3N50P power MOSFETs. The inverter load consists of a series resonant inductor and capacitor to power the lamps. Filament power is also provided by the load circuit and is wound on the same core as the resonant inductor. Pulse width modulation (PWM) is not used in this application, instead the power is varied and the dimming of the lamps is controlled through frequency variation. It is important to note that pulse overlap, which could lead to the destruction of the two MOSFETs due to current shoot through, is prevented via the input drive signals through the microcontroller(500nS deadtimes). ATAVRFBKIT / EVLB001 User Guide 5-13 7597B–AVR–10/07 Device Design & Application Other features of the IXD611 driver include: Wide supply voltage operation 10-35V Matched propagation delay for both drivers Undervoltage lockout protection Latch up protected over entire operating range +/- 50V/ns dV/dt immunity 5.4 IXYS IXI859 Charge Pump Regulator The IXI859 charge pump regulator integrates three primary functions central to the PFC stage of the ballast demonstrator. First it includes a linear regulated supply voltage output, and in this application the linear regulator provides 3.3V to run the microcontroller. The second function is a gate drive buffer that switches an external power MOSFET used to boost the PFC voltage to 400V. Once the microcontroller is booted up and running, it generates the input signal to drive the PFC MOSFET through the IXI859 gate drive buffer. Finally, the third function provides two point regulated supply voltage for operating external devices. As a safety feature, the IXI859 includes an internal Vcc clamp to prevent damage to itself due to over-voltage conditions. In general applications at start-up, an R-C combination is employed at the Vcc supply pin that ramps up a trickle voltage to the Vcc pin from a high voltage offline source. The value of R is large to protect the internal zener diode clamp and as a result, cannot supply enough current to power the microcontroller on it’s own. C provides energy to boot the microcontroller. At a certain voltage level during the ramp up, the Under Voltage Lock Out point is reached and the IXI859 enables itself. The internal voltage regulator that supplies the microcontroller is also activated during this time. However, given the trickle charge nature of the Vcc input voltage, the microcontroller must boot itself up and enable PFC operation to provide charge pump power to itself. This means that the R-C combination must be sized carefully so that the voltage present at the Vcc pin does not collapse too quickly under load and causes the UVLO circuitry to disable device operation before the microcontroller can take over the charge pump operation. Also note that there is an internal comparator that only releases charge pump operation when the Vcc voltage drop below 12.85V. The charge pump is released and Vcc voltage is pumped up to 13.15V at which time the internal comparator disables the charge pump. This results in a tightly regulated charge pump voltage. One problem with the R-C combination described above is that when a universal range is used at the Vcc pin, 90-265VAC, R must dissipate nine times the power, current squared function for power in R, over a three-fold increase of voltage from 90V at the low end to 265V on the high end. As an alternative and as used in the ballast demonstrator, the Vcc pin is fed voltage by way of a constant current source as previously described in Section 5.2. This circuit brings several advantages over the regular R-C usage. First we can reduce power consumed previously by R and replace it with a circuit that can provide power at startup. It can also provide sufficient power to run the microcontroller unlike the R-C combination. This would be an advantage in the case that a standby mode is desired. Overall power consumption can be reduced by allowing the microcontroller to enter a low power mode and shut down PFC operation without having to reboot the microcontroller. Since the R-C combination cannot provide enough power to sustain microcontroller operation, the microcontroller must stay active running the PFC section to power itself. ATAVRFBKIT / EVLB001 User Guide 5-14 7597B–AVR–10/07 Device Design & Application 5.5 IXYS IXTP3N50P PolarHV NChannel Power MOSFET TM The IXTP3N50P is a 3A 500V general purpose power MOSFET that comes from the family of IXYS PolarHV MOSFETs. When comparing equivalent die sizes, PolarHT results in 50% lower RDS(ON), 40% lower RTHJC (thermal resistance, junction to case), and 30% lower Qg (gate charge) enabling a 30% - 40% die shrink, with the same or better performance versus the 1st generation power MOSFETs. Within the ballast demonstrator itself the IXTP3N50 serves two functions. The first of which is the power switching pair of devices in the half-bridge circuit that drives the lamps. While a third device serves in the main PFC circuit as the power switch that drives the PFC inductor. 5.6 Clare LDA111S Optocoupler Clare's family of single and dual optocoupler provide an optically isolated means of switching control circuits. The LDA111S contains one phototransistor that is optically coupled to an LED. Shunt resistors can be used to adjust the threshold currents required to activate the output circuitry. While both AC and DC input versions are available, the LDA111S is a DC input only model and features a 100mA continuous load rating, 3750VRMS input to output isolation, and a 1000% current transfer ratio. The LDA111S role is to isolate control signals within the ballast design. 5-15 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide Section 6 ATPWMX Demonstrator Software This section of the application note describes the software architecture utilizing the following source code files and related state machines: Main_fbkit.c Initialisation of peripherals (Ports, ADC, timer...). Clock pfc and lamp task each 200uS and let control task operating during free time. Pfc_fbkit.c PFC State Machine: executed each mS at low speed (1MHZ when the microller has not yet been speeded up), and each 200uS at nominal speed (8MHz). Lamp_fbkit.c Lamp State Machine: executed each 200uS. Control_fbkit.c Control State Machine: executed during CPU free time. Associated header files: • Main_fbkit.h • Pfc_fbkit.h • Lamp_fbkit.h • Control_fbkit.h The software uses the following peripherals: • TIMER0, ADC, amplifier, Comparator0, PSC0, PSC2, PLL, DALI via EUSART The application has been designed to work either with the AT90PWM2B/216 or 3B. ATAVRFBKIT / EVLB001 User Guide 6-16 7597B–AVR–10/07 ATPWMX Demonstrator Software In order for the ballast to operate, three primary control systems should run simultaneously. One for the PFC control, one for the Lamp control, and one for the Command control of the ballast. Since the software jitter was producing visible flickering, there is no more ADC state machine. Each analog conversion is done just before being used for control loops. The complete software package for the application is split into the functional blocks in the diagram shown below. While the variables are identified as follows. g_ global gv_ global volatile gs_ global static Voltage and current variables are identified by the following examples. g_v or g_i global - voltage/current gv_v or gv_i global volatile - voltage/current gs_v or gs_i global static - voltage/current Figure 6-1. Demo Software Architecture Analog comparator PFC_ZCD V_HAVERSINE gv_v_haversine PFC CTRL PFC_OUTPUT V_BUS TEMPERATURE gv_v_bus Not software implemented COMMAND CTRL gv_pfc_state DALI DALI_RX DALI_TX gv_lamp_state SWITCH_CTRL DUAL_LAMP LAMP_EOL gv_lamp_on gv_lamp_preset _current Not software implemented Not software implemented LAMP CTRL I_LAMP gv_i_lamp V_LAMP gv_v_lamp 6-17 7597B–AVR–10/07 INVERTER_HIGH INVERTER_LOW ATAVRFBKIT / EVLB001 User Guide ATPWMX Demonstrator Software 6.1 Main_pwmx_fluo_de This file executes all the peripheral initialization and then schedules the different control tasks. mo.c The ADC and the Command control state machines are also included in this file. The ADC machine is controlled via interrupts. 6.1.1 COMMAND CONTROL STATE MACHINE The Command Control state machine centralizes the SWITCH and DALI controls in order to switch PFC operation On or Off and to set the lamp control instructions given by the user. The Command Control state machine functional diagram is shown below: Figure 6-2. Control State Machine WAIT_FOR_FIRST_COMMAND gs_nbr_read_switch_shot_zero >= MIN_SHORT_TOUCH_SET is_dali_running() == 1 SWITCH_CONTROL DALI_CONTROL update gv_pfc_state and gv_lamp_state depending on gv_lamp_preset_current update gv_pfc_state and gv_lamp_state depending on gv_lamp_preset_current The different states are outlined below: WAIT_FOR_FIRST_COMMAND The three control means are scanned and the first command caught sets the state machine according to the command received. (SWITCH_CONTROL or DALI_CONTROL). SWITCH_CONTROL Read the input pin. Analyze the touch dim command. Set the control variable values corresponding to the user request. DALI_CONTROL Read the DALI Command. Answer the request or set the control variable values corresponding to the DALI command. ATAVRFBKIT / EVLB001 User Guide 6-18 7597B–AVR–10/07 ATPWMX Demonstrator Software 6.1.2 Control state machine Global variables 6.1.2.1 Input variables which have an impact on the Control state machine 6.1.2.2 Output variables which can impact other state machines 6.2 Pfc_ctrl.c • gv_lamp_on is necessary to determine whether the lamp is already on or not. • g_too_many_ignition_tries can be set in lamp state machine. • gv_lamp preset current is set to the wanted value and depending on the gv_lamp_on and g_too_many_ignition_tries values, gv_lamp_state, gv_pfc_state and gv_lamp_on can be set to the following values LAMP_OFF, SHUT_DOWN_PFC_AND_SLOW_DOWN_UC_SPEED, and 0 or 1. This file executes the PFC state machine according to the scheduler in the Main_pwmx_fluo_demo.c file. 6.2.1 PFC STATE MACHINE The PFC state machine functional diagram is shown in Figure 6-3. Figure 6-3. PFC State Machine The different states are outlined below: PFC_OFF Nothing happens, the exit from this state is requested when the gv_lamp_preset_current variable is modified in control_FBKIT.c file. INIT_PFC Nothing happens, the state machine automatically goes to next step (INIT_PFC_HAVERSINE_CHECK) on the next pfc_task(). INIT_PFC_HAVERSINE_CHECK Initialize the control values of the PFC. Then jump to the HAVERSINE_CHECK state. HAVERSINE_MEASURE Measure the haversine peak voltage during HAVERSINE_MIN_CHECK_TIME. Then jump to the HAVERSINE_CHECK state. 6-19 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide ATPWMX Demonstrator Software PFC_OFF gv_lamp_preset_current != 0 during control_task in control_FBKIT.c INIT_PFC INIT_PFC_HAVERSINE_CHECK HAVERSINE_MEASURE g_pfc_time_since_previous_timer_reset <= HAVERSINE_MIN_CHECK_TIME HAVERSINE_CHECK HAVERSINE_PEAK_MIN <= gs_v_haversine_peak <= HAVERSINE_PEAK_MAX (0.95 * gs_v_haversine_peak) <= gv_v_bus <= V_BUS_SET_POINT CONFIGURE_PFC_SOFT_START PFC_SOFT_START PFC_PROBLEM gs_pfc_soft_start_tries <= PFC_START_MAX_TRIES SPEED_UP_MICROCONTROLLER PFC_DELAY_FOR_NEXT_SOFT_START Get_v_bus() <= V_BUS_OVERSHOOT gvs_zcd_occures PFC_FIND_ZCD gvs_zcd_occures == 1 PFC_CONTROL_LOOP gv_lamp_preset_current == 0 during control_task in control_FBKIT.c SHUT_DOWN_PFC_AND_SLOW_DOWN_UC_SPEED HAVERSINE_CHECK PFC haversine peak must be between HAVERSINE_PEAK_MIN and HAVERSINE_ PEAK_MAX (90VAC and 265VAC). If the haversine value is OK, set the max pulse width allowed and jump to the CONFIGURE_PFC_SOFT_START state. Else go back to INIT_PFC_HAVERSINE_CHECK state. CONFIGURE_PFC_SOFT_START Configures the peripherals PSC0 and comparator0 to soft start the PFC. ATAVRFBKIT / EVLB001 User Guide 6-20 7597B–AVR–10/07 ATPWMX Demonstrator Software Then jump to START_PFC_SOFT_START. START_PFC_SOFT_START Check that the soft start has been tried less than PFC_START_MAX_TRIES If OK then start PSC0 and jump to PFC_SOFT_START state. Else immediately jump to the PFC_PROBLEM state. PFC_SOFT_START Check that the PFC has been tried to be set less times than PFC_START_MAX_TRIES. According to this test, SPEED_UP_MICROCONTROLLER or jump to PFC_PROBLEM. SPEED_UP_MICROCONTROLLER In case a zero crossing detection happens, the PFC is switched on. The power will then be sufficient so that the microcontroller can be speeded up to its nominal speed, then it is necessary to find the zero crossing detection in the PFC_FIND_ZCD. In case no z ero c ross ing detec tion happens, a next try will be oper ate i n PFC_DELAY_FOR_NEXT_SOFT_START. PFC_DELAY_FOR_NEXT_SOFT_START In case the soft start fails, the software has to wait DELAY_FOR_NEXT_PFC_SOFT_ START*DELAY_MULTIPLIER_FOR_NEXT_PFC_SOFT_START, before trying a new soft start by going back to the CONFIGURE_PFC_SOFT_START state. PFC_FIND_ZCD Find the Zero Crossing Detection in order to start the PFC_CONTROL_LOOP on a zero crossing. SHUT_DOWN_PFC_AND_SLOW_DOWN_UC_SPEED Switch off the PFC. Switch the microcontroller to a low power consumption mode. Then go back to PFC_OFF state. 6-21 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide ATPWMX Demonstrator Software 6.2.2 PFC State Machine Global variables 6.2.2.1 Input variables which have an impact on PFC state machine • gv_lamp_preset_current which is modified in control_FBKIT.c file makes the PFC state machine changing from PFC_OFF to INIT_PFC when the user request to switch the lamp on. • gv_pfc_state is set to SHUT_DOWN_PFC_AND_SLOW_DOWN_UC_SPEED state on the control_FBKIT.c file when the user request to switch the lamp off. 6.2.2.2 Output variables which can impact other state machines 6.3 Lamp_ctrl.c This file executes the Lamp state machine according to the scheduler in the Main_pwmx _fluo_demo.c file. 6.3.1 Lamp State Machine The different states are outlined below: • None. Figure 6-4. Lamp State Machine LAMP_OFF gv_lamp_preset_current == 0 during control_task in control_FBKIT.c gv_pfc_state == PFC_CONTROL_LOOP CONFIGURE_LAMP_PREHEAT TOO_MANY_LAMP_IGNITION_TRIES LAMP_PREHEAT gs_lamp_ignition_tries < LAMP_IGNITION_MAX_TRIES g_lamp_time_multiplier >= LAMP_PREHEAT_TIME_MULTIPLIER START_IGNITION RESTART_PREHEAT g_inverter_comparison_values.ontime1 < INVERTER_XXX_LAMP_IGNITION_HALF_PERIOD IGNITION Get_v_lamp() < IGNITION_MAXIMUM_IGNITION_VOLTAGE START_RUN_MODE g_inverter_comparison_values.ontime1 >= INVERTER_RUN_HALF_PERIOD RUN_MODE gv_lamp_preset_current == 0 during control_task in control_FBKIT.c LAMP_OFF Nothing happens, the exiting of this state takes place as soon as the gv_pfc_state is set to PFC_CONTROL_LOOP. ATAVRFBKIT / EVLB001 User Guide 6-22 7597B–AVR–10/07 ATPWMX Demonstrator Software CONFIGURE_LAMP_PREHEAT This is the first time the lamp is attempted to be started once the user has requested to switch it on. Configure the amplifier0, which is used to measure the current, then configure the PSC2 according to the definitions in the config.h file, and initialize all the lamp control variables. Then jump to the LAMP_PREHEAT state. LAMP_PREHEAT Starts the preheat sequence for LAMP_PREHEAT_TIME. (PWM set up at 80KHz) Then jump to the START_IGNITION state. START_IGNITION Decrease the frequency from the init frequency down to INVERTER_IGNITION_HALF_ PERIOD. Then jump to the IGNITION state. IGNITION The ignition sequence consists of maintaining the ignition frequency determined by INVERTER_IGNITION_HALF_PERIOD for 10ms, and then checking if ignition occurs by measuring lamp current and voltage. In case it has... START_RUN_MODE. In case it hasn’t... RESTART_PREHEAT. RESTART_PREHEAT Reconfigure the Inverter with the Restart parameters, then go to LAMP_PREHEAT. If Ignition fails too many times... Go to TOO_MANY_LAMP_IGNITION_TRIES. START_RUN_MODE Increase the frequency from the init frequency, INVERTER_IGNITION_HALF_PERIOD. Then jump to the RUN_MODE state. RUN_MODE Normal control loop to have the light in accordance with the gv_lamp_preset_current variable that is permanently updated in the command control state machine in the Main_pwmx_fluo_demo.c file. The transition from the RUN_MODE state to the LAMP_OFF state is done in the control state machine (control_FBKIT.c file) when the gv_lamp_preset_current variable is set to 0. 6-23 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide ATPWMX Demonstrator Software TOO_MANY_LAMP_IGNITION_TRIES If the ignition has failed LAMP_IGNITION_MAX_TRIES, g_too_many_ignition_tries variable will be set, and the lamp will be switched off thanks to control_FBKIT.c file which will switch off the ballast. 6.3.2 Lamp state machine Global variables 6.3.2.1 Input variables which have an impact on the Lamp state machine 6.3.2.2 Output variables which can impact other state machine ATAVRFBKIT / EVLB001 User Guide • The transition from LAMP_OFF to CONFIGURE_LAMP_PREHEAT is done when the gv_pfc_state is set to PFC_CONTROL_LOOP in PFC_FBKIT.c file. • The transition from the RUN_MODE state to the LAMP_OFF state is done in the Control state machine in the case gv_lamp_preset_current is equal to 0. • g_too_many_ignition_tries == 1 makes the ballast switch off in the control state machine in control_FBKIT.c file. 6-24 7597B–AVR–10/07 Section 7 Conclusion The ballast demonstrator shows that the AT90PWM2B/216 microcontroller can control and regulate fluorescent lamps from any of the two (DALI and switch) methods of dimming. It can automatically sense the control method used thereby providing lamp controller manufacturers with maximum flexibility in their design. One or more lamps can be controlled with flexibility and precision. Universal input and power factor control adds to the flexibility of the design with a minimal addition of more expensive active components. Additionally, the programmability of the microcontroller offers the lamp manufacturer the flexibility to add more design features than are shown here to enhance their market position. The ballast demonstrator, although it has many features, does not address all the possibilities available to the lamp controller designer. 7.1 Appendix 1: SWITCH DIM The switch DIM allows dimming control using a simple switch connected to the mains phase. Switch DIM operation The Switch DIM operation is as follows: With the lamp switched on: A short push switches the luminary off and stores the current light level. A long push gradually dims the light level. (Change direction by briefly taking your finger off the button and pressing down again). With the lamp switched off: A short push switches the lamp on to the last light level used. (Optional: Use a soft start from minimum level to last level used). A longer push starts on the last light level used and gradually raises the light level to the required brightness. The lamps are dimmed for as long as the switch is pressed or until the minimum or maximum dimmer setting is reached. ATAVRFBKIT / EVLB001 User Guide 7-25 7597B–AVR–10/07 Conclusion 7.2 Appendix 2: Capacitor Coupled Low Voltage Supply Small currents for the low voltage supply can be obtained from the AC line at low loss by means of capacitor coupling as shown in the figures below. To estimate the required size of the coupling capacitor, use the following relationships for current, charge, voltage and capacitance. 1.dQ/dt = I DC Figure 7-1. Negative Line Half Cycle C1 VD - VC1 + AC VD Ich1 -VPK C2 Vo IDC C2 Vo IDC “Negative” line half -cycle: C1 charges to Vpk - VD with polarity shown. Figure 7-2. Positive Line Half Cycle C1 +VPK VD + VC1 Ich2 AC VD “Positive” line half -cycle: C1 charges to Vpk - VD - Vo with polarity shown. 1.dV = 2Vpk-Vo-2V D 2.dQ = CdV or C = dQ/dV For example, to obtain 15 mA at 20 VDC from a 220 Vrms 50 Hz line: 1.dQ/dt = (15 millijoules/sec)/(50 cycles/sec) or 0.3 millijoules / cycle. 2.Over 1 cycle, the coupling capacitor (C1) will charge from –220V x 1.4 to +220V x 1.4 – 20V- V . dV = 2*Vpk-Vo-2V . dV ~= 600V. D D 3. The required C1 ~ 0.3 millijoules/600V or 0.5 uF ATAVRFBKIT / EVLB001 User Guide 7-26 7597B–AVR–10/07 Conclusion In practice, C1 may have to be larger depending on the amount of ripple allowed by C2 and to account for component tolerances, minimum voltage, and current in the regulator diode. C1 must be a non-polarized type with a voltage rating to withstand the peak line voltage including transients. A high quality film capacitor is recommended. 7.3 Appendix 3: PFC Basics The function of the PFC boost regulator is to produce a regulated DC supply voltage from a full wave rectified AC line voltage while maintaining a unity power factor load. This means that the current drawn from the line must be sinusoidal and in phase with the line voltage. The ballast PFC circuit accomplishes this by means of a boost converter operating (See Figure 7-3) at critical conduction so that the current waveform is triangular (See Figure 7-4). Figure 7-3. PFC Boost Regulator PFC BOOST REGULATOR Ioff PFC Inductor POWER VOLTAGE Vbus Vin Ion = (Vin x t )/ L PFC Switch The boost switch ON time is maintained constant over each half cycle of the input voltage sinusoid. Therefore the peak current for each switching cycle is proportional to the line voltage which is nearly constant during Ton. (Ipeak = Vin x Ton/L). Since the average value of a triangular waveform is half its peak value, the average current drawn is also proportional to the line voltage. Figure 7-4. Main voltage supply cutting Main Supply Voltage Actual switching frequency is higher than shown Ipeak = Vin x Ton / L Ioff Ion Imean = Ipeak/2 PFC DRIVING 7-27 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide Conclusion 7.4 Appendix 4: Bill of Material Figure 7-5. Bill of Materials 1 ATAVRFBKIT / EVLB001 User Guide 7-28 7597B–AVR–10/07 Conclusion Figure 7-6. Bill of Materials 2 7-29 7597B–AVR–10/07 ATAVRFBKIT / EVLB001 User Guide Conclusion Figure 7-7. Bill of Materials 3 ATAVRFBKIT / EVLB001 User Guide 7-30 7597B–AVR–10/07 A B C 4 3 2 1 1A-600V/FR D15 R13 PB7ADC4 C12 .1uF NOTES: PB0 PB1 LL4148-13 D17 SWISS LL4148-13 D9 LO VS HO VB 600V 1 nF 600 V TP9 GATELO HIGH FET CURRENT ALARM CURRENT SENSE FOR POWER CALC LAMP MISSING DET. LAMP CURRENT DET. 1M R14 1M C13 400V BUS TEST LL4148-13 D7 27 R12 R10 VBUS C4 VCC LL4148-13 D16 1K R27 NOTE NEW GND 27 R23 27 D13 MBRS140CT .1uF C15 .1uF 600V CLOSE TP8 PROXIMITY GATEHI NOTE NEW GND R19 VCC C5 .1uF 600V 1A-600V/FR D1 75-MKP1840410634 PB2 ADC5 PB4 AMP0+ 5 6 7 8 1A-600V/FR D10 LL4148-13 IXD611S1 D12 COM LIN HIN VCC VCC 4 3 2 1 U2 D8 MBRS140CT 22K R15 VCC BR1 + 1 TP6 50uF 475V GATEDR C9 PD7 ACMP0 IXTP3N50P 1A-600V/FR 2 - P5948-ND 22uF@450V CM CHOKE RV1 MURS160DICT-ND D4 DF10SDI-ND P7186-ND VARISTOR265VAC 3 AMPS PEAK L1 Q3 PLK1069-ND BOOSTVSUP 15V 200K R31 TP7 VCC HAVERSINE TEST 200K R32 1800 pF 250VAC 250VAC C3 C1 T1 LPFC 1M CLOSE TO U2 LL4148-13 D5 Swiss Control VCC 1M R9 110/220-VIN J1 75-WYO222MCMBF0K 1 5 CONNECTOR 6 3 3 4 D 10 8 PPC62KW-3JCT-ND 62K 3W 1 /1% R28 IXTP3N50P Q5 IXTP3N50P Q4 R2 1uF C14 D18 LL4148-13 1.8 K R33 1.2K R29 400K R24 400K R20 10K R34 200 OHM 3 W BOOSTVSUP TP-7 C10 1 S .001uF C19 1 F VCC IXI859S1 GATE GND VSUP VCAP LL4148-13 1K R5 D3 VCC TP-6 R30 460 K 0.8 V R25 1M TP-8 PD6 ACD3 1.25 TO 2.75 NORMAL 1.00 TO 3.00 END OF LIFE T8 5 S JUMPER PD5 ACMP2 LL4148-13 D11 TP5 GND S F F 8 5 nF C16 R21 220nF 100V 6 9 T3 BALANCE PB5 ADC6 4 1 0.264 V @ 80C 1.1V @ 25C 250 uA MAX. OVERTEMP DET. C17 5 nF 6 S 3 S F F NOTE NEW GND 220nF 100V C22 Appendix 5: Schematics PRELIMINARY 7 Flourescent Lamp CONNECTOR FL1 10 REMOVE FOR SINGLE LAMP OP. T4C TRANSFORMER TRANSFORMER T4E 220nF 100V C18 REMOVE FOR SINGLE LAMP OP. 200 OHM 3 W R22 OPEN FILAMENTS DETECTED BY 1/2 BRIDGE CURRENT, ONE LAMP JUMPER, & RECT LAMP VOLTAGE. OPTION IN CODE TO ACCEPT ONE LAMP W/DALI FLAG OR FAULT. NOTE NEW GND 220nF 100V C21 Flourescent Lamp CONNECTOR FL2 11 200 OHM 3 W RT1 10K @ 25C C20 R6 20K t VCC TRANSFORMER T4B JP2 TRANSFORMER T4D 2 SINGLE LAMP OP TP4 GND LAMP VOLT DET. END OF LIFE DC & AC DAC CONTROLLED WINDOW COMP. VCC 10uF 25V C7 TP3 15V BOOSTVSUP RECT. LAMP VOLTAGE DET. IGNITION, RAMP, MISSING LAMP DET. ANALOG INPUT LL4148-13 D14 1K R26 C11 15V .022uF C46 LL4148-13 D26 D28 LL4148-13 VOLTAGE DOUBLER .01uF 1500V FILM 5 6 7 8 NOTE NEW GND 505-M100.01/2000/5 RESONANT CAP 12 D6 MBRS140CT TRANSFORMER T4A IN NC VOUT VCC U1 .02 uF 4 3 PD0 R3 100 OHM 2 R11 Q1 IXTP02N50D R73 22 OHM 3 47 uF C8 VCC 2 C6 1nF 18K C2 1 1 1A-600V/FR D27 .1 uF 600V FILM 100K 1/4W R18 D2 15V Zener 100- 2 3 R72 2 1 1 2 75-F17724332000 9 VDC 2 1 L2 L1 L4 L3 4 3 2 1 7597B–AVR–10/07 L2 L1 7-31 L4 L3 7.5 4 3 TO-220 Conclusion ATAVRFBKIT / EVLB001 User Guide GND VCC 5 Y1 8MHz PB1 PB0 PD4 12 11 10 9 8 7 6 5 AT90PWM2 13 14 15 16 17 18 19 20 21 22 23 24 4 1. DALI 2. DALI END OF LIFE CKT (ADC2/ACMP2) PD5 (ADC3/ACMPM/INT0) PD6 (ACMP0) PD7 (ADC5/INT1) PB2 AVCC AGND AREF (AMP-) PB3 (AMP0+) PB4 (ADC6/INT2) PB5 LOCATE IN CENTER OF BOARD PD4 (ADC1/RXD/DALI/CP1A/SCL_A) PE2 (ADC0/XTAL2) PE1 (OC0B/XTAL1) PB1 (PSCOUT21) PBO (PSCOUT20) GND VCC PD3 (TXD/DALI/OC0A/MOSI_A) PD2 (PSCIN2/OC1A/MISO_A) PD1 (PSCIN0/CLK) (ADC7/ICP1B) PB6 (ADC4/PSCOUT01) PB7 PB7ADC4 100PF C31 J5 1 2 3 4 CON4 100 K R42 PD5 ACMP2 RECTIFIED LAMP VOLTAGE PFC ZERO 400 V DETECT CURRENT SENSE CURRENT SENSE TEMP SENSE PE1(SWISS) 12K HAVERSINE .01uF R35 PD6 ACD3 2 - .1uF C30 .1uF C24 PB5 ADC6 PD7 ACMP0 .1uF C32 .1uF C23 PB4 AMP0+ 3 + 1 BR2 0.5A 200V Q8 BC846BCT 10K R46 PB2 ADC5 RH02DICT-ND R39 12K 400 V DET. 0 OHM R70 1 10R R47 .1uF C27 VCC 100 K R48 100 R50 R37 22 OHM 10K R40 LL4148-13 D19 R51 1nF 10K CON2 2 1 J4 ISO2 LDA111S 470 R49 R43 ISO1 10uF 25V C29 LDA111S BC857B Q6 + 100 K R44 Title BZX84C5V6SDICT-ND 4.7K PRELIMINARY PD3 TX TESTPT TP2 VCC BC857BLT1OSCT-ND C28 R38 2.2K CON2 2 1 J3 TESTPT R45 100 K PD4 C33 .1uF 1 4.7K R41 VCC Q7 BC846BCT VCC WL Williamson & ASSOC DALI must recognize the difference in pulse rate between the DALI input, the VCO output range and the much longer Swiss control. SWISS RX TP1 2 .1uF C47 Rev 3 PE1(SWISS) R71 10K C D 2 Date: Size C 1 Ballast Control C-2346-2 Sheet Friday, May 25, 2007 Document Number 2 of A R68 22 OHM PD3 4 PEO (RESET/OCD) PDO (PSCOUT00/XCK/SS_A) U3 1 A VCC 1 2 .1uF C26 PD4 3 3 4 1 2 PD0 5 6 PSCIN0 2 B HEADER6PIN PDO VCC SCK PDI RESET* JUMPER 3 B C D J2 C48 1 2 4 3 4 5 6 4 SINGLE LAMP OPERATION PIN JUMPER IN THROW AWAY JUMPER FOR DUAL LAMP 6 5 4 3 5 3 2 1 2 ATAVRFBKIT / EVLB001 User Guide 2 SPARE IF CODE RECOGNIZES SINGLE LAMP JP3 1 2 Conclusion 7-32 7597B–AVR–10/07 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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