SC2442 Datasheet

SC2442/H
High Performance Wide Input Range
Dual Synchronous Buck Controller
POWER MANAGEMENT
Description
Features
SC2442 and SC2442H are high performance dual buck
converter controllers that can be configured for a variety
of synchronous buck applications where efficiency is most
important. Both converters are synchronized to prevent
beat frequencies. The dual buck converters are also
operated out of phase reducing input ripple, allowing for
fewer input capacitors.
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High frequency operation up to 1.1 MHz reduces the size
of output inductors and capacitors. The controller has
separate power pins for both VCC and GND to improve
noise immunity. The VCC supplies can be regulated to 7V
using an external PNP transistor. Other features include:
bootstrapping for high side drive supplies, asynchronous
mode start up, power up sequencing to prevent latchups, individual soft start for each convertor, bootstrapped
drivers for high side N-channel MOSFETs, input side
current sensing, dual mode current limit with hiccup,
enable and external frequency synchronization.
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Applications
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The SC2442 operates over the range of 4.75V to 30V
and SC2442H operates over the range of 4.75V to 36V. ‹
‹
Typical Application Circuit
VIN+
MAX 30V/36V (H)
Dual output controller
Asynchronous start up mode
Power up sequencing to prevent latch-ups
Out of phase operation for low input ripple
Over current protection
Output down to 0.75V
Wide input range, 4.75 to 30V for SC2442 and
4.75 to 36V for SC2442H
Vcc regulator with external PNP transistor
Programmable clock frequency up to 1.1MHz
Two synchronous bucks for high efficiency at high
current
–40 to +125 Deg C operating temperature
Small package TSSOP-24
Fully WEEE and RoHS Compliant
Point of load converter applications
DSL applications with multiple output voltages
Power management for mixed signal applications
Cable modems and set top boxes.
R1
R2
C1
Q1
R3
R5
R4
L1
Q5
Q3
C6
R9
OC1
C7
C4
AVCC
1
PVCC
13
7
R10
18
C5
23
SS1
6
C8
5
SS2
19
C9
OSC
20
R12
22
VI N
U1
BD I
OC 1
OC 2
AVC C
G D 1H
P VC C
G D 1L
SS1
SS2
ROS C
FB1
SC2442ITSTR
2
R7
OC2
RTN
3
VOUT1
C2
G D 2H
G D 2L
PH1
BS T 1
E A1
PH2
FB2
BS T 2
E A2
P G ND
S YN C /E N
AG ND
D1
4
RTN
Q2
D2
R6
L2
21
9
VOUT2
Q4
11
R8
C3
16
14
10
PH1
8
BST1
15
PH2
17
BST2
RTN
R13
R14
C15
C16
12
24
R15
R16
RTN
R11
C10
R17
ENA
Revision: June, 2007
C11
C12
R18
EA2
RTN
C13
FB2
FB1
1
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SC2442/H
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction.
Operation outside of the parameters specified in the Electrical Characteristics section is not implied.
Parameter
Sy mbol
BST1, BST2 to PGND
S C 2442
S C 2442H
VBST1, VBST2
Maximum
U nits
V
38
44
VIN to PGND
S C 2442
S C 2442H
VIN
V
BD I to PGND
V BD I
VIN
V
VIN - VOC1, VIN - VOC2
-0.3 to +0.5
V
PVC C , AVC C
8
V
-0.3 to 8
V
-0.3 to PVC C
V
±0.3
V
-1
V
-0.3 to AVC C
V
Juncti on Temperature
-40 to +125
°C
Storage Temperature Range
-60 to +150
°C
260
°C
30
36
OC 1 and OC 2 to VIN
PVC C , AVC C to PGND
BST1 to PH1, BST2 to PH2
GD 1H to PH1, GD 2H to PH2
GD 1L, GD 2L to PGND
PGND to AGND
PH1, PH2 -ve swi ng wrt PGND (for 100 nS)
VPH1, VPH2
All Other Pi ns to AGND
Lead Temperature (Solderi ng) 10 Sec.
Electrical Characteristics
Unless specified: TA = TJ = -40 to 125°C, VIN = 24V, VCC = 7V, Fc = 550KHz
Parameter
Sy mbol
Test C onditions
Min
Ty p
Max
U nit
Start Threshold
VUVLO
AVC C ri si ng
4.5
4.6
4.75
V
UVLO Hysteresi s
VHYST
AVC C falli ng
0.15
IQSC
No load, SYNC /EN = Low
8
13
mA
6.7
7.0
7.3
V
3
5
U nderv oltage Lockout
V
Power Supply
Operati ng C urrent
AVC C /PVC C Regulated
BD I D ri ve C urrent
© 2007 Semtech Corp.
AVC C , PVC C
VIN > 8V
VIN > AVC C + 2V
IBDI
2
mA
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SC2442/H
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: TA = TJ = -40 to 125°C, VIN = 24V, VCC = 7V, Fc = 550KHz
Parameter
Sy mbol
Test C onditions
Min
Ty p
Max
U nit
Soft Start
C hargi ng C urrent
ISS1, ISS2
7
10
13
μA
D i scharge C urrent
ISS1, ISS2
-1
-2
-4
μA
V F B 1, V F B 2
0.735
0.750
0.765
V
Error Amplifier
Voltage Feedback Reference
Input Bi as C urrent
Open Loop Gai n (1)
Uni ty Gai n Bandwi dth (1)
IEABIAS
500
nA
GDC
70
dB
GBW
3
MHz
2
mA
1
V/μS
80
nS
Output Source/Si nk C urrent
Output Slew Rate
(1)
PWM to Output D elay (1)
Oscillator
Frequency Range
Fc
C lock Frequency
Fc
Osci llator Peak Voltage
Osci llator Valley Voltage
0.1
ROSC = 60K
(1)
(1)
490
550
1.1
MHz
610
kHz
Internal
3.0
V
Internal
1.5
V
2.0
V
Sy nc/Enable Input
Enable Thresheld Voltage
VSYEN
SYNC /EN pi n Voltage ri si ng
D i sable Thresheld Voltage
VSYEN
SYNC /EN pi n Voltage falli ng
0.8
SYNC /EN pi n < 0.8V
50
nS
D i sable Low to Shut D own D elay (1)
1.8
1.0
V
Sync Input Hi gh Level
VSYEN
TTL
V
Sync Input Low Level
VSYEN
TTL
V
C urrent Limit
OC 1, OC 2 C urrent Li mi t Sense
VOC1, VOC2
-80
-105
-125
mV
Feedback Threshold for Hi ccup
V F B 1, V F B 2
0.450
0.525
0.610
V
OC Sense to D ri ve Turn Off D elay (1)
© 2007 Semtech Corp.
80
TOCDLY
3
nS
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SC2442/H
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: TA = TJ = -40 to 125°C, VIN = 24V, VCC = 7V, Fc = 550KHz
Parameter
Sy mbol
Test C onditions
Min
Ty p
Min
U nits
Hi gh Si de Gate D ri ve (1)
IGDH+, IGDH-
Soure/Si nk
+ 0 .5
A
(1)
IGDL+, IGDL-
Soure/Si nk
+ 0 .5
A
Gate D ri ve Ri se Ti me
TRISE
C OUT = 1000 pF
30
nS
Gate D ri ve Fall Ti me
TFALL
C OUT = 1000 pF
30
nS
Maxi mum D uty C ycle
D max
For PWM1 and PWM2
94
%
Mi ni mum D uty C ycle
D mi n
For PWM1 and PWM2
0
%
D ead Ti me Between Gate D ri ves
TDEAD
100
nS
Gate D riv e Outputs
Low Si de Gate D ri ve
85
NOTES:
(1) Guaranteed by design, not tested in production
(2) This device is sensitive to ESD. Use of standard ESD handling precautions is required.
Pin Configuration
Ordering Information
Top View
Part Number
AVCC
AGND
BDI
ROSC
SC2442ITSTR
VIN
SYNC/EN
SC2442HITSTR
OC1
OC2
EA1
EA2
FB1
FB2
SS1
SS2
BST1
BST2
GD1H
GD2H
SC2442ITSTRT
Package
Temp. Range
(T A)
TSSOP-24
-40°C to +125°C
TSSOP-24
-40°C to +125°C
(1)
SC2442HITSTRT
(1)
PH2
PH1
GD1L
GD2L
PGND
PVCC
Notes:
Only available in tape and reel packaging. A reel
contains 2500 devices.
(24 Pin TSSOP)
(1) Lead free devices
© 2007 Semtech Corp.
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SC2442/H
POWER MANAGEMENT
Pin Descriptions
Pin #
Pin Name
1
AVCC
2
BDI
Base drive for AVCC/PVCC regulator.
3
VIN
Input supply voltage. Maximum is 30V for SC2442 and 36V for SC2442H.
4
OC1
High side current sense for VOUT1. Threshold is 100 mV.
5
EA1
Error amplifier output for compensation for the VOUT1.
6
FB1
Feedback input for the VOUT1.
7
SS1
Soft start pin for VOUT1. A capacitor to AGND sets the soft start period.
8
BST1
Boost capacitor connection for the VOUT1 high side gate drive.
Connect an external capacitor and a diode as show n in the Typical Application Circuit.
9
GD1H
Gate drive for the high side MOSFET of VOUT1. 180 degrees out of phase w ith GD2H.
10
PH1
11
GD1L
Gate drive for low side MOSFET of VOUT1.
12
PGND
Pow er ground for gate drive return currents.
13
PVCC
Supply voltage for output drivers.
14
GD2L
Gate drive for low side MOSFET of VOUT2.
15
PH2
16
GD2H
Gate drive for the high side MOSFET of VOUT2. 180 degrees out of phase w ith GD1H.
17
BST2
Boost capacitor connection for the VOUT2 high side gate drive.
Connect an external capacitor and a diode as show n in the Typical Application Circuit.
18
SS2
Soft start pin for VOUT2. A capacitor to AGND sets the soft start period.
19
FB2
Feedback input for the VOUT2.
20
EA2
Error amplifier output for compensation for the VOUT2.
21
OC2
High side current sense for VOUT2. Threshold is 100 mV.
22
SY NC/EN
23
ROSC
Oscillator frequency programming pin. Connect a resistor to AGND to set clock frequency.
24
AGND
Analog signal ground.
© 2007 Semtech Corp.
Pin Function
Supply voltage for analog circuit.
Regulated by the BDI pin to 7V from VIN using an external PNP transistor.
Sw itching node for VOUT1 external inductor connection.
Sw itching node for VOUT2 external inductor connection.
Oscillator synchronization and PWM Enable pin.
5
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SC2442/H
POWER MANAGEMENT
Block Diagram
© 2007 Semtech Corp.
6
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SC2442/H
POWER MANAGEMENT
Application Information
Sync and Enable
Undervoltage Lockout
When the SYNC/EN pin is pulled below 1V, all output
drives are turned off and both SS pins are discharged to
ground. When the SYNC/EN pin is pulled high above
1.8V, normal operation occurs. When an external clock
signal is applied that is marginally higher in frequency to
that set by the ROSC resistor, the internal oscillator will
synchronize to this signal. The external signal should have
TTL compatible transition.
The undervoltage lockout circuitry monitors the AVCC pin.
During undervoltage lockout all output drives are turned
off and both SS pins are discharged to ground. Typically,
for AVCC increasing, normal operation will not occur until
AVCC reaches 4.6V. For AVCC falling, undervoltage lockout will not occur until AVCC falls below 4.5V.
Voltage Regulator
Operating Frequency
Using an external PNP transistor as shown in the Typical
Applications Circuit, the SC2442/H provide a regulated
AVCC supply. The same AVCC with adequate filtering can
be connected to PVCC to provide power for the output
drives. The AVCC is regulated at 7V typical which provides
optimum drive for most low Voltage power MOSFETs. The
BDI pin will provide at least 3 mA to regulate the external
PNP.
The operating frequency is set by a resistor from ROSC
pin to AGND. ROSC sets the clock frequency Fc that is
twice the operating frequency of each converter. The
clock frequency is given by
Fc =
Fc is in kHz and ROSC is in kOhm.
For VIN voltages below 8V, the PNP pass transistor will
always be operating in saturation and it is recommended
to connect VIN directly to AVCC and PVCC so long as
maximum input voltage is below 8V. The BDI pin may be
left unconnected. Alternately if an additional supply <8V is
available in addition to VIN, it can be used for separately
powering both the VCCs.
Current Limiting
The SC2442/H provide cycle-by-cycle current limiting by
sensing the current in the input line. A non inductive resistor
should be used for precise current sensing and limiting.
When the voltage drop across a sense resistor in the input
line exceeds 105 mV, the PWM pulse is latched off and is
not reset until the next clock cycle. Overcurrent condition
affects only the high side driver. An RC filter should be
placed across the sense resistor as shown in the Typical
Application Circuit to reduce noise due to turn-on spikes.
The filter capacitor should be connected between VIN and
respective OCx pins for proper filtering. Typically a ceramic
or similar low esr capacitor is placed between the current
sense resistor and the switching circuit. If this capacitor
value is large, it can significantly distort the current
feedback waveform aross the sense resistors. This should
be taken into account while designing the overcurrent
protection circuit.
Soft Start and Hiccup Mode
The SC2442/H controllers utilize asynchronous start up
to provide glitch free output rise times. During start up, the
SS1 and SS2 pins are held low and the gate drive signals
are also pulled low. Once AVCC reaches 4.6V and above,
the SS capacitors are charged by a 10 μA internal current
source. The error amplifier outputs are clamped by the respective SSx voltages. As the SSx pin voltage goes above
the oscillator valley voltage of 1.5V, the high-side driver
will begin switching. The low-side driver will not begin
switching until the SSx voltage has reached 3.3V.
During normal operation, the SC2442/H will enter hiccup
mode if the SS pin voltage is above 3.3V and the FB pin
voltage is below 0.525V (70% of 0.750V). If this occurs
the GDxH and GDxL signals will go low and the SS pin will
begin to sink 2 μA. The 2 μA of sink current will slowly
discharge the SS capacitor until its voltage reaches 1V,
which will trigger the SS pin to begin sourcing 10 μA. The
convertor will operate in the asynchronous mode during
hiccup.
© 2007 Semtech Corp.
33,000 / ROSC
Gate Drive Considerations
The SC2442/H provide high side gate drive with
bootstrapping as shown in the Typical Application Circuit.
A ceramic capacitor is recommended between each BSTx
pin to the corresponding Phase Node. Each gate drive can
source and sink a minimum of 0.5A current with 100 nS
dead time between transistions to prevent shoot throughs.
7
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SC2442/H
POWER MANAGEMENT
Application Information (Contd)
0.075R, 1/4W
J1-1
C7
R3
100R
C8
J1-3
1
7
5R
10K
13
R10
18
23
15 uF
SS1
C16
0.22 uF
C17
0.1 uF
TP2
•
QB
QT
1
2
3
4
8
7
6
5
1
6
5
SS2
19
OSC
20
R11 40.2K
22
VIN
U1
BD I
OC 1
OC 2
AVCC
G D 1H
P VC C
G D 1L
SS1
SS2
ROS C
FB1
G D 2H
G D 2L
PH1
BS T 1
E A1
PH2
FB2
BS T 2
E A2
P G ND
S YN C /E N
AG ND
3.3V/0.6A
L1 P1166.473T
2
VOUT1
C3
100 uF 4V
4
D1
D2
21
9
QD2
FDS6982S
•
1
R6 2R
16
2
3
1
J2-2
1.8V/1A
L2 P1166.223T
2
100 uF 4V
R12
10
PH1
8
BST1
15
PH2
17
BST2
12
RTN
C24
220K
FB1
J2-3
C12
2.2 uF
2.2 uF
R16
100R
1 nF
R17
14K
R14
C21 47 pF
C18
R13
C19
4.7 nF
100K
10 nF
C25
1 nF
C13
24
EA1
C15
R8 3.3R
14
10K
47 pF
J2-4
VOUT2
C4
QT
4
J2-1
TP3
• • •
QB
11
ENA
C20
C14
RTN
SCH
2
C11
5
R5 2R
OC2
SC2442ITSTR
3
C10
R9
R7 3.3R
6
10 nF
PVCC
RTN
15 uF
100R
OC1
C23
TP1
7
• • •
R4
10 nF
C22
8
FDS6982S
SCH
2.2 uF
J1-2
2.2 uF
56 uF 10V
C2
QD1
0.06R, 1/4W
R2
2.2 uF
R1
2.2 uF
4.75-6V
VIN
R18
34K
R19
100R
R15
10K
EA2
FB2
Fig 1) Application Circuit for 5V to 3.3V/1.8V Low Power Dual Synchronous Buck Convertor
Input 5V
3.3V Output
1.8V Output
Fig 2) Input and output rise times with full load
© 2007 Semtech Corp.
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SC2442/H
POWER MANAGEMENT
Application Information (Contd)
Fig 3) Switching waveforms at Phase Node with full load.
Top trace: 1.8V/1A
Bottom trace: 3.3V/0.6A
Fig 4) Output ripple and noise at full load
Top trace: 3.3V Output
Bottom trace: 1.8V Output
Fig 5) 1.8V Transient response for 10% to 100% step load
Fig 6) 3.3V Transient response for 10% to 100% step load
© 2007 Semtech Corp.
9
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SC2442/H
POWER MANAGEMENT
Outline Drawing - TSSOP-24
Land Pattern - TSSOP-24
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
© 2007 Semtech Corp.
10
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