Data Sheet

BGA3031
DOCSIS 3.0 plus upstream amplifier
Rev. 3 — 20 November 2014
Product data sheet
1. General description
The BGA3031 is an upstream amplifier meeting the Data Over Cable Service Interface
Specifications (DOCSIS 3.0). It is designed for cable modem, CATV set top box and VoIP
modem applications. The device operates from 5 MHz to 85 MHz. The BGA3031 provides
58 dB gain control range in 1 dB increments with high incremental accuracy. Its maximum
gain setting delivers 34 dB voltage gain and a superior linear performance.
It supports high output power levels, exceeding the DOCSIS 3.0 power levels while
minimizing distortion and output noise levels. The BGA3031 is capable of transmitting
1 to 8 64-QAM and 1 to 8 QPSK modulated carriers while meeting the DOCSIS 3.0 ACLR
specification under DOCSIS 3.0 + 4 dB conditions.
The BGA3031 operates at 5 V supply. The gain is controlled via a 3-wire serial interface.
The current consumption can be reduced in 4 steps via the serial interface. This enables
the user to optimize between DC power efficiency and linearity. In addition the current is
automatically reduced at lower gain settings while preserving the linearity performance. In
disable mode the device draws typical 6 mA while it still can be programmed to new gain
and current settings.
The BGA3031 is housed in 20 pins 5 mm  5 mm leadless HVQFN package.
2. Features and benefits













58 dB gain control range in 1 dB steps using a 3-wire serial interface
5 MHz to 85 MHz frequency operating range
 0.2 dB incremental gain step accuracy
Maximum voltage gain 34 dB
Excellent IMD3 of 70 dBc at 64 dBmV output power
Excellent second harmonic level of 80 dBc at 64 dBmV output power
Excellent third harmonic level of 67 dBc at 64 dBmV output power
Excellent noise figure of 3.5 dB at maximum gain
Capable of transmitting 1 to 8 64-QAM modulated carriers while meeting the
DOCSIS 3.0 specification under DOCSIS 3.0 + 4 dB conditions (61 dBmV total output
power)
Capable of transmitting 1 to 8 QPSK modulated carriers while meeting the
DOCSIS 3.0 specification under DOCSIS 3.0 + 4 dB conditions (65 dBmV total output
power)
5 V single supply operation
Excellent ESD protection at all pins
Unconditionally stable
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
 Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
3. Applications
 DOCSIS 3.0 and DOCSIS 3.0 + 4 dB cable modems
 VoIP modems
 Set-top boxes
4. Quick reference data
Table 1.
Quick reference data
Typical values at VCC = 5 V; current setting = 3; Tamb = 25 C; Zi = 200 : Zo = 75 , unless otherwise specified.
Symbol Parameter
supply current
ICC
Conditions
Min Typ Max Unit
transmit-enable mode; TX_EN = HIGH
-
325 -
mA
-
6.0
mA
transmit-disable mode; TX_EN = LOW
[1][2]
-
Gv
voltage gain
gain code = 111111
-
34
-
dB
NF
noise figure
transmit-enable mode; gain code = 111111
-
3.5
-
dB
2H
second harmonic level
Pi = 30 dBmV; PL = 64 dBmV into
75  differential impedance
-
80 -
dBc
3H
third harmonic level
Pi = 30 dBmV; PL = 64 dBmV into
75  differential impedance
-
67 -
dBc
IMD3
third-order intermodulation distortion
Pi = 27 dBmV per tone; PL = 61 dBmV per
tone into 75  differential impedance
-
70 -
dBc
PL(1dB)
output power at 1 dB gain compression signal
-
74
dBmV
[1]
Voltage gain does not include loss due to input and output transformers.
[2]
Pi = 30 dBmV.
-
Table 2.
ACLR quick reference data
Typical values at VCC = 5 V; current setting = 3; Tamb = 25 C; Zi = 200 : Zo = 75 ; channel bandwidth = 1280 kHz;
integration bandwidth = 1280 kHz; f = 5 MHz to 85 MHz, unless otherwise specified.
Symbol Parameter
Conditions
DOCSIS 3.0 spec.
Min Typ Max Unit
1 input channel
50
-
68 -
dBc
2 input channels
47
-
62 -
dBc
4 input channels
44
-
58 -
dBc
8 input channels
-
-
56 -
dBc
1 input channel
50
-
66 -
dBc
2 input channels
47
-
58 -
dBc
4 input channels
44
-
50 -
dBc
8 input channels
-
-
42 -
dBc
DOCSIS 3.0 + 4 dB; 64-QAM
ACLR
adjacent channel leakage ratio
Pi = 29 dBmV; PL = 61 dBmV
DOCSIS 3.0 + 4 dB; QPSK
ACLR
adjacent channel leakage ratio
BGA3031
Product data sheet
Pi = 33 dBmV; PL = 65 dBmV
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
2 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
5. Ordering information
Table 3.
Ordering information
Type number
Package
Name
BGA3031
Description
Version
HVQFN20 plastic thermal enhanced very thin quad flat package;
no leads; 20 terminals; body 5  5  0.85 mm
SOT662-1
6. Functional diagram
QF
QF
QF
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Fig 1.
BGA3031
Product data sheet
QF
'$7$
&6
7;B(1
QF
9&&
DDD
Functional diagram
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
3 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
7. Pinning information
QF
9&&
QF
QF
WHUPLQDO
LQGH[DUHD
QF
7.1 Pinning
*1' QF
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Fig 2.
Pin configuration
7.2 Pin description
Table 4.
BGA3031
Product data sheet
Pin description
Symbol
Pin
Description
GND
1
ground
IN_P
2
amplifier input +
IN_N
3
amplifier input –
n.c.
4
not connected
GND
5
ground
CLK
6
clock
DATA
7
data
CS
8
chip select
TX_EN
9
transmit enable
VCC
10
supply voltage for serial interface
n.c.
11
not connected
OUT_N
12
amplifier output –
n.c.
13
not connected
OUT_P
14
amplifier output +
n.c.
15
not connected
n.c.
16
not connected
VCC
17
supply voltage for Variable Gain Amplifier (VGA)
n.c.
18
not connected
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
4 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
Table 4.
Pin description …continued
Symbol
Pin
Description
n.c.
19
not connected
n.c.
20
not connected
Paddle
ground
8. Functional description
8.1 Logic programming
The programming word is set through a shift register via the data, clock and chip select
lines. The data is entered in order with the Most Significant Bit (MSB) first and the Least
Significant Bit (LSB) last. The chip select line must be LOW for the duration of the data
entry, then set HIGH to latch the shift register. The rising edge of the clock pulse shifts
each data value into the register.
Table 5.
Data bit
Programming register
11
10
9
8
7
6
Current
setting [1]
5
4
3
2
1
Function
Register address
Initialize
0
0
0
1
0
0
0
0
0
0
0
0
Set gain
0
0
0
0
C[1]
C[0]
G[5]
G[4]
G[3]
G[2]
G[1]
G[0]
[1]
For current bit settings see Table 7.
[2]
For gain bit settings see Table 6.
'$7$
attenuation (gain) setting
0
[2]
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7;B(1
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Fig 3.
BGA3031
Product data sheet
Serial Data Input Timing
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
5 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
8.2 Register settings
8.2.1 Register address
Only addresses 0000 and 0001 are used. Using any other addresses will not affect the
VGA.
8.2.2 Gain/attenuator setting
The gain shall be controlled via the 3-wire bus. Data bits D0 through D5 set the
gain/attenuator level, with 111111 being the min attenuation setting, and 000101 being the
max attenuation setting. A new gain/attenuator setting can be loaded while the VGA is on
(transmit-enable), but shall not take effect until transmit-enable transitions from LOW to
HIGH.
Table 6.
Gain settings
Gain setting G[5:0]
Typical gain
binary notation
decimal notation
(dB)
000000 to 000101
0 to 5
24
000110
[1]
[1]
23
111110
[1]
62
[1]
33
111111
[1]
63 [1]
34
[1]
6
With every increment of the gain setting between 000110 (6) and 111111 (63) the typical gain will increase
accordingly.
8.2.3 Output stage current setting
The current (of the output stage) shall be controlled via the 3-wire bus. Data bits D6 and
D7 set the current. Setting 11 will set the maximum current for maximum linearity. The
current can be lowered for improved efficiency at lower output power levels, or lower
linearity requirements. Setting 00 will set the minimum current. A new current setting can
be loaded while the VGA is on (transmit-enable), but shall not take effect until
transmit-enable transitions from LOW to HIGH.
Table 7.
Supply current settings
At gain setting 63.
Current setting C[1:0]
Typical supply current
binary notation
decimal notation
(mA)
00
0
215
01
1
260
10
2
290
11
3
325
The current is automatically reduced at lower gain settings while preserving the linearity
performance.
BGA3031
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
6 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
Table 8.
Supply current versus gain setting
Gain setting G[5:0] Typical current (mA)
binary
notation
decimal Current setting C[1:0]
notation 00 (decimal = 0)
Current setting C[1:0]
Current setting C[1:0]
Current setting C[1:0]
01 (decimal = 1)
10 (decimal = 2)
11 (decimal =3)
111111
63
215
260
290
325
110111
55
215
260
290
325
110110
54
165
190
200
215
110001
49
165
190
200
215
110000
48
135
150
160
160
101000
40
135
150
160
160
100111
39
120
125
125
125
000101
5
120
125
125
125
8.3 Tx enable / Tx disable
The amplifier can be disabled or enabled by making TX_EN (pin 9) LOW or HIGH. A LOW
to HIGH Tx enable transition will activate new programed settings. If no new settings are
programmed the last programmed setting will be re-activated.
9. Limiting values
Table 9.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Absolute Maximum Ratings are given as Limiting Values of stress conditions during operation, that must not be exceeded
under the worst probable conditions.
Symbol
Parameter
VCC
supply voltage
VI
input voltage
Conditions
Min
Max
Unit
-
6.0
V
on pin IN_P
0.5
+6.0
V
0.5
+6.0
V
on pin CLK
[1]
0.5
+6.0
V
on pin DATA
[1]
0.5
+6.0
V
on pin CS
[1]
0.5
+6.0
V
on pin TX_EN
[1]
0.5
+6.0
V
0.5
+6.0
V
on pin IN_N
on pin OUT_N
0.5
+6.0
V
Pi(max)
maximum input power
-
40
dBmV
Tamb
ambient temperature
40
+85
C
Tstg
storage temperature
65
+150
C
Tj
junction temperature
VESD
electrostatic discharge voltage
on pin OUT_P
[1]
-
150
C
Human Body Model (HBM);
According JEDEC standard 22-A114E
-
4000
V
Charged Device Model (CDM);
According JEDEC standard 22-C101B
-
2000
V
All digital pins may not exceed VCC as the internal ESD circuit can be damaged. To prevent this it is recommended that control pins are
limited to a maximum of 5 mA.
BGA3031
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
7 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
10. Thermal characteristics
Table 10.
Symbol
Rth(j-bop)
Rth(j-a)
Thermal characteristics
Parameter
Conditions
thermal resistance from junction to bottom of package
thermal resistance from junction to ambient
Typ
Unit
in free air
[1]
14
K/W
in free air
[2]
35
K/W
[1]
Simulated using final element method model resembling the device mounted on the application board. See Section 13.
[2]
Device mounted on application board.
11. Static characteristics
Table 11. Characteristics
Typical values at VCC = 5 V; current setting = 3; Tamb = 25 C; Zi = 200 ; Zo = 75 , unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
ICC
supply current
transmit-enable mode; TX_EN = HIGH
-
325
-
mA
-
6.0
-
mA
VIH
HIGH-level input voltage
[1]
2.0
-
VCC + 0.6
V
VIL
LOW-level input voltage
[1]
0
-
0.8
V
P
power dissipation
-
1.625
[1]
Voltage on the control pins.
transmit-disable mode; TX_EN = LOW
BGA3031
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
W
© NXP Semiconductors N.V. 2014. All rights reserved.
8 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
12. Dynamic characteristics
Table 12. Characteristics
Typical values at VCC = 5 V; current setting = 3; Zi = 200 : Zo = 75 ; Tamb = 25 C, unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
Max Unit
gain code = 111111
[1][2]
-
34
-
gain code = 000000
[1][2]
-
24
-
dB
f = 5 MHz to 42 MHz
[2]
-
 0.4
-
dB
f = 5 MHz to 85 MHz
[2]
-
 0.6
-
dB
gain step
[2]
-
1.0
-
dB
EG(dif)
differential gain error
[2]
-
 0.2
-
dB
Ri(dif)
differential input resistance
-
200
-

Ro(dif)
differential output resistance
-
75
-

frange
frequency range
5
-
85
MHz
Pn
noise power
transmit-disable mode; TX_EN = LOW;
any bandwidth = 160 kHz from
f = 5 MHz to 85 MHz
-
69
-
dBmV
isol
isolation
transmit-disable mode; TX_EN = LOW;
f = 85 MHz
-
90
-
dB
NF
noise figure
transmit mode; gain code = 111111
-
3.5
-
dB
transmit mode; gain code = 101110
-
6.5
-
dB
-
1.8
-
s
55 dBmV output power
-
80
-
mV(p-p)
49 dBmV output power
-
50
-
mV(p-p)
43 dBmV output power
-
25
-
mV(p-p)
37 dBmV output power
-
5
-
mV(p-p)
 31 dBmV output power
-
5
-
mV(p-p)
voltage gain
Gv
Gflat
Gstep
gain flatness
tsw(G)
gain switch time
transmit-disable/transmit-enable
transient duration
Vos
overshoot voltage
transmit-disable/transmit-enable
transient step size
dB
2H
second harmonic level
Pi = 30 dBmV; PL = 64 dBmV into
75  differential impedance
-
80
-
dBc
3H
third harmonic level
Pi = 30 dBmV; PL = 64 dBmV into
75  differential impedance
-
67
-
dBc
IMD3
third-order intermodulation distortion
Pi = 27 dBmV per tone; PL = 61 dBmV
per tone into
75  differential impedance
-
70
-
dBc
PL(1dB)
output power at 1 dB gain
compression
CW signal
-
74
-
dBmV
[1]
Voltage gain does not include loss due to input and output transformers.
[2]
Pi = 30 dBmV.
BGA3031
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
9 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
Table 13. ACLR characteristics
Typical values at VCC = 5 V; current setting = 3; Tamb = 25 C; Zi = 200 : Zo = 75 ; channel bandwidth = 1280 kHz;
integration bandwidth = 1280 kHz; f = 5 MHz to 85 MHz, unless otherwise specified.
Symbol Parameter
Conditions
DOCSIS 3.0 spec.
Min Typ Max Unit
1 input channel
50
-
68 -
dBc
2 input channels
47
-
62 -
dBc
4 input channels
44
-
58 -
dBc
8 input channels
-
-
56 -
dBc
1 input channel
50
-
66 -
dBc
2 input channels
47
-
58 -
dBc
4 input channels
44
-
54 -
dBc
8 input channels
-
-
52 -
dBc
1 input channel
50
-
68 -
dBc
2 input channels
47
-
62 -
dBc
4 input channels
44
-
58 -
dBc
8 input channels
-
-
56 -
dBc
1 input channel
50
-
66 -
dBc
2 input channels
47
-
58 -
dBc
4 input channels
44
-
54 -
dBc
8 input channels
-
-
48 -
dBc
1 input channel
50
-
68 -
dBc
2 input channels
47
-
62 -
dBc
4 input channels
44
-
58 -
dBc
8 input channels
-
-
56 -
dBc
1 input channel
50
-
66 -
dBc
2 input channels
47
-
58 -
dBc
4 input channels
44
-
50 -
dBc
8 input channels
-
-
42 -
dBc
DOCSIS 3.0; 64-QAM
ACLR
adjacent channel leakage ratio
Pi = 29 dBmV; PL = 57 dBmV
DOCSIS 3.0; QPSK
ACLR
adjacent channel leakage ratio
Pi = 33 dBmV; PL = 61 dBmV
DOCSIS 3.0 + 3 dB; 64-QAM
ACLR
adjacent channel leakage ratio
Pi = 29 dBmV; PL = 60 dBmV
DOCSIS 3.0 + 3 dB; QPSK
ACLR
adjacent channel leakage ratio
Pi = 33 dBmV; PL = 64 dBmV
DOCSIS 3.0 + 4 dB; 64-QAM
ACLR
adjacent channel leakage ratio
Pi = 29 dBmV; PL = 61 dBmV
DOCSIS 3.0 + 4 dB; QPSK
ACLR
adjacent channel leakage ratio
BGA3031
Product data sheet
Pi = 33 dBmV; PL = 65 dBmV
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
10 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
13. Application information
13.1 External components
Matching the balanced output of the chip to a single-ended 75  load is accomplished
using a 1 : 1 ratio transformer. For measurements in a 50  system R7 and R8 are added
for impedance transformation from 75  to 50 . R7 and R8 are not required in the final
application.
The transformer also cancels even mode distortion products and common mode signals,
such as the voltage transients that occur while enabling and disabling the amplifiers.
External capacitors are needed for the functionality of the circuit, the pins are internal
nodes in the output amplifier.
9&&
&
9
*1'
5
9&&
9&&
;
5
9&&
5
5
&
&
5
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5
7
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Fig 4.
External components
Table 14. List of components
For application diagram, see Figure 4.
BGA3031
Product data sheet
Component
Description
Value
Size
C1, C2, C3, C4
capacitor
10 nF
SMD 0603
C5
capacitor
100 nF
SMD 0603
C6
capacitor
10 F
SMD 1206
R1, R6
resistor
0
SMD 0603
R2, R3
resistor
0
SMD 0805
R4, R5
resistor
4.7 
SMD 0603
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Rev. 3 — 20 November 2014
Supplier: Part No.
© NXP Semiconductors N.V. 2014. All rights reserved.
11 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
Table 14. List of components …continued
For application diagram, see Figure 4.
Component
Description
Value
Size
Supplier: Part No.
R7
resistor
43.3 
SMD 0603
R8
resistor
86.6 
SMD 0603
T1
input balun
-
-
TOKO: #617DB-1714
T2
output balun
-
-
M/A-COM: MABA-009572-CF18A0
X1
2-pin header
-
-
X2, X3
SMA connector
-
-
X4
10-pin header
-
-
FCI: Minitek
13.2 Graphs
DDD
*Y
G%
DDD
*Y
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VCC = 5 V; current setting = 3; Tamb = 25 C;
Pi = 30 dBmV.
I0+]
VCC = 5 V; current setting = 3; Tamb = 25 C;
Pi = 30 dBmV.
(1) f = 5 MHz
(1) gain setting = 5
(2) f = 42 MHz
(2) gain setting = 20
(3) f = 85 MHz
(3) gain setting = 36
(4) gain setting = 50
(5) gain setting = 63
Fig 5.
Voltage gain as a function of gain setting;
typical values
BGA3031
Product data sheet
Fig 6.
Voltage gain as a function of frequency;
typical values
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
12 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
DDD
(*GLI
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DDD
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G%F
JDLQVHWWLQJ
VCC = 5 V; current setting = 3; Tamb = 25 C;
Pi = 30 dBmV.
I0+]
VCC = 5 V; Pi = 30 dBmV; PL = 64 dBmV;
current setting = 3; gain setting = 63.
(1) f = 5 MHz
(1) Tamb = 40 C
(2) f = 42 MHz
(2) Tamb = 10 C
(3) f = 85 MHz
(3) Tamb = +25 C
(4) Tamb = +85 C
Fig 7.
Differential gain error as a function of gain
setting; typical values
Fig 8.
Second harmonic level as a function of
frequency; typical values
DDD
Į+
G%F
DDD
,0'
G%F
I0+]
VCC = 5 V; Pi = 30 dBmV; PL = 64 dBmV;
current setting = 3; gain setting = 63.
(1) Tamb = 40 C
(2) Tamb = 10 C
(2) Tamb = 10 C
(3) Tamb = +25 C
(3) Tamb = +25 C
(4) Tamb = +85 C
(4) Tamb = +85 C
Third harmonic level as a function of
frequency; typical values
BGA3031
Product data sheet
I0+]
VCC = 5 V; Pi = 27 dBmV per tone; PL = 61 dBmV per
tone; current setting = 3; gain setting = 63.
(1) Tamb = 40 C
Fig 9.
Fig 10. Third order intermodulation distortion as a
function of frequency; typical values
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Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
13 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
DDD
,0'
G%F
DDD
3/G%
G%P9
I0+]
(1) Tamb = 40 C
(1) gain setting = 39
(2) Tamb = 10 C
(2) gain setting = 48
(3) Tamb = +25 C
(3) gain setting = 54
(4) Tamb = +85 C
(4) gain setting = 63
DDD
1)
G%
Fig 12. Output power at 1 dB gain compression as a
function of frequency; typical values
DDD
3/
G%P9
I0+]
VCC = 5 V; current setting = 3; Tamb = 25 C;
Pi = 30 dBmV.
VCC = 5 V; Pi = 30 dBmV per tone; PL = 64 dBmV per
tone; current setting = 3; gain setting = 63.
Fig 11. Third order intermodulation distortion as a
function of frequency; typical values
3LG%P9
Tamb = 25 C; VCC = 5 V; f = 85 MHz; gain setting = 63.
JDLQVHWWLQJ
Tamb = 25 C; VCC = 5 V; current setting = 3.
(1) current setting = 0
(1) f = 5 MHz
(2) current setting = 1
(2) f = 42 MHz
(3) current setting = 2
(3) f = 85 MHz
(4) current setting = 3
Fig 13. Output power as a function of input power;
typical values
BGA3031
Product data sheet
Fig 14. Noise figure as a function of gain setting;
typical values
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Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
14 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
DDD
DDD
,&&
$
1)
G%
JDLQVHWWLQJ
JDLQVHWWLQJ
Tamb = 25 C; VCC = 5 V.
f = 45 MHz; VCC = 5 V; current setting = 3.
(1) Tamb = 40 C
(1) current setting = 0
(2) Tamb = 10 C
(2) current setting = 1
(3) Tamb = +25 C
(3) current setting = 2
(4) Tamb = +85 C
(4) current setting = 3
Fig 15. Noise figure as a function of gain setting;
typical values
Fig 16. Supply current as a function of gain setting;
typical values
DDD
,&&
$
DDD
5/LQ
G%
7DPEƒ&
I0+]
Tamb = 25 C; VCC = 5 V; current setting = 3.
VCC = 5 V; current setting = 3.
(1) gain setting = 20
(1) gain setting = 5
(2) gain setting = 44
(2) gain setting = 36
(3) gain setting = 52
(3) gain setting = 63
(4) gain setting = 60
Fig 17. Supply current as a function of ambient
temperature; typical values
BGA3031
Product data sheet
Fig 18. Input return loss as a function of frequency;
typical values
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
15 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
DDD
5/RXW
G%
I0+]
Tamb = 25 C; VCC = 5 V; current setting = 3.
(1) gain setting = 5
(2) gain setting = 63
(3) amplifier disabled (TX_EN LOW)
Fig 19. Output return loss as a function of frequency; typical values
DDD
$&/5
G%F
DDD
$&/5
G%F
I0+]
One carrier 64-QAM; Tamb = 25 C; VCC = 5 V;
max. current; Pi = 29 dBmV.
(1) PL = 57 dBmV
(2) PL = 60 dBmV
(2) PL = 60 dBmV
(3) PL = 61 dBmV
(3) PL = 61 dBmV
(4) DOCSIS 3.0 specification
(4) DOCSIS 3.0 specification
BGA3031
Product data sheet
Two carrier 64-QAM; Tamb = 25 C; VCC = 5 V;
max. current; Pi = 29 dBmV.
(1) PL = 57 dBmV
Fig 20. Adjacent channel leakage ratio as a function of
frequency; typical values
I0+]
Fig 21. Adjacent channel leakage ratio as a function of
frequency; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
16 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
DDD
$&/5
G%F
DDD
$&/5
G%F
I0+]
Four carrier 64-QAM; Tamb = 25 C; VCC = 5 V;
max. current; Pi = 29 dBmV.
I0+]
Eight carrier 64-QAM; Tamb = 25 C; VCC = 5 V;
max. current; Pi = 29 dBmV.
(1) PL = 57 dBmV
(1) PL = 57 dBmV
(2) PL = 60 dBmV
(2) PL = 60 dBmV
(3) PL = 61 dBmV
(3) PL = 61 dBmV
(4) DOCSIS 3.0 specification
Fig 22. Adjacent channel leakage ratio as a function of
frequency; typical values
DDD
$&/5
G%F
DDD
$&/5
G%F
Fig 23. Adjacent channel leakage ratio as a function of
frequency; typical values
I0+]
One carrier QPSK; Tamb = 25 C; VCC = 5 V;
max. current; Pi = 33 dBmV.
(1) PL = 61 dBmV
(2) PL = 64 dBmV
(2) PL = 64 dBmV
(3) PL = 65 dBmV
(3) PL = 65 dBmV
(4) DOCSIS 3.0 specification
(4) DOCSIS 3.0 specification
BGA3031
Product data sheet
Two carrier QPSK; Tamb = 25 C; VCC = 5 V;
max. current; Pi = 33 dBmV.
(1) PL = 61 dBmV
Fig 24. Adjacent channel leakage ratio as a function of
frequency; typical values
I0+]
Fig 25. Adjacent channel leakage ratio as a function of
frequency; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
17 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
DDD
$&/5
G%F
DDD
$&/5
G%F
I0+]
Four carrier QPSK; Tamb = 25 C; VCC = 5 V;
max. current; Pi = 33 dBmV.
I0+]
Eight carrier QPSK; Tamb = 25 C; VCC = 5 V;
max. current; Pi = 33 dBmV.
(1) PL = 61 dBmV
(1) PL = 61 dBmV
(2) PL = 64 dBmV
(2) PL = 64 dBmV
(3) PL = 65 dBmV
(3) PL = 65 dBmV
(4) DOCSIS 3.0 specification
Fig 26. Adjacent channel leakage ratio as a function of
frequency; typical values
BGA3031
Product data sheet
Fig 27. Adjacent channel leakage ratio as a function of
frequency; typical values
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
18 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
14. Package outline
+94)1SODVWLFWKHUPDOHQKDQFHGYHU\WKLQTXDGIODWSDFNDJHQROHDGV
WHUPLQDOVERG\[[PP
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Fig 28. Package outline SOT662-1 (HVQFN20)
BGA3031
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
19 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
15. Handling information
15.1 Moisture sensitivity
Table 15.
Moisture sensitivity level
Test methodology
Class
JESD-22-A113
1
16. Abbreviations
Table 16.
Abbreviations
Acronym
Description
CATV
Community Antenna TeleVision
CW
Continuous Wave
ESD
ElectroStatic Discharge
HVQFN
Heatsink Very thin Quad Flat pack No leads
QAM
Quadrature Amplitude Modulation
QPSK
Quadrature Phase-Shift Keying
SMA
SubMiniature version A
SMD
Surface-Mounted Device
Tx
Transmission
VoIP
Voice over Internet Protocol
17. Revision history
Table 17.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
BGA3031 v.3
20141120
Product data sheet
-
BGA3031 v.2
Modifications
•
•
•
•
•
•
•
•
Tcase replaced by Tamb in whole document
Table 9 on page 7: added extra line: Tamb, ambient temperature, 40 C min., +85 C max.
Figure 8 on page 13: figure updated
Figure 9 on page 13: figure updated
Figure 10 on page 13: figure updated
Figure 11 on page 14: figure updated
Figure 15 on page 15: figure updated
Figure 17 on page 15: figure updated
BGA3031 v.2
20140226
Product data sheet
-
BGA3031 v.1
BGA3031 v.1
20130815
Product data sheet
-
-
BGA3031
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
20 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
18. Legal information
18.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
BGA3031
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
21 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
19. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
BGA3031
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 20 November 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
22 of 23
BGA3031
NXP Semiconductors
DOCSIS 3.0 plus upstream amplifier
20. Contents
1
2
3
4
5
6
7
7.1
7.2
8
8.1
8.2
8.2.1
8.2.2
8.2.3
8.3
9
10
11
12
13
13.1
13.2
14
15
15.1
16
17
18
18.1
18.2
18.3
18.4
19
20
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 5
Logic programming . . . . . . . . . . . . . . . . . . . . . . 5
Register settings . . . . . . . . . . . . . . . . . . . . . . . . 6
Register address . . . . . . . . . . . . . . . . . . . . . . . 6
Gain/attenuator setting . . . . . . . . . . . . . . . . . . . 6
Output stage current setting . . . . . . . . . . . . . . . 6
Tx enable / Tx disable . . . . . . . . . . . . . . . . . . . 7
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal characteristics . . . . . . . . . . . . . . . . . . 8
Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Application information. . . . . . . . . . . . . . . . . . 11
External components . . . . . . . . . . . . . . . . . . . 11
Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19
Handling information. . . . . . . . . . . . . . . . . . . . 20
Moisture sensitivity . . . . . . . . . . . . . . . . . . . . . 20
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 20
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Contact information. . . . . . . . . . . . . . . . . . . . . 22
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 20 November 2014
Document identifier: BGA3031
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