Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2G22S160--01S
Rev. 0, 5/2015
RF Power GaN Transistor
This 32 W RF power GaN transistor is designed for cellular base station
applications covering the frequency range of 1800 to 2200 MHz.
This part is characterized and performance is guaranteed for applications
operating in the 1800 to 2200 MHz band. There is no guarantee of performance
when this part is used in applications designed outside of these frequencies.
2100 MHz
 Typical Single--Carrier W--CDMA Performance: VDD = 48 Vdc,
IDQ = 150 mA, Pout = 32 W Avg., Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
IRL
(dB)
2110 MHz
19.6
38.0
7.2
–30.3
–20
2140 MHz
19.9
38.3
7.1
–30.0
–23
2170 MHz
20.0
39.0
7.1
–29.7
–19
A2G22S160--01SR3
1800–2200 MHz, 32 W AVG., 48 V
AIRFAST RF POWER GaN
TRANSISTOR
1800 MHz
 Typical Single--Carrier W--CDMA Performance: VDD = 48 Vdc,
IDQ = 150 mA, Pout = 32 W Avg., Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
IRL
(dB)
1805 MHz
18.2
36.9
7.1
–33.4
–11
1840 MHz
18.5
37.4
7.1
–33.0
–16
1880 MHz
18.6
38.2
7.0
–32.5
–16
NI--400S--2S
1 RFout/VDS
RFin/VGS 2
Features
 High Terminal Impedances for Optimal Broadband Performance
 Designed for Digital Predistortion Error Correction Systems
 Optimized for Doherty Applications
(Top View)
Figure 1. Pin Connections
 Freescale Semiconductor, Inc., 2015. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2G22S160--01SR3
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
125
Vdc
Gate--Source Voltage
VGS
–8, 0
Vdc
Operating Voltage
VDD
0 to +55
Vdc
Storage Temperature Range
Tstg
– 65 to +150
C
TC
– 55 to +150
C
TJ
– 55 to +225
C
Case Operating Temperature Range
Operating Junction Temperature Range
(1)
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 76C, 32 W CW, 48 Vdc, IDQ = 150 mA, 2140 MHz
Symbol
Value (2)
Unit
RJC
1.7
C/W
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
1B
Machine Model (per EIA/JESD22--A115)
A
Charge Device Model (per JESD22--C101)
IV
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
IDSS
—
—
5
mAdc
V(BR)DSS
150
—
—
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 16.2 Adc)
VGS(th)
–3.8
–3.0
–2.3
Vdc
Gate Quiescent Voltage
(VDD = 48 Vdc, ID = 150 mAdc, Measured in Functional Test)
VGS(Q)
–3.6
–3.0
–2.3
Vdc
Characteristic
Off Characteristics
Drain--Source Leakage Current
(VGS = –8 Vdc, VDS = 55 Vdc)
Drain--Source Breakdown Voltage
(VGS = –8 Vdc, ID = 16.2 mAdc)
On Characteristics
1. Continuous use at maximum temperature will affect MTTF.
2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955.
(continued)
A2G22S160--01SR3
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
(1)
Functional Tests
(In Freescale Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQ = 150 mA, Pout = 32 W Avg., f = 2110 MHz,
Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz
Channel Bandwidth @ 5 MHz Offset. [See note on correct biasing sequence.]
Power Gain
Gps
18.8
19.6
21.8
dB
Drain Efficiency
D
35.5
38.0
—
%
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
PAR
6.8
7.2
—
dB
ACPR
—
–30.3
–28.0
dBc
IRL
—
–20
–9
dB
Input Return Loss
Load Mismatch (In Freescale Test Fixture, 50 ohm system) IDQ = 150 mA, f = 2140 MHz
VSWR 10:1 at 55 Vdc, 125 W CW Output Power
(3 dB Input Overdrive from 125 W CW Rated Power)
No Device Degradation
Typical Performance (In Freescale Test Fixture, 50 ohm system) VDD = 48 Vdc, IDQ = 150 mA, 2110–2170 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
125
—
W
Pout @ 3 dB Compression Point (2)
P3dB
—
160
—
W

—
–21.8
—

VBWres
—
150
—
MHz
Gain Flatness in 60 MHz Bandwidth @ Pout = 32 W Avg.
GF
—
0.4
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.02
—
dB/C
P1dB
—
0.02
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 2110–2170 MHz bandwidth)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C)
Table 5. Ordering Information
Device
A2G22S160--01SR3
Tape and Reel Information
R3 Suffix = 250 Units, 32 mm Tape Width, 13--inch Reel
Package
NI--400S--2S
1. Part internally input matched.
2. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
NOTE: Correct Biasing Sequence for GaN Depletion Mode Transistors
Turning the device ON
1. Set VGS to the pinch--off (VP) voltage, typically –5 V
2. Turn on VDS to nominal supply voltage (50 V)
3. Increase VGS until IDS current is attained
4. Apply RF input power to desired level
Turning the device OFF
1. Turn RF power off
2. Reduce VGS down to VP, typically –5 V
3. Reduce VDS down to 0 V (Adequate time must be allowed for VDS to
reduce to 0 V to prevent severe damage to device.)
4. Turn off VGS
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
3
VGG
C6 C7 C9
VDD
C16
C12 C13
C5
C8 C10
R1
C2
C1
C11
C14
C15
C3 C4
AFG22S160--01S
Rev. 4
D64348
Figure 2. A2G22S160--01SR3 Test Circuit Component Layout — 2110–2170 MHz
Table 6. A2G22S160--01SR3 Test Circuit Component Designations and Values — 2110–2170 MHz
Part
Description
Part Number
Manufacturer
C1, C9, C10, C11, C12, C15
10 pF Chip Capacitors
ATC600F100JT250XT
ATC
C2, C3
1.8 pF Chip Capacitors
ATC600F1R8BT250XT
ATC
C4
1.2 pF Chip Capacitor
ATC600F1R2BT250XT
ATC
C5
470 pF Chip Capacitor
ATC100B471JT200XT
ATC
C6
1000 pF Chip Capacitor
ATC100B102JT50XT
ATC
C7, C13
1 F Chip Capacitors
GRM32ER72A105KA01L
Murata
C8
10 F Chip Capacitor
GRM31CR61H106KA12L
Murata
C14
10 F Chip Capacitor
C5750X7S2A106M230KB
TDK
C16
220 F, 100 V Electrolytic Capacitor
EEV-FK2A221M
Panasonic-ECG
R1
2.37 . 1/4 W Chip Resistor
CRCW12062r37FNEA
Vishay
PCB
Rogers RO4350B, 0.020, r = 3.66
D64348
MTL
A2G22S160--01SR3
4
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS — 2110–2170 MHz
19.2
ACPR
19
38
36
–30
–9
–30.2
–12
18.8
–30.4
18.6
–30.6
18.4
PARC –30.8
18.2
2060
IRL
2080
2100
2120 2140 2160
f, FREQUENCY (MHz)
2180
2200
–15
–18
–21
–31
2220
–24
–2.6
–2.8
–3
–3.2
–3.4
PARC (dB)
40
IRL, INPUT RETURN LOSS (dB)
19.4
42
3.84 MHz Channel Bandwidth
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
D
D, DRAIN
EFFICIENCY (%)
Gps, POWER GAIN (dB)
19.6
44
Gps
VDD = 48 Vdc, Pout = 32 W (Avg.)
20 I = 150 mA, Single--Carrier W--CDMA
DQ
19.8
ACPR (dBc)
20.2
–3.6
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 32 Watts Avg.
–10
VDD = 48 Vdc, Pout = 27 W (PEP), IDQ = 150 mA
Two--Tone Measurements, (f1 + f2)/2 = Center
Frequency of 2140 MHz
–20
IM3--U
–30
IM3--L
–40
IM7--U
–50
–60
IM5--L
IM5--U
1
IM7--L
10
100
200
TWO--TONE SPACING (MHz)
20.5
0
20
19.5
19
18.5
18
VDD = 48 Vdc, IDQ = 150 mA, f = 2140 MHz
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
–1
D
–1 dB = 15.5 W
–2
60
–26
50
–28
40
30
Gps
–3
20
–2 dB = 22.4 W
PARC
–3 dB = 30.4 W
–4
Input Signal PAR = 9.9 dB @ 0.01%
Probability on CCDF
ACPR
–5
2
10
18
26
Pout, OUTPUT POWER (WATTS)
34
10
0
42
–30
–32
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
21
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
–34
–36
–38
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 2110–2170 MHz
Gps, POWER GAIN (dB)
22
2170 MHz
2140 MHz
2110 MHz
2140 MHz
2110 MHz
65
–10
55
–15
D
2140 MHz
20
45
VDD = 48 Vdc, IDQ = 150 mA
18 Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01%
16 Probability on CCDF
2170 MHz 35
25
2110 MHz
Gps
14
15
–20
–25
–30
ACPR (dBc)
2170 MHz
D, DRAIN EFFICIENCY (%)
24
–35
ACPR
12
1
10
Pout, OUTPUT POWER (WATTS) AVG.
100
5
200
–40
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
5
22
0
Gain
20
–5
19
–10
18
IRL (dB)
GAIN (dB)
21
VDD = 48 Vdc
Pin = 0 dBm
IDQ = 150 mA
–15
IRL
17
16
1800
–20
1900
2000
2100 2200 2300
f, FREQUENCY (MHz)
2400
2500
–25
2600
Figure 7. Broadband Frequency Response
A2G22S160--01SR3
6
RF Device Data
Freescale Semiconductor, Inc.
Table 7. Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ = 136 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
4.15 – j6.27
5.00 + j5.62
8.53 – j8.62
20.2
50.3
106
52.3
–24
2140
4.07 – j5.17
4.98 + j4.73
10.0 – j9.31
20.2
50.4
110
52.9
–26
2170
4.09 – j4.55
4.50 + j4.20
12.0 – j9.99
19.9
50.3
108
53.2
–18
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
4.15 – j6.27
5.06 + j5.47
10.3 – j7.91
18.0
51.7
147
61.3
–28
2140
4.07 – j5.17
5.10 + j4.68
10.6 – j8.37
18.2
51.7
148
61.1
–29
2170
4.09 – j4.55
4.76 + j3.87
12.0 – j9.08
18.2
51.8
150
60.8
–21
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 8. Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQ = 136 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
4.15 – j6.27
6.23 + j5.33
6.50 – j4.70
21.9
49.3
86
60.3
–25
2140
4.07 – j5.17
7.85 + j2.84
4.69 – j4.08
23.1
48.5
71
61.5
–31
2170
4.09 – j4.55
4.69 + j3.48
9.05 – j4.91
21.6
49.2
83
59.6
–15
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
5.89 – j2.96
20.8
49.9
97
72.2
–34
5.06 + j2.23
6.46 – j2.95
21.0
49.9
99
72.8
–29
4.10 + j2.54
8.12 – j3.23
20.2
50.4
110
71.1
–22
f
(MHz)
Zsource
()
Zin
()
2110
4.15 – j6.27
6.45 + j3.06
2140
4.07 – j5.17
2170
4.09 – j4.55
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
7
P1dB -- TYPICAL LOAD PULL CONTOURS — 2140 MHz
4
4
46.5
2
48
IMAGINARY ()
49
E
49.5
–6
50
–8
54
–4
56
E
60
–6
2
4
12
10
8
REAL ()
6
14
16
–12
58
52
P
46
4
2
48
10
8
REAL ()
6
50
12
14
16
Figure 9. P1dB Load Pull Efficiency Contours (%)
4
4
2
2
22.5
23.5
0
0
23
–2
–4
21.5
22
E
IMAGINARY ()
IMAGINARY ()
52
–2
–10
Figure 8. P1dB Load Pull Output Power Contours (dBm)
21
–6
20.5
–8
4
6
10
8
REAL ()
12
–4
E
–6
--34
--32
--30
–10
19.5
2
–2
–8
20
P
–10
–12
50
–8
P
–10
–12
48
0
48.5
–2
–4
46
2
47.5
0
IMAGINARY ()
47
14
16
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
–12
–28
–20
–26
P
–22
–24
--36
2
4
6
10
8
REAL ()
12
14
16
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2G22S160--01SR3
8
RF Device Data
Freescale Semiconductor, Inc.
P3dB -- TYPICAL LOAD PULL CONTOURS — 2140 MHz
4
2
47.5
48.5
48
49
4
49.5
50
50.5
–2
51
E
–4
51.5
–6
–8
2
4
10
8
REAL ()
6
12
14
16
66
E
64
68
62
–6
–12
60
P
58
2
4
6
10
8
REAL ()
12
56
14
16
Figure 13. P3dB Load Pull Efficiency Contours (%)
4
4
2
2
20
20.5
21
–2
E
–4
0
19.5
IMAGINARY ()
21.5
0
IMAGINARY ()
72
–4
–10
Figure 12. P3dB Load Pull Output Power Contours (dBm)
19
18.5
–6
–8
18
4
6
10
8
REAL ()
E
–4
–6
–38 –36
12
14
16
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
–30
–10
17.5
2
–2
–8
P
–10
–12
70
–2
–8
P
–10
–12
56
0
IMAGINARY ()
IMAGINARY ()
0
58
60
58
2
–12
–34
–32
–28
P
–22
–26
–24
2
4
6
10
8
REAL ()
12
14
16
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
9
VGG
VDD
C5 C6 C8
C16
C10 C12
C4
C7
C9
C11
R1
C2
C1
C13
C14
C15
C3
A2G22S160--01S
Rev. 4
D64348
Figure 16. A2G22S160--01SR3 Test Circuit Component Layout — 1805–1880 MHz
Table 9. A2G22S160--01SR3 Test Circuit Component Designations and Values — 1805–1880 MHz
Part
Description
Part Number
Manufacturer
C1, C8, C9, C10, C11, C15
10 pF Chip Capacitors
ATC600F100JT250XT
ATC
C2
1.1 pF Chip Capacitor
ATC600F1R2BT250XT
ATC
C3
1.8 pF Chip Capacitor
ATC600F1R8BT250XT
ATC
C4
470 pF Chip Capacitor
ATC100B471JT200XT
ATC
C5
1000 pF Chip Capacitor
ATC100B102JT50XT
ATC
C6, C12
1 F Chip Capacitors
GRM32ER72A105KA01L
Murata
C7
10 F Chip Capacitor
GRM31CR61H106KA12L
Murata
C13
10 F Chip Capacitor
C5750X7S2A106M230KB
TDK
C14
0.7 pF Chip Capacitor
ATC600F0R7BT250XT
ATC
C16
220 F, 100 V Electrolytic Capacitor
EEV-FK2A221M
Panasonic-ECG
R1
2.37 , 1/4 W Chip Resistor
CRCW12062R37FNEA
Vishay
PCB
Rogers RO4350B, 0.020, r = 3.66
D64348
MTL
A2G22S160--01SR3
10
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS — 1805–1880 MHz
38
37
18
17.8
PARC
17.6
ACPR
–31.5
–6
–32
–9
–32.5
17.4
–33
17.2
–33.5
17
1760
IRL
1780
1800
1820 1840 1860
f, FREQUENCY (MHz)
1880
1900
–34
1920
–12
–15
–18
–21
–2.6
–2.7
–2.8
–2.9
–3
PARC (dB)
39
IRL, INPUT RETURN LOSS (dB)
40
ACPR (dBc)
Gps, POWER GAIN (dB)
VDD = 48 Vdc, Pout = 32 W (Avg.), IDQ = 150 mA
18.8 Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
18.6 Input Signal PAR = 9.9 dB @ 0.01%
Gps
Probability on CCDF
18.4
D
18.2
D, DRAIN
EFFICIENCY (%)
41
19
–3.1
Figure 17. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 32 Watts Avg.
1805 MHz
18
ACPR
VDD = 48 Vdc, IDQ = 150 mA
Single--Carrier W--CDMA, 3.84 MHz
16
Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01%
14 Probability on CCDF
–15
50
–20
40
20
1840 MHz
1880 MHz 1805 MHz
10
Pout, OUTPUT POWER (WATTS) AVG.
1
60
30
Gps
12
10
D
100
10
0
200
–25
–30
–35
ACPR (dBc)
1880 MHz 1840 MHz
20
Gps, POWER GAIN (dB)
1880 MHz
1840 MHz
1805 MHz
D, DRAIN EFFICIENCY (%)
22
–40
–45
Figure 18. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
10
21
VDD = 48 Vdc
Pin = 0 dBm
IDQ = 150 mA
GAIN (dB)
19
5
Gain
0
18
–5
17
–10
16
–15
15
1400
IRL
1500
1600
1700 1800 1900
f, FREQUENCY (MHz)
2000
2100
IRL (dB)
20
–20
2200
Figure 19. Broadband Frequency Response
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
11
Table 10. Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ = 140 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
1805
1.26 – j5.77
1.57 + j5.91
1840
1.64 – j5.93
1.84 + j6.11
1880
1.97 – j6.03
2.06 + j6.39
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
8.58 – j5.21
19.9
51.6
145
60.9
–41
9.10 – j5.90
19.9
51.4
137
59.2
–38
8.40 – j6.54
19.7
51.1
129
56.5
–34
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1805
1.26 – j5.77
1.46 + j5.88
9.56 – j3.93
18.3
52.2
167
68.4
–34
1840
1.64 – j5.93
1.64 + j6.03
9.50 – j4.67
17.7
52.1
163
67.1
–32
1880
1.97 – j6.03
1.98 + j6.41
9.42 – j5.46
17.8
51.9
156
64.2
–29
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 11. Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQ = 140 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
1805
1.26 – j5.77
1.51 + j6.34
6.08 – j0.80
21.8
50.3
107
70.2
–38
1840
1.64 – j5.93
1.71 + j6.74
5.51 – j1.09
22.1
50.0
100
69.9
–36
1880
1.97 – j6.03
2.05 + j7.16
5.18 – j1.44
22.1
49.6
92
68.8
–34
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
6.86 – j0.08
20.0
51.2
130
77.2
–36
1.91 + j6.84
6.28 – j0.28
20.3
50.8
120
77.5
–35
2.42 + j7.30
5.75 – j0.50
20.3
50.3
108
77.0
–37
f
(MHz)
Zsource
()
Zin
()
1805
1.26 – j5.77
1.58 + j6.43
1840
1.64 – j5.93
1880
1.97 – j6.03
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2G22S160--01SR3
12
RF Device Data
Freescale Semiconductor, Inc.
P1dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz
4
47.5
2
4
48
48.5
49
49.5
50
E
–2
50.5
–4
–6
P
51
–8
2
50
4
10
8
REAL ()
6
12
14
16
64
60
–4
–6
–12
58
P
54
2
4
10
8
REAL ()
6
12
14
16
Figure 21. P1dB Load Pull Efficiency Contours (%)
4
4
2
23
0
22.5
22
E
–2
21.5
0
21
IMAGINARY ()
2
IMAGINARY ()
62
66
–10
48.5
Figure 20. P1dB Load Pull Output Power Contours (dBm)
20.5
–4
–6
20
P
19.5
–8
2
4
6
10
8
REAL ()
12
E
–2
–4
–6
P
–40 –38
–8
19
–10
–12
68
E
–2
–8
–10
–12
56
0
IMAGINARY ()
IMAGINARY ()
0
54
2
–36
–10
14
16
Figure 22. P1dB Load Pull Gain Contours (dB)
NOTE:
–12
–34 –32
–24
–30
2
4
6
–28
10
8
REAL ()
–26
12
14
16
Figure 23. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
13
P3dB -- TYPICAL LOAD PULL CONTOURS — 1840 MHz
4
4
48
2
2
E
–2
–4
P
–6
52
–8
–12
51.5
50
48.5
2
50.5
49.5
72
–2
68
70
–4
64
66
P
62
–6
4
–10
51
12
10
8
REAL ()
6
14
16
–12
Figure 24. P3dB Load Pull Output Power Contours (dBm)
4
2
10
8
REAL ()
6
12
14
16
Figure 25. P3dB Load Pull Efficiency Contours (%)
4
4
21.5
21
0
20.5
E
–2
2
20
0
19.5
19
–4
IMAGINARY ()
2
IMAGINARY ()
74
E
–8
49
–10
76
0
IMAGINARY ()
IMAGINARY ()
0
18.5
P
18
–6
17.5
–2
–4
–8
–10
–10
–12
–12
4
6
10
8
REAL ()
12
14
16
Figure 26. P3dB Load Pull Gain Contours (dB)
NOTE:
P
–38
–6
–8
2
E
–34
–36
–40
–30
–42
2
–32
–28
–26
4
6
10
8
REAL ()
12
14
16
Figure 27. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2G22S160--01SR3
14
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
15
A2G22S160--01SR3
16
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 RF High Power Model
 s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.freescale.com/rf
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
May 2015
Description
 Initial Release of Data Sheet
A2G22S160--01SR3
RF Device Data
Freescale Semiconductor, Inc.
17
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A2G22S160--01SR3
Document Number: A2G22S160--01S
Rev. 0, 5/2015
18
RF Device Data
Freescale Semiconductor, Inc.
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