Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2I22D050N
Rev. 1, 3/2015
RF LDMOS Wideband Integrated
Power Amplifiers
The A2I22D050N wideband integrated circuit is designed with on--chip
matching that makes it usable from 1800 to 2200 MHz. This multi--stage
structure is rated for 24 to 32 V operation and covers all typical cellular base
station modulation formats.
2100 MHz
 Typical Single--Carrier W--CDMA Characterization Performance:
VDD = 28 Vdc, IDQ1(A+B) = 80 mA, IDQ2(A+B) = 520 mA, Pout = 5.3 W Avg.,
Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF.(1)
Frequency
Gps
(dB)
PAE
(%)
ACPR
(dBc)
2110 MHz
32.2
17.6
–48.4
2140 MHz
32.4
17.8
–48.2
2170 MHz
32.6
17.9
–47.0
A2I22D050NR1
A2I22D050GNR1
1800–2200 MHz, 5.3 W AVG., 28 V
AIRFAST RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS
TO--270WB--15
PLASTIC
A2I22D050NR1
1800 MHz
 Typical Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQ1(A+B) = 70 mA, IDQ2(A+B) = 470 mA, Pout = 5.3 W Avg.,
Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF.(1)
Frequency
Gps
(dB)
PAE
(%)
ACPR
(dBc)
1805 MHz
31.8
18.4
–47.5
1840 MHz
31.7
18.2
–50.6
1880 MHz
31.5
17.9
–51.8
TO--270WBG--15
PLASTIC
A2I22D050GNR1
1. All data measured in fixture with device soldered to heatsink.
Features
 On--Chip Matching (50 Ohm Input, DC Blocked)
 Integrated Quiescent Current Temperature Compensation with Enable/Disable Function (2)
 Designed for Digital Predistortion Error Correction Systems
 Optimized for Doherty Applications
VDS1A
RFinA
VGS1A
VGS2A
VGS1B
VGS2B
RFout1/VDS2A
Quiescent Current
Temperature Compensation (2)
Quiescent Current
Temperature Compensation (2)
RFinB
RFout2/VDS2B
VDS1B
Figure 1. Functional Block Diagram
VDS1A
VGS2A
VGS1A
RFinA
N.C.
GND
GND
N.C.
RFinB
VGS1B
VGS2B
VDS1B
1
2
3
4
5
6
7
8
9
10
11
12
15
RFout1/VDS2A
14
13
GND
RFout2/VDS2B
(Top View)
Note: Exposed backside of the package is
the source terminal for the transistors.
Figure 2. Pin Connections
2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes – AN1977 or AN1987.
 Freescale Semiconductor, Inc., 2014–2015. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2I22D050NR1 A2I22D050GNR1
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
–0.5, +65
Vdc
Gate–Source Voltage
VGS
–0.5, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +150
C
Operating Junction Temperature Range (1,2)
TJ
–40 to +225
C
Input Power
Pin
28
dBm
Symbol
Value (2,3)
Unit
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 80C, 5.3 W CW, 2140 MHz
Stage 1, 28 Vdc, IDQ1(A+B) = 80 mA
Stage 2, 28 Vdc, IDQ2(A+B) = 520 mA
RJC
C/W
5.1
1.1
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
1B
Machine Model (per EIA/JESD22--A115)
A
Charge Device Model (per JESD22--C101)
II
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD22--A113, IPC/JEDEC J--STD--020
Rating
Package Peak Temperature
Unit
3
260
C
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 1.5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 12 Adc)
VGS(th)
1.2
2.0
2.7
Vdc
Gate Quiescent Voltage
(VDS = 28 Vdc, IDQ1(A+B) = 80 mAdc)
VGS(Q)
—
2.7
—
Vdc
Fixture Gate Quiescent Voltage
(VDD = 28 Vdc, IDQ1(A+B) = 80 mAdc, Measured in Functional Test)
VGG(Q)
6.1
6.8
7.6
Vdc
Characteristic
Stage 1 -- Off Characteristics
Stage 1 -- On Characteristics
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes – AN1955.
(continued)
A2I22D050NR1 A2I22D050GNR1
2
RF Device Data
Freescale Semiconductor, Inc.
Table 5. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 1.5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage (1)
(VDS = 10 Vdc, ID = 46 Adc)
VGS(th)
1.2
2.0
2.7
Vdc
Gate Quiescent Voltage
(VDS = 28 Vdc, IDQ2(A+B) = 520 mAdc)
VGS(Q)
—
2.7
—
Vdc
Fixture Gate Quiescent Voltage
(VDD = 28 Vdc, IDQ2(A+B) = 520 mAdc, Measured in Functional Test)
VGG(Q)
5.3
6.1
6.8
Vdc
Drain--Source On--Voltage (1)
(VGS = 10 Vdc, ID = 1 Adc)
VDS(on)
0.1
0.24
1.5
Vdc
Stage 2 -- Off Characteristics
(1)
Stage 2 -- On Characteristics
Functional Tests (2,3) (In Freescale Production Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1(A+B) = 80 mA, IDQ2(A+B) = 520 mA,
Pout = 5.3 W Avg., f = 2140, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
30
31.1
34.0
dB
Power Added Efficiency
PAE
16.7
18.2
—
%
Input Return Loss
Pout @ 1 dB Compression Point, CW
IRL
—
–12
–10
dB
P1dB
38.9
44.7
—
W
Load Mismatch (4) (In Freescale Characterization Test Fixture, 50 ohm system) IDQ1(A+B) = 80 mA, IDQ2(A+B) = 520 mA, f = 2140 MHz
No Device Degradation
VSWR 10:1 at 32 Vdc, 63 W CW Output Power
(3 dB Input Overdrive from 45 W CW Rated Power)
Typical Performance (4) (In Freescale Characterization Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1(A+B) = 80 mA, IDQ2(A+B) = 520 mA,
2110–2170 MHz Bandwidth
Pout @ 3 dB Compression Point, CW (5)
AM/PM
(Maximum value measured at the P3dB compression point across the
2110–2170 MHz frequency range.)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Quiescent Current Accuracy over Temperature (6)
with 4.7 k Gate Feed Resistors (–30 to 85C)
with 4.7 k Gate Feed Resistors (–30 to 85C)
Stage 1
Stage 2
P3dB
—
56
—
W

—
–6.8
—

VBWres
—
70
—
MHz
—
—
1.5
5.0
—
—
IQT
%
Gain Flatness in 60 MHz Bandwidth @ Pout = 5.3 W Avg.
GF
—
0.4
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.028
—
dB/C
P1dB
—
0.028
—
dB/C
Output Power Variation over Temperature
(–30C to +85C)
Table 6. Ordering Information
Device
A2I22D050NR1
A2I22D050GNR1
Tape and Reel Information
R1 Suffix = 500 Units, 44 mm Tape Width, 13--Reel
Package
TO--270WB--15
TO--270WBG--15
1. Each side of device measured separately.
2. Part internally input matched.
3. Measurements made with device in straight lead configuration before any lead forming operation is applied. Lead forming is used for gull wing
(GN) parts.
4. All data measured in fixture with device soldered to heatsink.
5. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where output
PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
6. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family, and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf.Select Documentation/Application Notes – AN1977 or AN1987.
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
3
C1
C9 C5
C3
C7
VDD1A
VDD2A
C13
VGG2A
R1
C25* C21* C23*
VGG1A
D59213
C11
C14
R2
C27*
C18
C17
Q1
C19
C29*
C20
C26*
C22* C24*
R4
R3
VGG1B
C28*
C15
C16
VGG2B
C6
VDD1B
C30*
A2I22D050N
Rev. 1
C12
C8
VDD2B
C10
C2
C4
*C21, C22, C23, C24, C25, C26, C27, C28, C29 and C30 are mounted vertically.
Note: All data measured in fixture with device soldered to heatsink. Production fixture does not include device soldered to
heatsink.
Figure 3. A2I22D050NR1 Characterization Test Circuit Component Layout — 2110–2170 MHz
Table 7. A2I22D050NR1 Characterization Test Circuit Component Designations and Values — 2110–2170 MHz
Part
Description
Part Number
Manufacturer
C1, C2, C3, C4
10 F Chip Capacitors
GRM55DR61H106KA88L
Murata
C5, C6
5.6 pF Chip Capacitors
ATC600F5R6BT250XT
ATC
C7, C8
6.2 pF Chip Capacitors
ATC600F6R2BT250XT
ATC
C9, C10
1 F Chip Capacitors
GRM31MR71H105KA88L
Murata
C11, C12, C13, C14, C15, C16
4.7 F Chip Capacitors
GRM31CR71H475KA12L
Murata
C17, C18, C19, C20
33 pF Chip Capacitors
ATC600F330JT250XT
ATC
C21, C22
0.3 pF Chip Capacitors
ATC600F0R3BT250XT
ATC
C23, C24, C25, C26, C27, C28
0.2 pF Chip Capacitors
ATC600F0R2BT250XT
ATC
C29, C30
1.1 pF Chip Capacitors
ATC600F1R1BT250XT
ATC
Q1
RF LDMOS Power Amplifier
A2I22D050NR1
Freescale
R1, R2, R3, R4
4.7 k, 1/4 W Chip Resistors
CRCW12064K70FKEA
Vishay
PCB
Rogers RO4350B, 0.020, r = 3.66
D59213
MTL
A2I22D050NR1 A2I22D050GNR1
4
RF Device Data
Freescale Semiconductor, Inc.
32.8
32.6
17.6
3.84 MHz Channel Bandwidth
Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF
PAE
33
17.8
17.4
PARC
32.4
IRL
Gps
32.2
–45
–12
–46
–48
ACPR
2080
–11
–47
32
31.8
2060
–44
2100
2120
2140
2160
2180
2200
–13
–14
–15
–16
–49
2220
–0.1
–0.2
–0.3
–0.4
–0.5
PARC (dB)
33.2
18
ACPR (dBc)
Gps, POWER GAIN (dB)
VDD = 28 Vdc, Pout = 5.3 W (Avg.)
33.6 I
DQ1(A+B) = 80 mA, IDQ2(A+B) = 520 mA
33.4 Single--Carrier W--CDMA
IRL, INPUT RETURN LOSS (dB)
18.2
33.8
PAE, POWER ADDED
EFFICIENCY (%)
TYPICAL CHARACTERISTICS — 2110–2170 MHz
–0.6
f, FREQUENCY (MHz)
IMD, INTERMODULATION DISTORTION (dBc)
Figure 4. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 5.3 Watts Avg.
–10
VDD = 28 Vdc, Pout = 17 W (PEP), IDQ1(A+B) = 80 mA
IDQ2(A+B) = 520 mA, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 2140 MHz
–20
–30
IM3–U
–40
IM5–U
–50
IM7–L
–60
–70
IM3–L
IM5–L
1
IM7–U
10
200
100
TWO–TONE SPACING (MHz)
32.5
0
32
31.5
31
30.5
30
VDD = 28 Vdc, IDQ1(A+B) = 80 mA, IDQ2(A+B) = 520 mA
f = 2140 MHz, Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth
ACPR
–1
PAE
–1 dB = 10 W
–2
–3
–5
Gps
–3 dB = 20.7 W
–4
6
11
40
16
21
20
10
Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF
1
50
30
–2 dB = 15.4 W
PARC
26
–20
60
0
31
–25
–30
–35
ACPR (dBc)
1
PAE, POWER ADDED EFFICIENCY (%)
33
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 5. Intermodulation Distortion Products
versus Two--Tone Spacing
–40
–45
–50
Pout, OUTPUT POWER (WATTS)
Figure 6. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 2110–2170 MHz
31
30
2170 MHz 2140 MHz
30
2110 MHz
29
2170 MHz
28
0.1
20
ACPR
2140 MHz 2110 MHz
Gps
PAE
1
10
0
0
50
10
–10
–20
–30
–40
ACPR (dBc)
60
VDD = 28 Vdc, IDQ1(A+B) = 80 mA, IDQ2(A+B) = 520 mA
2170 MHz
Single--Carrier W--CDMA, 3.84 MHz Channel
33 Bandwidth, Input Signal PAR = 7.5 dB @ 0.01%
50
2140 MHz
Probability on CCDF
2110 MHz
40
32
PAE, POWER ADDED EFFICIENCY (%)
Gps, POWER GAIN (dB)
34
–50
–60
Pout, OUTPUT POWER (WATTS) AVG.
Figure 7. Single--Carrier W--CDMA Power Gain, Power
Added Efficiency and ACPR versus Output Power
40
0
–3
Gain
30
–6
25
–9
20
–12
VDD = 28 Vdc
Pin = 0 dBm
IDQ1(A+B) = 80 mA
IDQ2(A+B) = 520 mA
IRL
15
10
1450
IRL (dB)
GAIN (dB)
35
1700
1950
2200
2450
2700
–15
–18
2950
f, FREQUENCY (MHz)
Figure 8. Broadband Frequency Response
A2I22D050NR1 A2I22D050GNR1
6
RF Device Data
Freescale Semiconductor, Inc.
Table 8. Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ1A = 40 mA, IDQ2A = 260 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(1)
Gain (dB)
(dBm)
(W)
PAE
(%)
AM/PM
()
2110
77.6 + j58.1
70.6 – j50.0
4.21 – j13.5
30.5
46.1
41
51.7
–3
2140
68.5 + j56.2
62.8 – j47.2
4.07 – j13.4
30.7
46.0
40
51.1
–4
2170
60.3 + j50.1
57.8 – j44.5
4.33 – j14.2
30.8
46.2
41
50.9
–4
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
PAE
(%)
AM/PM
()
2110
77.6 + j58.1
67.2 – j49.6
4.06 – j13.5
28.4
46.8
47
52.1
–6
2140
68.5 + j56.2
59.3 – j45.8
4.07 – j13.7
28.5
46.7
47
51.0
–8
2170
60.3 + j50.1
55.2 – j42.0
4.25 – j14.3
28.7
46.8
48
51.8
–10
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Note: Measurement made on a per side basis.
Table 9. Load Pull Performance — Maximum Power Added Efficiency Tuning
VDD = 28 Vdc, IDQ1A = 40 mA, IDQ2A = 260 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Power Added Efficiency
P1dB
Zload
()
(1)
Gain (dB)
(dBm)
(W)
PAE
(%)
AM/PM
()
6.03 – j9.55
32.3
44.4
28
60.2
–8
64.2 – j55.4
5.58 – j9.50
32.4
44.4
27
59.2
–8
58.6 – j53.6
5.05 – j9.53
32.9
44.4
27
59.5
–8
f
(MHz)
Zsource
()
Zin
()
2110
77.6 + j58.1
73.5 – j58.0
2140
68.5 + j56.2
2170
60.3 + j50.1
Max Power Added Efficiency
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(2)
Gain (dB)
(dBm)
(W)
PAE
(%)
AM/PM
()
2110
77.6 + j58.1
71.8 – j57.2
4.13 – j9.91
29.9
45.2
33
60.7
–13
2140
68.5 + j56.2
60.3 – j52.1
5.22 – j10.7
30.0
45.6
37
61.2
–10
2170
60.3 + j50.1
53.7 – j47.3
6.54 – j11.8
30.1
45.8
38
60.4
–8
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Note: Measurement made on a per side basis.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
7
P1dB – TYPICAL LOAD PULL CONTOURS — 2140 MHz
–6
–6
E
–10
42.5
42
43.5
43
46
–8
IMAGINARY ()
IMAGINARY ()
–8
44
–12
44.5
P 46
–14
45.5
–16
44
–18
2
3
4
5
6
58
–12
7
8
REAL ()
9
11
10
50
48
P
–14
–18
12
44
3
2
4
5
6
7
8
REAL ()
9
10
11
12
Figure 10. P1dB Load Pull Efficiency Contours (%)
–6
–6
33
–8
32.5
E
–10
–12
31.5
P
31
–16
29.5
2
3
4
5
7
6
REAL ()
8
9
10
11
12
Figure 11. P1dB Load Pull Gain Contours (dB)
NOTE:
–8
E
–10
–6
–12
–4
P
–14
–16
30.5
30
–10
–14
32
–14
–12
–18 –16
–8
IMAGINARY ()
IMAGINARY ()
52
54
–16
Figure 9. P1dB Load Pull Output Power Contours (dBm)
–18
56
46
45
44.5
E
–10
–18
2
3
4
5
6
7
8
REAL ()
9
10
11
12
Figure 12. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Power Added Efficiency
Gain
Power Added Efficiency
Linearity
Output Power
A2I22D050NR1 A2I22D050GNR1
8
RF Device Data
Freescale Semiconductor, Inc.
P3dB – TYPICAL LOAD PULL CONTOURS — 2140 MHz
–6
42.5
43.5
–8
44
–10
E
45
–12
IMAGINARY ()
IMAGINARY ()
–8
44.5
P
–14
46.5
–16
45
–18
–6
43
43
2
3
4
60
58
E
5
6
7
8
10
9
48
–18
12
11
Figure 13. P3dB Load Pull Output Power Contours (dBm)
46
2
3
4
5
6
7
8
REAL ()
9
10
11
12
Figure 14. P3dB Load Pull Efficiency Contours (%)
–6
–6
31
–8
E
IMAGINARY ()
–10
30
–12
29.5
P
–14
29
27.5
2
3
4
5
–18
–10
–10
E
–8
–12
–6
P
–14
–16
28
7
6
REAL ()
–12
–4
28.5
–16
–14
–16
–8
30.5
IMAGINARY ()
50
52
54
P
–14
REAL ()
–18
56
–12
–16
46
45.5
–10
8
9
10
11
12
Figure 15. P3dB Load Pull Gain Contours (dB)
NOTE:
–18
–2
2
3
4
5
6
7
8
REAL ()
9
10
11
12
Figure 16. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Power Added Efficiency
Gain
Power Added Efficiency
Linearity
Output Power
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
9
C1
C3
C5
C7
VDD1A
VDD2A
C11
R1
VGG1A
C21*
C19*
C27* C23*
D59213
C9
VGG2A
C12
R2
C15
R3
VGG1B
R4
C16
C26
C18
C28*
Q1
C17
C24*
C20*
C22*
C25
VGG2B
C13
C14
VDD1B
A2I22D050N
Rev. 1
C10
VDD2B
C8 C6
C4
C2
*C19, C20, C21, C22, C23, C24, C27 and C28 are mounted vertically.
Note: All data measured in fixture with device soldered to heatsink.
Figure 17. A2I22D050NR1 Test Circuit Component Layout — 1805–1880 MHz
Table 10. A2I22D050NR1 Test Circuit Component Designations and Values — 1805–1880 MHz
Part
Description
Part Number
Manufacturer
C1, C2, C3, C4
10 F Chip Capacitors
GRM55DR61H106KA88L
Murata
C5, C6
6.8 pF Chip Capacitors
ATC600F6R8BT250XT
ATC
C7, C8
1 F Chip Capacitors
GRM31MR71H105KA88L
Murata
C9, C10, C11, C12, C13, C14
4.7 F Chip Capacitors
GRM31CR71H475KA12L
Murata
C15, C16, C17, C18
47 pF Chip Capacitors
ATC600F470JT250XT
ATC
C19, C20
0.2 pF Chip Capacitors
ATC600F0R2BT250XT
ATC
C21, C22
0.3 pF Chip Capacitors
ATC600F0R3BT250XT
ATC
C23, C24
0.9 pF Chip Capacitors
ATC600F0R9BT250XT
ATC
C25, C26
0.1 pF Chip Capacitors
ATC600F0R1BT250XT
ATC
C27, C28
1.2 pF Chip Capacitors
ATC600F1R2BT250XT
ATC
Q1
RF LDMOS Power Amplifier
A2I22D050NR1
Freescale
R1, R2, R3, R4
4.7 k Chip Resistors
CRCW12064K70FKEA
Vishay
PCB
Rogers RO4350B, 0.020, r = 3.66
D59213
MTL
A2I22D050NR1 A2I22D050GNR1
10
RF Device Data
Freescale Semiconductor, Inc.
32
31.8
31.6
31.4
IRL
31.2
–48
31
30.8
–50
ACPR
–52
PARC
30.6
1760
1780
1800
1820
1840
1860
1880
1900
–4
–6
–8
–10
–12
–14
–54
1920
0.15
0.1
0.05
0
–0.05
PARC (dB)
Gps, POWER GAIN (dB)
32.2
IRL, INPUT RETURN LOSS (dB)
32.4
ACPR (dBc)
18.6
VDD = 28 Vdc, Pout = 5.3 W (Avg.), IDQ1(A+B) = 70 mA
IDQ2(A+B) = 470 mA, Single--Carrier W--CDMA 18.4
3.84 MHz Channel Bandwidth
18.2
Input Signal PAR = 7.5 dB @
18
0.01% Probability on CCDF
17.8
PAE
–44
Gps
–46
32.6
PAE, POWER ADDED
EFFICIENCY (%)
TYPICAL CHARACTERISTICS — 1805–1880 MHz
–0.1
f, FREQUENCY (MHz)
Figure 18. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 5.3 Watts Avg.
1805 MHz
31
30
29
28
1840 MHz
50
40
1805 MHz
Gps
1880 MHz
60
1880 MHz
1840 MHz
30
3.84 MHz Channel Bandwidth, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCDF
20
ACPR
PAE
27
0.1
1805 MHz
10
1
10
1880 MHz
1840 MHz
0
0
–10
–20
–30
–40
ACPR (dBc)
Gps, POWER GAIN (dB)
32
VDD = 28 Vdc, IDQ1(A+B) = 70 mA
IDQ2(A+B) = 470 mA, Single--Carrier W--CDMA
PAE, POWER ADDED EFFICIENCY (%)
33
–50
–60
50
Pout, OUTPUT POWER (WATTS) AVG.
Figure 19. Single--Carrier W--CDMA Power Gain, Power
Added Efficiency and ACPR versus Output Power
33
–2
–4
32
31
–6
30
–8
–10
29
VDD = 28 Vdc
Pin = 0 dBm
IDQ1(A+B) = 70 mA
IDQ2(A+B) = 470 mA
IRL
28
27
1650
IRL (dB)
GAIN (dB)
Gain
1750
1850
1950
2050
2150
–12
–14
2250
f, FREQUENCY (MHz)
Figure 20. Broadband Frequency Response
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
11
Table 11. Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQ1A = 40 mA, IDQ2A = 260 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
Zload
()
f
(MHz)
Zsource
()
Zin
()
1805
69.9 – j34.3
69.7 + j22.8
1840
81.4 – j33.3
82.7 + j22.2
1880
109.0 – j26.4
101.0 + j12.4
(1)
Gain (dB)
(dBm)
(W)
PAE
(%)
AM/PM
()
6.16 – j13.2
32.2
46.0
40
55.3
–5
6.22 – j12.4
32.2
46.0
40
56.0
–3
5.84 – j12.6
31.6
46.1
40
56.3
–1
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
PAE
(%)
AM/PM
()
1805
69.9 – j34.3
72.0 + j22.0
5.85 – j13.2
30.0
47.0
50
58.7
–7
1840
81.4 – j33.3
84.7 + j19.7
5.75 – j12.5
30.0
46.9
49
58.0
–4
1880
109.0 – j26.4
101.0 + j9.08
5.39 – j12.6
29.4
46.9
49
57.4
–3
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Note: Measurement made on a per side basis.
Table 12. Load Pull Performance — Maximum Power Added Efficiency Tuning
VDD = 28 Vdc, IDQ1A = 40 mA, IDQ2A = 260 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Power Added Efficiency
P1dB
Zload
()
(1)
Gain (dB)
(dBm)
(W)
PAE
(%)
AM/PM
()
12.0 – j12.8
33.9
44.6
29
62.2
–6
86.2 + j28.8
10.6 – j11.9
33.3
44.8
31
62.3
–5
108.0 + j18.3
10.2 – j10.9
32.8
44.7
30
62.1
–5
f
(MHz)
Zsource
()
Zin
()
1805
69.9 – j34.3
68.6 + j30.8
1840
81.4 – j33.3
1880
109.0 – j26.4
Max Power Added Efficiency
P3dB
Zload
()
f
(MHz)
Zsource
()
Zin
()
1805
69.9 – j34.3
71.2 + j25.7
1840
81.4 – j33.3
88.8 + j27.6
1880
109.0 – j26.4
106.0 + j13.6
(2)
Gain (dB)
(dBm)
(W)
PAE
(%)
AM/PM
()
8.55 – j12.8
31.1
46.5
44
68.6
–7
11.6 – j11.7
31.5
45.4
34
65.5
–7
8.68 – j11.3
30.5
45.9
39
65.6
–6
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Note: Measurement made on a per side basis.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2I22D050NR1 A2I22D050GNR1
12
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL LOAD PULL CONTOURS — 1840 MHz
–6
–6
43.5
43
–10
44
–12
E
P
45.5
44.5
–14
45
–16
44
42.5
43.5
42
43
–12
–20
–20
6
12
10
REAL ()
8
14
16
18
20
46
56
50
48
4
2
6
52
8
–12
–14
31
–16
4
33
32.5
6
14
16
18
20
–8
–6
–12
E
P
–14
–4
–16
31.5
–18
2
33.5
32
30.5
IMAGINARY ()
–14
E
P
10
12
REAL ()
–10
–10
30
54
–8
–10
–20
58
–6
34
–12
60
Figure 22. P1dB Load Pull Efficiency Contours (%)
–6
–8
62
–14
–18
4
E
P
–16
Figure 21. P1dB Load Pull Output Power Contours (dBm)
IMAGINARY ()
–10
–18
2
56
–8
IMAGINARY ()
IMAGINARY ()
–8
–18
8
10
12
REAL ()
14
16
18
20
Figure 23. P1dB Load Pull Gain Contours (dB)
NOTE:
–20
2
4
6
8
10
12
REAL ()
14
16
18
20
Figure 24. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Power Added Efficiency
Gain
Power Added Efficiency
Linearity
Output Power
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
13
P3dB – TYPICAL LOAD PULL CONTOURS — 1840 MHz
–6
–8
44
–10
–12
E
P
45
–14
46.5
–16
46
44.5
44
43.5
45.5
43
2
4
6
12
10
REAL ()
8
E
P
–14
14
16
18
–20
20
64
62
54
50 52
–6
32
–8
4
2
6
56
8
60
58
10
12
REAL ()
14
–18
31.5
–14
30.5
–16
28.5
28
4
31
6
8
10
12
REAL ()
14
16
18
20
Figure 27. P3dB Load Pull Gain Contours (dB)
NOTE:
–8
E
P
–14
–6
–4
–18
30
29
–12
–16
29.5
–18
2
IMAGINARY ()
P
20
–10
–10
E
18
–12
–14
–16
–8
–10
–12
16
Figure 26. P3dB Load Pull Efficiency Contours (%)
–6
IMAGINARY ()
–12
–18
Figure 25. P3dB Load Pull Output Power Contours (dBm)
–20
–10
–16
–18
–20
62
–8
IMAGINARY ()
IMAGINARY ()
–6
44.5
–20
–2
2
4
6
8
10
12
REAL ()
14
16
18
20
Figure 28. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Power Added Efficiency
Gain
Power Added Efficiency
Linearity
Output Power
A2I22D050NR1 A2I22D050GNR1
14
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
15
A2I22D050NR1 A2I22D050GNR1
16
RF Device Data
Freescale Semiconductor, Inc.
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
17
A2I22D050NR1 A2I22D050GNR1
18
RF Device Data
Freescale Semiconductor, Inc.
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
19
A2I22D050NR1 A2I22D050GNR1
20
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
 AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
 AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 .s2p File
Development Tools
 Printed Circuit Boards
For Software and Tools, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to
Software & Tools on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
Nov. 2014
 Initial release of data sheet
1
Mar. 2015
 Figs. 4, 6--7 and 18--19: changed drain efficiency to power added efficiency for plots and axes labels,
pp. 5--6, 11
 Tables 7--8 and 10--11: changed drain efficiency to power added efficiency, pp. 7, 12
A2I22D050NR1 A2I22D050GNR1
RF Device Data
Freescale Semiconductor, Inc.
21
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E 2014–2015 Freescale Semiconductor, Inc.
A2I22D050NR1 A2I22D050GNR1
Document Number: A2I22D050N
Rev. 1, 3/2015
22
RF Device Data
Freescale Semiconductor, Inc.
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