Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2T21H410--24S
Rev. 0, 2/2016
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 72 W asymmetrical Doherty RF power LDMOS transistor is designed
for cellular base station applications covering the frequency range of 2110 to
2170 MHz.
A2T21H410--24SR6
2100 MHz
 Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQA = 600 mA, VGSB = 0.4 Vdc, Pout = 72 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
ACPR
(dBc)
2110 MHz
15.7
49.1
7.9
–34.0
2140 MHz
15.7
49.0
7.8
–33.6
2170 MHz
15.6
48.9
7.6
–32.1
2110–2170 MHz, 72 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
Features
 Advanced High Performance In--Package Doherty
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Designed for Digital Predistortion Error Correction Systems
NI--1230S--4L2L
6 VBWA (1)
Carrier
RFinA/VGSA 1
5 RFoutA/VDSA
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB (1)
(Top View)
Figure 1. Pin Connections
1. Device cannot operate with VDD current
supplied through pin 3 and pin 6.
 Freescale Semiconductor, Inc., 2016. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2T21H410--24SR6
1
Table 1. Maximum Ratings
Rating
Symbol
Value
Unit
Drain--Source Voltage
VDSS
–0.5, +65
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +150
C
Operating Junction Temperature Range (1,2)
TJ
–40 to +225
C
CW
269
0.95
W
W/C
CW Operation @ TC = 25C
Derate above 25C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 73C, 72 W Avg., W--CDMA, 28 Vdc, IDQA = 600 mA, VGSB = 0.4 Vdc,
2140 MHz
Symbol
Value (2,3)
Unit
RJC
0.24
C/W
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 160 Adc)
VGS(th)
1.2
1.2
2.4
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, ID = 600 mAdc, Measured in Functional Test)
VGSA(Q)
2.3
2.6
3.1
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1.6 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 270 Adc)
VGS(th)
0.8
1.2
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 2.7 Adc)
VDS(on)
0.1
0.2
0.3
Vdc
Characteristic
Off Characteristics (4)
On Characteristics -- Side A, Carrier
On Characteristics -- Side B, Peaking
1.
2.
3.
4.
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.nxp.com/RF/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.
Each side of device measured separately.
(continued)
A2T21H410--24SR6
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
(1,2)
Functional Tests
(In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 600 mA, VGSB = 0.4 Vdc,
Pout = 72 W Avg., f = 2170 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF.
ACPR measured in 3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
14.8
15.6
17.8
dB
Drain Efficiency
D
44.0
48.9
—
%
PAR
6.8
7.6
—
dB
ACPR
—
–32.1
–28.5
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch
(2)
(In Freescale Doherty Test Fixture, 50 ohm system) IDQA = 600 mA, VGSB = 0.4 Vdc, f = 2140 MHz
VSWR 10:1 at 32 Vdc, 331 W CW (3) Output Power
(3 dB Input Overdrive from 316 W CW (3) Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 600 mA, VGSB = 0.4 Vdc,
2110–2170 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
316 (3)
—
W
Pout @ 3 dB Compression Point (4)
P3dB
—
447
—
W

—
–5.9
—

VBWres
—
90
—
MHz
Gain Flatness in 60 MHz Bandwidth @ Pout = 72 W Avg.
GF
—
0.3
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.006
—
dB/C
P1dB
—
0.008
—
dB/C
AM/PM
(Maximum value measured at the P3dB compression point across
the 2110–2170 MHz bandwidth)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C) (3)
Table 5. Ordering Information
Device
A2T21H410--24SR6
1.
2.
3.
4.
Tape and Reel Information
R6 Suffix = 150 Units, 56 mm Tape Width, 13--inch Reel
Package
NI--1230S--4L2L
Part internally matched both on input and output.
Measurements made with device in an asymmetrical Doherty configuration.
Exceeds recommended operating conditions. See CW operation data in Maximum Ratings table.
P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2T21H410--24SR6
RF Device Data
Freescale Semiconductor, Inc.
3
C21
VGGA
VDDA
R2
C1
--
C2
C10
R4
C12
C13
C14
D73331
C
C3
C15
C16
C23
C5
R1
C7
C6
A2T21H410--24S
Rev. 2
C8
CUT OUT AREA
C4
Z1
R5
P
C11
C18
C19
C17
C20
VDDB
R3
--
C22
C9
VGGB
Figure 2. A2T21H410--24SR6 Test Circuit Component Layout
Table 6. A2T21H410--24SR6 Production Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C9, C10, C11, C12, C20
10 F Chip Capacitors
C5750X7S2A106M230KB
TDK
C2, C8, C14, C19
9.1 pF Chip Capacitors
ATC100B9R1CT500XT
ATC
C3, C5, C17
9.1 pF Chip Capacitors
ATC600F9R1BT250XT
ATC
C4
1.1 pF Chip Capacitor
ATC600F1R1BT250XT
ATC
C6
0.5 pF Chip Capacitor
ATC600F0R5BT250XT
ATC
C7
0.7 pF Chip Capacitor
ATC600F0R7BT250XT
ATC
C13
0.8 pF Chip Capacitor
ATC100B0R8BT500XT
ATC
C15
4.7 pF Chip Capacitor
ATC600F4R7BT250XT
ATC
C16
0.3 pF Chip Capacitor
ATC100B0R3BT500XT
ATC
C18
0.7 pF Chip Capacitor
ATC600F0R7BT250XT
ATC
C21, C22
470 F, 63 V Electrolytic Capacitors
MCGPR63V477M13X26-RH
Multicomp
C23
0.6 pF Chip Capacitor
ATC600F0R6BT250XT
ATC
R1
50 , 10 W Chip Resistor
C10A50Z4
Anaren
R2, R3
5.6 k, 1/4 W Chip Resistors
CRCW12065K60FKEA
Vishay
R4, R5
6.2 , 1/4 W Chip Resistors
CRCW12066R20FKEA
Vishay
Z1
2000–2300 MHz Band, 90, 5 dB Directional Coupler
X3C21P1-05S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
D73331
MTL
A2T21H410--24SR6
4
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS — 2110–2170 MHz
15.8
50
49
D
15.6
48
Gps
15.4
47
–26
–2
–28
–2.1
14.4
–34
14.2
2060
–30
–32
ACPR
2080
2100
2120 2140 2160
f, FREQUENCY (MHz)
ACPR (dBc)
15.2 Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth, Input Signal PAR = 9.9 dB
15 @ 0.01% Probability on CCDF
14.8
PARC
14.6
2180
2200
–2.2
–2.3
–2.4
PARC (dB)
16
Gps, POWER GAIN (dB)
51
VDD = 28 Vdc, Pout = 72 W (Avg.), IDQA = 600 mA, VGSB = 0.4 Vdc
D, DRAIN
EFFICIENCY (%)
16.2
–2.5
–36
2220
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 72 Watts Avg.
0
VDD = 28 Vdc, Pout = 15 W (PEP), IDQA = 600 mA
VGSB = 0.4 Vdc, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 2140 MHz
–15
IM3--L
–30
IM5--L
–45
IM5--U
IM7--L
–60
–75
IM3--U
IM7--U
1
300
100
10
TWO--TONE SPACING (MHz)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
15.5
15
14.5
14
0
VDD = 28 Vdc, IDQA = 600 mA, VGSB = 0.4 Vdc
f = 2140 MHz, Single--Carrier W--CDMA
–26
52
–28
ACPR
–1 dB = 45 W
–1
54
D
50
–2 dB = 66 W
–2
Gps
–3
–4
–5
32
48
46
–3 dB = 88 W
PARC
3.84 MHz Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF
52
72
92
Pout, OUTPUT POWER (WATTS)
112
–30
–32
ACPR (dBc)
16
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
16.5
1
D DRAIN EFFICIENCY (%)
17
–34
44
–36
42
132
–38
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T21H410--24SR6
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS — 2110–2170 MHz
D
16
0
50
–10
40
2110 MHz
14
2140 MHz
2170 MHz
12 ACPR
10
8
60
2170 MHz
2110 MHz
2140 MHz
30
20
2170 MHz
2140 MHz
2110 MHz
Gps
0
500
100
10
Pout, OUTPUT POWER (WATTS) AVG.
1
10
–20
–30
–40
ACPR (dBc)
VDD = 28 Vdc, IDQA = 600 mA, VGSB = 0.4 Vdc
Single--Carrier W--CDMA, 3.84 MHz Channel
18 Bandwidth, Input Signal PAR = 9.9 dB @
0.01% Probability on CCDF
D, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
20
–50
–60
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
18
Gain
16
GAIN (dB)
14
12
10
VDD = 28 Vdc
Pin = 0 dBm
IDQA = 600 mA
VGSB = 0.4 Vdc
8
6
1800
1900
2000
2100
2200
2300
2400
2500
2600
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
A2T21H410--24SR6
6
RF Device Data
Freescale Semiconductor, Inc.
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQA = 793 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
3.30 – j6.14
3.02 + j4.76
1.35 – j4.14
18.6
52.7
186
56.7
–14
2140
4.34 – j6.54
3.93 + j4.80
1.37 – j4.16
18.6
52.4
175
54.5
–15
2170
5.86 – j6.79
5.32 + j4.64
1.38 – j3.97
19.0
52.5
176
55.9
–15
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
3.30 – j6.14
2.89 + j5.13
1.32 – j4.26
16.3
53.4
219
58.5
–16
2140
4.34 – j6.54
3.92 + j5.30
1.34 – j4.35
16.2
53.2
210
56.1
–17
2170
5.86 – j6.79
5.51 + j5.16
1.40 – j4.20
16.6
53.2
209
57.8
–18
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 8. Carrier Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQ = 793 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
3.30 – j6.14
3.88 + j5.00
2.93 – j3.33
21.6
50.8
121
67.6
–19
2140
4.34 – j6.54
4.86 + j4.65
2.71 – j3.46
21.1
50.9
124
64.7
–18
2170
5.86 – j6.79
6.35 + j3.90
2.65 – j3.16
21.4
50.7
118
64.9
–18
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.90 – j3.20
19.7
51.5
142
69.9
–25
4.77 + j5.24
2.71 – j3.36
19.3
51.6
146
66.5
–23
6.60 + j4.41
2.65 – j3.10
19.5
51.5
140
66.8
–24
f
(MHz)
Zsource
()
Zin
()
2110
3.30 – j6.14
3.64 + j5.34
2140
4.34 – j6.54
2170
5.86 – j6.79
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T21H410--24SR6
RF Device Data
Freescale Semiconductor, Inc.
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, VGSB = 0.4 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
2.03 – j5.13
1.94 + j5.32
1.29 – j4.13
15.1
55.2
328
55.2
–30
2140
2.71 – j5.57
2.54 + j5.76
1.32 – j4.16
15.1
55.0
319
53.8
–31
2170
3.89 – j5.89
3.46 + j6.28
1.33 – j4.13
15.1
55.0
318
54.1
–30
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
2.03 – j5.13
2.08 + j5.57
1.30 – j4.34
12.9
55.8
383
56.8
–36
2140
2.71 – j5.57
2.80 + j6.07
1.32 – j4.37
12.9
55.7
373
54.9
–37
2170
3.89 – j5.89
3.94 + j6.60
1.36 – j4.40
12.9
55.7
370
54.8
–36
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 10. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, VGSB = 0.4 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2110
2.03 – j5.13
1.76 + j5.34
3.16 – j3.47
16.4
53.5
222
65.5
–37
2140
2.71 – j5.57
2.31 + j5.81
2.90 – j3.41
16.4
53.6
227
63.6
–37
2170
3.89 – j5.89
3.16 + j6.35
2.92 – j3.19
16.2
53.4
219
63.2
–37
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2.55 – j4.11
14.1
54.8
302
64.4
–42
2.65 + j6.10
2.88 – j3.94
14.2
54.4
274
62.5
–43
3.74 + j6.66
2.86 – j3.80
14.0
54.4
277
62.7
–43
f
(MHz)
Zsource
()
Zin
()
2110
2.03 – j5.13
1.98 + j5.58
2140
2.71 – j5.57
2170
3.89 – j5.89
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T21H410--24SR6
8
RF Device Data
Freescale Semiconductor, Inc.
–1
–1
–1.5
–1.5
–2
–2
IMAGINARY ()
IMAGINARY ()
P1dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2140 MHz
–2.5
48.5
–3
E
–3.5
49
50
–4
P
51.5
–4.5
–5
49.5
51
50.5
2
–3
–5
5
4
–1.5
–2
–2
22.5
–2.5
IMAGINARY ()
IMAGINARY ()
–1.5
22
–3
–5
21.5
E
21
1
19
2
19.5
3
REAL ()
60
P
58
2
1
3
REAL ()
–26
–24
–2.5
–20
–18
E
–3.5
–16
–14
P
–4.5
20
5
4
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
5
4
–22
–3
–4
20.5
18.5
64
Figure 9. P1dB Load Pull Efficiency Contours (%)
–1
P
E
–3.5
–1
–4.5
62
–2.5
Figure 8. P1dB Load Pull Output Power Contours (dBm)
–4
60
–4.5
3
REAL ()
–3.5
54 56 58
48 52
–4
52
1
50
–5
–12
2
1
3
REAL ()
4
5
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H410--24SR6
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2140 MHz
–2
–2
50
–2.5
49.5
E
–3.5
–4
P
–4.5
53
–5
52.5
–5.5
–6
52
50
2
3
REAL ()
5
4
–2
–2.5
–2.5
20
19.5
19
18.5
P
–4.5
18
–5
–6
16
1
2
16.5
3
REAL ()
50
52
2
1
3
REAL ()
–26
–24
5
4
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
–22
E
–3.5
–20
–4
–18
P
–4.5
–16
–14
–5.5
17
5
4
–28
–5
17.5
–5.5
56
54
–3
IMAGINARY ()
IMAGINARY ()
–3
–4
58
Figure 13. P3dB Load Pull Efficiency Contours (%)
–2
E
60
P
–4.5
–6
Figure 12. P3dB Load Pull Output Power Contours (dBm)
–3.5
62
–4
–5.5
50.5
1
64
E
–3.5
–5
51
51.5
66
–3
IMAGINARY ()
IMAGINARY ()
–3
66
–2.5
–6
–12
2
1
3
REAL ()
4
5
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H410--24SR6
10
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2140 MHz
–2.5
–3
54
E
–3.5
–4
P 55
–4.5
–2.5
53
53.5
–3
IMAGINARY ()
–2
52.5
52
IMAGINARY ()
–2
54.5
–5
–6
2
1
3
REAL ()
60
–4.5
–6
5
4
58
56
48
50
2
1
54
52
52
3
REAL ()
4
5
Figure 17. P1dB Load Pull Efficiency Contours (%)
–2
–2
–2.5
IMAGINARY ()
–4
P
16
–4.5
15.5
–5
1
2
–36
–4
P
–34
–4.5
–32
3
REAL ()
–30
–5.5
15
14
5
4
Figure 18. P1dB Load Pull Gain Contours (dB)
NOTE:
–6
–38
E
–3.5
–5
14.5
–5.5
–40
–3
E
–3.5
–42
–2.5
16.5
–3
IMAGINARY ()
P
–5.5
Figure 16. P1dB Load Pull Output Power Contours (dBm)
–6
62
–4
–5
52
–5.5
E
–3.5
–28
2
1
3
REAL ()
4
5
Figure 19. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H410--24SR6
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2140 MHz
–2
–2
52 52.5
–2.5
53
53.5
52.5
–3
54
–3.5
IMAGINARY ()
IMAGINARY ()
–3
E
–4
P
–4.5
55.5
–5
55
54.5
–6
–6
3
REAL ()
5
4
58
46
56
48 50
2
1
54
52
3
REAL ()
5
4
Figure 21. P3dB Load Pull Efficiency Contours (%)
–2
–2
–2.5
–2.5
14.5
–3
–3.5
14
E
–4
IMAGINARY ()
–3
P
–4.5
13.5
–5
–46
E
–4
2
3
REAL ()
5
4
Figure 22. P3dB Load Pull Gain Contours (dB)
NOTE:
–6
–44
P
–4.5
–42
–40
–36
–34
–5.5
13
1
–48
–3.5
–5
12 12.5
–5.5
–6
60
P
–4.5
–5.5
2
62
E
–4
–5
Figure 20. P3dB Load Pull Output Power Contours (dBm)
IMAGINARY ()
–3.5
–5.5
1
46 48
–2.5
2
1
–38
3
REAL ()
4
5
Figure 23. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T21H410--24SR6
12
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2T21H410--24SR6
RF Device Data
Freescale Semiconductor, Inc.
13
A2T21H410--24SR6
14
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.nxp.com/RF
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Feb. 2016
Description
 Initial Release of Data Sheet
A2T21H410--24SR6
RF Device Data
Freescale Semiconductor, Inc.
15
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A2T21H410--24SR6
Document Number: A2T21H410--24S
Rev. 0, 2/2016
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RF Device Data
Freescale Semiconductor, Inc.
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