Data Sheet

Freescale Semiconductor
Technical Data
Document Number: A2T26H165--24S
Rev. 0, 12/2015
RF Power LDMOS Transistor
N--Channel Enhancement--Mode Lateral MOSFET
This 32 W asymmetrical Doherty RF power LDMOS transistor is designed for
cellular base station applications covering the frequency range of 2496 to
2690 MHz.
2600 MHz
 Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Vdc,
IDQA = 400 mA, VGSB = 0.7 Vdc, Pout = 32 W Avg., Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF.
Frequency
Gps
(dB)
D
(%)
Output PAR
(dB)
2496 MHz
14.7
45.4
7.8
–30.1
2590 MHz
15.0
45.1
8.1
–35.6
2690 MHz
15.0
45.6
7.5
–37.3
A2T26H165--24SR3
2496–2690 MHz, 32 W AVG., 28 V
AIRFAST RF POWER LDMOS
TRANSISTOR
ACPR
(dBc)
Features
NI--780S--4L2L
 Advanced High Performance In--Package Doherty
 Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
 Designed for Digital Predistortion Error Correction Systems
6 VBWA(1)
Carrier
RFinA/VGSA 1
5 RFoutA/VDSA
RFinB/VGSB 2
4 RFoutB/VDSB
Peaking
3 VBWB(1)
(Top View)
Figure 1. Pin Connections
1. Device cannot operate with VDD current
supplied through pin 3 and pin 6.
 Freescale Semiconductor, Inc., 2015. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
A2T26H165--24SR3
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
–0.5, +65
Vdc
Gate--Source Voltage
VGS
–6.0, +10
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
–65 to +150
C
Case Operating Temperature Range
TC
–40 to +150
C
(1,2)
TJ
–40 to +225
C
Characteristic
Symbol
Value (2,3)
Unit
RJC
0.45
C/W
Operating Junction Temperature Range
Table 2. Thermal Characteristics
Thermal Resistance, Junction to Case
Case Temperature 73C, 32 W Avg., W--CDMA, 28 Vdc, IDQA = 400 mA,
VGSB = 0.7 Vdc, 2590 MHz
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
2
Machine Model (per EIA/JESD22--A115)
B
Charge Device Model (per JESD22--C101)
IV
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
Adc
Zero Gate Voltage Drain Leakage Current
(VDS = 32 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
Adc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
Adc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 70 Adc)
VGS(th)
0.8
1.6
2.2
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, ID = 400 mAdc, Measured in Functional Test)
VGSA(Q)
2.2
2.5
3.0
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 700 mAdc)
VDS(on)
0.1
0.15
0.3
Vdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 120 Adc)
VGS(th)
0.8
1.6
1.6
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1200 mAdc)
VDS(on)
0.1
0.15
0.3
Vdc
Characteristic
Off Characteristics
(4)
On Characteristics -- Side A, Carrier
On Characteristics -- Side B, Peaking
1.
2.
3.
4.
Continuous use at maximum temperature will affect MTTF.
MTTF calculator available at http://www.freescale.com/rf/calculators.
Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf and search for AN1955.
Each side of device measured separately.
(continued)
A2T26H165--24SR3
2
RF Device Data
Freescale Semiconductor, Inc.
Table 4. Electrical Characteristics (TA = 25C unless otherwise noted) (continued)
Characteristic
Symbol
Min
Typ
Max
Unit
Functional Tests (1,2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 400 mA, VGSB = 0.7 Vdc, Pout = 32 W Avg.,
f = 2496 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured in
3.84 MHz Channel Bandwidth @ 5 MHz Offset.
Power Gain
Gps
14.0
14.7
17.0
dB
Drain Efficiency
D
42.0
45.4
—
%
PAR
7.2
7.8
—
dB
ACPR
—
–30.1
–27.0
dBc
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Load Mismatch (2) (In Freescale Doherty Test Fixture, 50 ohm system) IDQA = 400 mA, VGSB = 0.7 Vdc, f = 2590 MHz, 10 sec(on),
10% Duty Cycle
VSWR 10:1 at 32 Vdc, 209 W Pulsed CW Output Power
(3 dB Input Overdrive from 155 W Pulsed CW Rated Power)
No Device Degradation
Typical Performance (2) (In Freescale Doherty Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 400 mA, VGSB = 0.7 Vdc, 2496–2690 MHz
Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
141
—
W
(3)
P3dB
—
191
—
W
AM/PM
(Maximum value measured at the P3dB compression point across
the 2496–2690 MHz frequency range)

—
–28
—

VBWres
—
110
—
MHz
Gain Flatness in 194 MHz Bandwidth @ Pout = 32 W Avg.
GF
—
0.3
—
dB
Gain Variation over Temperature
(–30C to +85C)
G
—
0.01
—
dB/C
P1dB
—
0.007
—
dB/C
Pout @ 3 dB Compression Point
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Output Power Variation over Temperature
(–30C to +85C)
Table 5. Ordering Information
Device
A2T26H165--24SR3
Tape and Reel Information
R3 Suffix = 250 Units, 44 mm Tape Width, 13--inch Reel
Package
NI--780S--4L2L
1. Part internally matched both on input and output.
2. Measurements made with device in an asymmetrical Doherty configuration.
3. P3dB = Pavg + 7.0 dB where Pavg is the average output power measured using an unclipped W--CDMA single--carrier input signal where
output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.
A2T26H165--24SR3
RF Device Data
Freescale Semiconductor, Inc.
3
VDDA
VGGA
C22
C12
C2
C1
C13
C14
C3
C4
Z1
C9
C7
C8
C
C15
C17
C16
P
C18
R3
C19
C20
C10
C11
C21
VGGB
A2T26H165--24S
Rev. 3
D67245
C23
VDDB
C6
CUT OUT AREA
R2
C5
R1
Figure 2. A2T26H165--24SR3 Test Circuit Component Layout
Table 6. A2T26H165--24SR3 Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C10, C12, C14, C20,
C21
10 F Chip Capacitors
C5750X7S2A106M230KB
TDK
C2, C4, C9
7.5 pF Chip Capacitors
ATC600F7R5BT250XT
ATC
C3, C5
0.5 pF Chip Capacitors
ATC600F0R5BT250XT
ATC
C6
0.3 pF Chip Capacitor
ATC600F0R3BT250XT
ATC
C7
0.8 pF Chip Capacitor
ATC600F0R8BT250XT
ATC
C8
0.7 pF Chip Capacitor
ATC600F0R7BT250XT
ATC
C11, C13, C18, C19
8.2 pF Chip Capacitors
ATC600F8R2BT250XT
ATC
C15
5.6 pF Chip Capacitor
ATC600F5R6BT250XT
ATC
C16
0.9 pF Chip Capacitor
ATC600F0R9BT250XT
ATC
C17
0.2 pF Chip Capacitor
ATC600F0R2BT250XT
ATC
C22, C23
470 F, 63 V Electrolytic Capacitors
MCGPR63V470M
Multicomp
R1
50 , 10 W Termination
CW12010T0050GBK
ATC
R2, R3
6.2 , 1/4 W Chip Resistors
CRCW12066R20FKEA
Vishay
Z1
2300–2700 MHz Band, 90, 2 dB Hybrid Coupler
X3C25P1-02S
Anaren
PCB
Rogers RO4350B, 0.020, r = 3.66
D67245
MTL
A2T26H165--24SR3
4
RF Device Data
Freescale Semiconductor, Inc.
15.4
46.5
46
45.5
D
15.2
45
Gps
15
14.8
PARC
14.6
14.4
14
2480
2510
2540
–1
–30
–1.5
–32
–34
ACPR
14.2
–28
ACPR (dBc)
Gps, POWER GAIN (dB)
VDD = 28 Vdc, Pout = 32 W (Avg.), IDQA = 400 mA, VGSB = 0.7 Vdc
15.8 Single--Carrier
W--CDMA, 3.84 MHz Channel Bandwidth
15.6 Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF
–36
2570 2600 2630
f, FREQUENCY (MHz)
2660
2690
–2
–2.5
–3
PARC (dB)
47
16
D, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS
–3.5
–38
2720
IMD, INTERMODULATION DISTORTION (dBc)
Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression
(PARC) Broadband Performance @ Pout = 32 Watts Avg.
–10
VDD = 28 Vdc, Pout = 26 W (PEP), IDQA = 400 mA
VGSB = 0.7 Vdc, Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 2590 MHz
–20
IM3--U
–30
IM3--L
–40
IM5--L
IM5--U
–50
IM7--L
–60
IM7--U
1
10
300
100
TWO--TONE SPACING (MHz)
16
0
15.5
15
14.5
14
13.5
VDD = 28 Vdc, IDQA = 400 mA, VGSB = 0.7 Vdc
f = 2590 MHz, Single--Carrier W--CDMA
–1 dB = 24.07 W
ACPR
–1
–2
–2 dB = 33.58 W
D
–4
–5
10
–3 dB = 44.34 W
30
40
50
Pout, OUTPUT POWER (WATTS)
80
–30
70
50
PARC
3.84 MHz Channel Bandwidth, Input Signal
PAR = 9.9 dB @ 0.01% Probability on CCDF
20
–25
60
Gps
–3
90
60
–35
–40
ACPR (dBc)
1
D DRAIN EFFICIENCY (%)
16.5
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
Gps, POWER GAIN (dB)
Figure 4. Intermodulation Distortion Products
versus Two--Tone Spacing
–45
40
–50
30
70
–55
Figure 5. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
A2T26H165--24SR3
RF Device Data
Freescale Semiconductor, Inc.
5
TYPICAL CHARACTERISTICS
Gps, POWER GAIN (dB)
18
16
2590 MHz
Gps
14
2496 MHz
2690 MHz
2590 MHz
2690 MHz
12 ACPR
2496 MHz 2590 MHz
8
2690 MHz
50
–10
40
20
10
D
10
Pout, OUTPUT POWER (WATTS) AVG.
1
0
30
2496 MHz
10
60
0
100 200
–20
–30
–40
ACPR (dBc)
VDD = 28 Vdc, IDQA = 400 mA, VGSB = 0.7 Vdc
Single--Carrier W--CDMA, 3.84 MHz Channel
Bandwidth, Input Signal PAR = 9.9 dB @
0.01% Probability on CCDF
D, DRAIN EFFICIENCY (%)
20
–50
–60
Figure 6. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
20
18
GAIN (dB)
16
Gain
14
VDD = 28 Vdc
Pin = 0 dBm
IDQA = 400 mA
VGSB = 0.7 Vdc
12
10
8
2300
2400
2500
2600
2700
2800
2900
3000
3100
f, FREQUENCY (MHz)
Figure 7. Broadband Frequency Response
A2T26H165--24SR3
6
RF Device Data
Freescale Semiconductor, Inc.
Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, IDQA = 441 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
2496
2.52 – j13.3
2.69 + j12.3
2590
3.83 – j13.4
3.80 + j12.5
2690
6.63 – j12.9
6.03 + j11.8
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
4.68 – j10.6
16.8
49.0
80
54.5
–12
4.42 – j11.0
17.3
49.0
79
54.0
–12
4.49 – j12.1
17.3
49.0
80
54.7
–13
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
2.52 – j13.3
2.62 + j12.6
4.48 – j11.2
14.6
49.7
94
55.5
–15
2590
3.83 – j13.4
3.91 + j12.9
4.33 – j11.7
15.0
49.7
94
55.0
–15
2690
6.63 – j12.9
6.61 + j12.3
4.49 – j12.4
15.1
49.7
94
56.0
–16
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 8. Carrier Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, IDQA = 441 mA, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
2.52 – j13.3
2.86 + j12.5
11.2 – j8.23
19.9
47.1
51
65.5
–20
2590
3.83 – j13.4
4.00 + j12.5
8.89 – j6.75
20.4
47.1
51
65.7
–21
2690
6.63 – j12.9
6.11 + j11.6
7.24 – j7.37
20.3
47.2
52
65.4
–21
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
10.5 – j8.22
17.7
47.9
62
66.7
–26
4.07 + j12.9
8.73 – j7.25
18.2
47.9
62
66.8
–26
6.61 + j11.9
7.11 – j7.64
18.2
48.0
62
66.4
–27
f
(MHz)
Zsource
()
Zin
()
2496
2.52 – j13.3
2.75 + j12.7
2590
3.83 – j13.4
2690
6.63 – j12.9
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T26H165--24SR3
RF Device Data
Freescale Semiconductor, Inc.
7
Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning
VDD = 28 Vdc, VGSB = 0.6 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Output Power
P1dB
f
(MHz)
Zsource
()
Zin
()
2496
4.38 – j16.1
4.48 + j16.2
2590
9.10 – j16.7
8.22 + j16.7
2690
14.3 – j9.20
14.6 + j10.3
Zload
()
(1)
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
3.21 – j10.5
13.4
51.2
131
54.4
–29
2.85 – j10.4
13.4
51.1
129
52.0
–30
2.86 – j11.6
13.4
51.2
133
52.9
–30
Max Output Power
P3dB
f
(MHz)
Zsource
()
Zin
()
Zload (2)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
4.38 – j16.1
4.89 + j16.8
3.09 – j10.9
11.3
52.0
158
55.9
–35
2590
9.10 – j16.7
9.59 + j17.1
2.90 – j11.5
11.1
51.9
155
52.4
–35
2690
14.3 – j9.20
15.5 + j8.33
2.81 – j11.9
11.2
52.0
159
53.6
–35
(1) Load impedance for optimum P1dB power.
(2) Load impedance for optimum P3dB power.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Table 10. Peaking Side Load Pull Performance — Maximum Drain Efficiency Tuning
VDD = 28 Vdc, VGSB = 0.6 Vdc, Pulsed CW, 10 sec(on), 10% Duty Cycle
Max Drain Efficiency
P1dB
f
(MHz)
Zsource
()
Zin
()
Zload (1)
()
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
2496
4.38 – j16.1
4.03 + j16.3
7.25 – j9.48
14.5
49.7
94
62.3
–37
2590
9.10 – j16.7
7.54 + j17.0
6.65 – j9.17
14.4
49.8
95
61.3
–36
2690
14.3 – j9.20
14.3 + j12.1
5.07 – j8.46
14.5
49.7
94
62.5
–38
Max Drain Efficiency
P3dB
Gain (dB)
(dBm)
(W)
D
(%)
AM/PM
()
6.38 – j9.88
12.4
50.7
119
63.3
–43
8.95 + j17.5
6.25 – j9.36
12.4
50.6
116
62.4
–43
15.7 + j9.51
5.31 – j9.68
12.4
50.8
121
62.6
–42
f
(MHz)
Zsource
()
Zin
()
2496
4.38 – j16.1
4.51 + j16.8
2590
9.10 – j16.7
2690
14.3 – j9.20
Zload
()
(2)
(1) Load impedance for optimum P1dB efficiency.
(2) Load impedance for optimum P3dB efficiency.
Zsource = Measured impedance presented to the input of the device at the package reference plane.
Zin
= Impedance as measured from gate contact to ground.
Zload = Measured impedance presented to the output of the device at the package reference plane.
Input Load Pull
Tuner and Test
Circuit
Output Load Pull
Tuner and Test
Circuit
Device
Under
Test
Zsource Zin
Zload
A2T26H165--24SR3
8
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2590 MHz
–2
–2
45
–4
E
–8
–6
46
46.5
IMAGINARY ()
IMAGINARY ()
45.5
45
–6
47
–10
P
–12
47.5
48
48.5
–14
–18
0
2
8
6
REAL ()
4
10
12
P
–12
–18
14
60
58
50
0
2
4
52
56
54
10
8
6
REAL ()
12
14
Figure 9. P1dB Load Pull Efficiency Contours (%)
–2
–2
–4
–4
21
E
20.5
–8
20
–10
P
–12
19.5
19
–14
17.5
–16
17
0
2
4
8
6
REAL ()
–26
–6
IMAGINARY ()
–6
IMAGINARY ()
62
–10
–16
Figure 8. P1dB Load Pull Output Power Contours (dBm)
–18
E
–8
–14
–16
62
64
–4
–22
–20
E
–18
–8
–16
–10
P
–12
–14
–14
18.5
–24
–12
–16
18
10
12
14
Figure 10. P1dB Load Pull Gain Contours (dB)
NOTE:
–18
–10
0
2
4
8
6
REAL ()
10
12
14
Figure 11. P1dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T26H165--24SR3
RF Device Data
Freescale Semiconductor, Inc.
9
P3dB – TYPICAL CARRIER LOAD PULL CONTOURS — 2590 MHz
–2
–4
–4
46.5
45.5
–6
–6
E
–8
47
–10
P
–12
49.5
–14
49
0
2
8
6
REAL ()
4
47.5
10
12
60
58
56
52
50
0
2
4
10
8
6
REAL ()
54
12
14
Figure 13. P3dB Load Pull Efficiency Contours (%)
–2
–2
–4
–4
19
–6
18.5
E
–8
18
–10
17.5
P
–12
17
–14
15.5
–16
15
0
2
4
8
6
REAL ()
–30
–6
IMAGINARY ()
IMAGINARY ()
62
P
–12
–18
14
64
–10
–16
Figure 12. P3dB Load Pull Output Power Contours (dBm)
–18
66
E
–8
–14
48
48.5
–16
–18
IMAGINARY ()
IMAGINARY ()
–2
46
–10
–18
P
–12
–16
–14
16.5
–14
–16
16
10
12
14
Figure 14. P3dB Load Pull Gain Contours (dB)
NOTE:
–26
–24
–22
–20
E
–8
–18
–28
0
2
4
8
6
REAL ()
10
12
14
Figure 15. P3dB Load Pull AM/PM Contours ()
P
= Maximum Output Power
E
= Maximum Drain Efficiency
Gain
Drain Efficiency
Linearity
Output Power
A2T26H165--24SR3
10
RF Device Data
Freescale Semiconductor, Inc.
P1dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2590 MHz
–5
47.5
–6
–6
47
–7
49
48
–8
–9
E
–10
P
–11
–8
IMAGINARY ()
–7
IMAGINARY ()
–5
48.5
49.5
50.5
51
50
–12
–14
–15
–15
–16
–16
8
6
10
58
–12
–14
4
P
–11
–13
2
E
–10
–13
0
60
–9
56
54
46
2
0
4
52
50
48
8
6
10
REAL ()
REAL ()
Figure 16. P1dB Load Pull Output Power Contours (dBm)
Figure 17. P1dB Load Pull Efficiency Contours (%)
–5
–5
–6
–6
–7
–7
–8
–9
E
–10
P
–11
14
–12
–13
0
2
4
–10
P
–11
6
8
10
–36
–34
–12
–16
–32
–30
–28
–26
–15
12.5
–38
E
–14
13
12
–15
–9
–13
13.5
11 11.5
–14
–16
IMAGINARY ()
IMAGINARY ()
–8
–42
–40
2
0
4
6
8
REAL ()
REAL ()
Figure 18. P1dB Load Pull Gain Contours (dB)
Figure 19. P1dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
10
Gain
Drain Efficiency
Linearity
Output Power
A2T26H165--24SR3
RF Device Data
Freescale Semiconductor, Inc.
11
P3dB – TYPICAL PEAKING LOAD PULL CONTOURS — 2590 MHz
–5
48.5
–6
48
–8
IMAGINARY ()
–6
–7
49.5
–9
E
–10
–8
IMAGINARY ()
–7
–5
49
50
50.5
–11
51.5
P
–12
51
–13
–9
E
–10
62
60
–11
58
P
–12
56
–13
–14
54
–14
–15
–15
–16
–16
2
0
4
8
6
10
46
2
0
4
48
52
50
8
6
10
REAL ()
Figure 20. P3dB Load Pull Output Power Contours (dBm)
Figure 21. P3dB Load Pull Efficiency Contours (%)
–5
–5
–6
–6
–7
–7
–8
–8
–9
E
–10
–11
12
P
–12
–13
9.5
–14
10
0
2
–46
–9
–10
–42
–11
–40
P
–12
–38
–34
–15
6
8
10
–16
–44
E
–14
11
4
–48
–13
11.5
10.5
9
–15
–16
IMAGINARY ()
IMAGINARY ()
REAL ()
–36
–32
2
0
4
6
8
REAL ()
REAL ()
Figure 22. P3dB Load Pull Gain Contours (dB)
Figure 23. P3dB Load Pull AM/PM Contours ()
NOTE:
P
= Maximum Output Power
E
= Maximum Drain Efficiency
10
Gain
Drain Efficiency
Linearity
Output Power
A2T26H165--24SR3
12
RF Device Data
Freescale Semiconductor, Inc.
PACKAGE DIMENSIONS
A2T26H165--24SR3
RF Device Data
Freescale Semiconductor, Inc.
13
A2T26H165--24SR3
14
RF Device Data
Freescale Semiconductor, Inc.
PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS
Refer to the following resources to aid your design process.
Application Notes
 AN1955: Thermal Measurement Methodology of RF Power Amplifiers
Engineering Bulletins
 EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
 Electromigration MTTF Calculator
 RF High Power Model
 s2p File
Development Tools
 Printed Circuit Boards
To Download Resources Specific to a Given Part Number:
1. Go to http://www.freescale.com/rf
2. Search by part number
3. Click part number link
4. Choose the desired resource from the drop down menu
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
0
Dec. 2015
Description
 Initial Release of Data Sheet
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RF Device Data
Freescale Semiconductor, Inc.
15
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A2T26H165--24SR3
Document Number: A2T26H165--24S
Rev. 0, 12/2015
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RF Device Data
Freescale Semiconductor, Inc.
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