VISHAY SI3850ADV

Si3850ADV
Vishay Siliconix
Complementary MOSFET Half-Bridge (N- and P-Channel)
FEATURES
PRODUCT SUMMARY
VDS (V)
N-Channel
20
P-Channel
- 20
RDS(on) (Ω)
ID (A)
0.300 at VGS = 4.5 V
1.4
0.410 at VGS = 3.0 V
1.2
0.640 at VGS = - 4.5 V
- 0.96
0.980 at VGS = - 3.0 V
- 0.78
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• 100 % Rg Tested
• Compliant to RoHS Directive 2002/95/EC
S2
TSOP-6
Top View
G1
1
6
S1
D
2
5
D
G2
3
4
S2
G2
D
G1
Ordering Information: Si3850ADV-T1-E3 (Lead (Pb)-free)
Si3850ADV-T1-GE3 (Lead (Pb)-free and Halogen-free)
S1
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
N-Channel
Drain-Source Voltage
VDS
20
Gate-Source Voltage
VGS
Continuous Drain Current (TJ = 150 °C)
TA = 25 °C
TA = 70 °C
Pulsed Drain Current
Continuous Source Current (Diode Conduction)a
Maximum Power Dissipation
(Surface Mounted on FR4 Board)
TA = 25 °C
TA = 70 °C
Operating Junction and Storage Temperature Range
P-Channel
- 20
± 12
1.4
- 0.96
1.1
- 0.77
IDM
3.5
- 2.0
IS
0.9
ID
A
W
0.70
TJ, Tstg
V
- 0.9
1.08
PD
Unit
- 55 to 150
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient (Surface Mounted on FR4 Board, ± ≤ 10 s)
Symbol
N- or P-Channel
Unit
RthJA
115
°C/W
Note:
Maximum under Steady State condition is 150 °C/W.
Document Number: 73789
S09-2110-Rev. B, 12-Oct-09
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Si3850ADV
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Currentb
Drain-Source On-State Resistanceb
Forward Transconductanceb
Diode Forward Voltageb
VGS(th)
IGSS
IDSS
ID(on)
RDS(on)
gfs
VDS = VGS, ID = 250 µA
N-Ch
0.6
1.5
VDS = VGS, ID = - 250 µA
P-Ch
- 0.6
- 1.5
VDS = 0 V, VGS = ± 12 V
± 100
VDS = 20 V, VGS = 0 V
N-Ch
1
VDS = - 20 V, VGS = 0 V
P-Ch
-1
VDS = 20 V, VGS = 0 V, TJ = 70 °C
N-Ch
10
VDS = - 20 V, VGS = 0 V, TJ = 70 °C
P-Ch
VDS = 5 V, VGS = 4.5 V
N-Ch
3.0
VDS = - 5 V, VGS = - 4.5 V
P-Ch
- 1.5
VGS = 4.5 V, ID = 0.5 A
N-Ch
nA
µA
- 10
A
0.240
0.300
VGS = - 4.5 V, ID = - 0.5 A
P-Ch
0.510
0.640
VGS = 3.0 V, ID = 0.5 A
N-Ch
0.325
0.410
VGS = - 3.0 V, ID = - 0.5 A
P-Ch
0.780
0.980
VDS = 10 V, ID = 1 A
N-Ch
1.8
VDS = - 10 V, ID = - 1 A
P-Ch
1.1
IS = 0.9 A, VGS = 0 V
N-Ch
0.87
1.2
IS = - 0.8 A, VGS = 0 V
P-Ch
- 1.0
- 1.3
N-Ch
0.95
1.4
P-Ch
1.10
1.7
N-Ch
0.22
P-Ch
0.28
N-Ch
0.24
P-Ch
0.26
VSD
V
Ω
S
V
Dynamicb
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Body Diode Reverse Recovery Tme
Body Diode Reverse Recovery
Charge
Qg
N-Channel
VDS = 10 V, VGS = 4.5 V, ID = 1 A
Qgs
Qgd
P-Channel
VDS = - 10 V, VGS = - 4.5 V, ID = - 1 A
Rg
td(on)
tr
td(off)
tf
trr
Qrr
N-Channel
VDD = 10 V, RL = 10 Ω
ID ≅ 0.9 A, VGEN = 4.5 V, Rg = 1 Ω
nC
N-Ch
3.5
5.3
P-Ch
10.5
16
N-Ch
8
14
P-Ch
13
20
N-Ch
16
25
P-Ch
34
50
N-Ch
20
30
P-Ch
18
30
N-Ch
9
15
P-Ch
18
30
N-Ch
20
30
IF = - 0.9 A, dI/dt = 100 A/µs
P-Ch
25
40
IF = 0.9 A, dI/dt = 100 A/µs
N-Ch
9
15
IF = - 0.9 A, dI/dt = 100 A/µs
P-Ch
9
15
P-Channel
VDD = - 10 V, RL = 10 Ω
ID ≅ - 0.9 A, VGEN = - 4.5 V, Rg = 1 Ω
IF = 0.9 A, dI/dt = 100 A/µs
Ω
ns
nC
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 73789
S09-2110-Rev. B, 12-Oct-09
Si3850ADV
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
3.0
3.5
VGS = 5.0 V thru 4 V
3.0
- 55 °C
3V
2.5
2.0
I D - Drain Current (A)
I D - Drain Current (A)
2.4
2.5 V
1.5
1.0
25 °C
1.8
TC = 125 °C
1.2
0.6
0.5
2V
0.0
0.0
0.0
0.7
1.4
2.1
2.8
3.5
0
1
2
3
4
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
0.7
110
VGS = 2.5 V
88
0.5
C - Capacitance (pF)
R DS(on) - On-Resistance (Ω)
0.6
VGS = 3 V
0.4
VGS = 4.5 V
0.3
0.2
Ciss
66
Coss
44
22
Crss
0.1
0.0
0.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
12
16
ID - Drain Current (A)
VDS - Drain-to-Source Voltage (V)
Capacitance
20
1.8
ID = 1.2 A
ID = 1 A
1.6
8
VGS = 3 V
VDS = 5 V
VDS = 10 V
6
VGS = 15 V
4
2
1.4
(Normalized)
R DS(on) - On-Resistance
VGS - Gate-to-Source Voltage (V)
8
On-Resistance vs. Drain Current
10
0
0.0
4
VGS = 4.5 V
1.2
1.0
0.8
0.5
1.0
1.5
2.0
2.5
0.6
- 50
- 25
0
25
50
75
100
125
Qg - Total Gate Charge (nC)
TJ - Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
Document Number: 73789
S09-2110-Rev. B, 12-Oct-09
150
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Si3850ADV
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1.5
10
RDS(on) - On-Resistance (Ω)
I S - Source Current (A)
150 °C
1
25 °C
0.1
0.01
1.2
0.9
0.6
125 °C
0.3
25 °C
0.001
0.0
0.0
0.3
0.6
0.9
1.2
0
1.5
1
3
4
5
VGS - Gate-to-Source Voltage (V)
VSD - Source-to-Drain Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
Source-Drain Diode Forward Voltage
30
0.2
0.1
24
- 0.0
18
Power (W)
VGS(th) Variance (V)
2
- 0.1
ID = 5 mA
12
- 0.2
- 0.3
- 0.4
- 50
6
ID = 250 µA
- 25
0
25
50
75
100
125
0
0.001
150
0.01
0.1
TJ - Temperature (°C)
Time (s)
Threshold Voltage
Single Pulse Power
1
10
10
I D - Drain Current (A)
Limited by RDS(on)*
1 ms
1
10 ms
100 ms
0.1
1 s, 10 s
DC
TA = 25 °C
Single Pulse
BVDSS Limited
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area
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Document Number: 73789
S09-2110-Rev. B, 12-Oct-09
Si3850ADV
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
Notes:
0.1
PDM
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = RthJA = 100 °C/W
3. TJM - T A = PDMZthJA(t)
Single Pulse
0.01
10-4
10-3
4. Surface Mounted
10-2
10-1
1
10
100
1000
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
Document Number: 73789
S09-2110-Rev. B, 12-Oct-09
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Si3850ADV
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2.0
2.5
VGS = 5 V thru 4 V
- 55 °C
1.6
3.5 V
I D - Drain Current (A)
I D - Drain Current (A)
2.0
1.5
3V
1.0
2.5 V
25 °C
TC = 125 °C
1.2
0.8
0.4
0.5
2V
0.0
0.0
0.0
0.5
1.0
1.5
2.0
2.5
0
3.0
1
2
3
4
5
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
2.5
110
2.0
88
VGS = 2.5 V
C - Capacitance (pF)
RDS(on) - On-Resistance (Ω)
Ciss
VGS = 3 V
1.5
1.0
VGS = 4.5 V
0.5
66
Coss
44
Crss
22
0.0
0.0
0
0.5
1.0
1.5
2.0
2.5
0
4
ID - Drain Current (A)
8
16
20
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current
Capacitance
1.8
10
ID = 0.5 A
ID = 1 A
VDS = 5 V
1.6
8
R DS(on) - On-Resi stance
(Normalized)
VGS - Gate-to-Source Voltage (V)
12
VDS = 10 V
6
VGS = 15 V
4
2
0
0.0
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VGS = 3 V
1.4
VGS = 4.5 V
1.2
1.0
0.8
0.5
1.0
1.5
2.0
2.5
0.6
- 50
- 25
0
25
50
75
100
125
Qg - Total Gate Charge (nC)
TJ - Junction Temperature (°C)
Gate Charge
On-Resistance vs. Junction Temperature
150
Document Number: 73789
S09-2110-Rev. B, 12-Oct-09
Si3850ADV
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
3.0
10
R DS(on) - On-Resistance (Ω)
I S - Source Current (A)
TJ = 150 °C
1
25 °C
0.1
0.01
0.001
2.4
1.8
125 °C
1.2
25 °C
0.6
0.0
0.0
0.4
0.8
1.2
1.6
0
2.0
1
3
4
5
VGS - Gate-to-Source Voltage (V)
VSD - Source-to-Drain Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
Source-Drain Diode Forward Voltage
0.4
30
0.3
24
ID = 250 µA
0.2
Power (W)
VGS(th) Variance (V)
2
ID = 5 mA
0.1
18
12
0.0
6
- 0.1
- 0.2
- 50
0
- 25
0
25
50
75
100
125
150
0.001
0.01
TJ - Temperature (°C)
0.1
1
10
Time (s)
Threshold Voltage
Single Pulse Power vs. Junction-to-Ambient
10
I D - Drain Current (A)
Limited by RDS(on)*
1 ms
1
10 ms
100 ms
0.1
1 s, 10 s
DC
TA = 25 °C
Single Pulse
BVDSS Limited
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area
Document Number: 73789
S09-2110-Rev. B, 12-Oct-09
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Si3850ADV
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
Notes:
0.1
PDM
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = RthJA = 100 °C/W
3. TJM - TA = PDMZthJA(t)
Single Pulse
0.01
10-4
10-3
4. Surface Mounted
10-2
10-1
1
10
100
1000
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73789.
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Document Number: 73789
S09-2110-Rev. B, 12-Oct-09
Package Information
Vishay Siliconix
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
4
6
E1
1
2
5
4
E
E1
1
3
2
3
-B-
e
b
E
-B-
e
0.15 M C B A
5-LEAD TSOP
b
0.15 M C B A
6-LEAD TSOP
4x 1
-A-
D
0.17 Ref
c
R
R
A2 A
L2
Gauge Plane
Seating Plane
Seating Plane
0.08
C
L
A1
-C-
(L1)
4x 1
MILLIMETERS
Dim
A
A1
A2
b
c
D
E
E1
e
e1
L
L1
L2
R
Min
Nom
Max
Min
Nom
Max
0.91
-
1.10
0.036
-
0.043
0.01
-
0.10
0.0004
-
0.004
0.90
-
1.00
0.035
0.038
0.039
0.30
0.32
0.45
0.012
0.013
0.018
0.10
0.15
0.20
0.004
0.006
0.008
2.95
3.05
3.10
0.116
0.120
0.122
2.70
2.85
2.98
0.106
0.112
0.117
1.55
1.65
1.70
0.061
0.065
0.067
0.95 BSC
0.0374 BSC
1.80
1.90
2.00
0.071
0.075
0.079
0.32
-
0.50
0.012
-
0.020
0.60 Ref
0.024 Ref
0.25 BSC
0.010 BSC
0.10
-
-
0.004
-
-
0
4
8
0
4
8
7 Nom
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
Document Number: 71200
18-Dec-06
INCHES
7 Nom
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AN823
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
0.074
1.875
0.014
0.35
0.122
3.1
0.026
0.65
0.049
1.25
0.049
1.25
0.010
0.25
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
Ramp-Up Rate
+6_C/Second Maximum
Temperature @ 155 " 15_C
120 Seconds Maximum
Temperature Above 180_C
70 − 180 Seconds
Maximum Temperature
240 +5/−0_C
Time at Maximum Temperature
20 − 40 Seconds
Ramp-Down Rate
+6_C/Second Maximum
FIGURE 2. Solder Reflow Temperature Profile
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AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)
3-6_C/s (max)
217_C
140 − 170_C
60 s (max)
60-120 s (min)
Pre-Heating Zone
3_C/s (max)
Reflow Zone
Maximum peak temperature at 240_C is allowed.
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rqjf
30_C/W
On-Resistance vs. Junction Temperature
1.6
VGS = 4.5 V
ID = 6.1 A
1.4
rDS(on) − On-Resiistance
(Normalized)
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rqjc, or the
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
1.2
1.0
0.8
0.6
−50
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
−25
0
25
50
75
100
125
150
TJ − Junction Temperature (_C)
FIGURE 4. Si3434DV
In any design, one must take into account the change in
MOSFET rDS(on) with temperature (Figure 4).
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Document Number: 71743
27-Feb-04
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TSOP-6
0.099
0.039
0.020
0.019
(1.001)
(0.508)
(0.493)
0.064
(1.626)
0.028
(0.699)
(3.023)
0.119
(2.510)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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Document Number: 72610
Revision: 21-Jan-08
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Disclaimer
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to
obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 11-Mar-11
www.vishay.com
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