dm00266643

UM2019
User manual
STEVAL-IPM10F motor control power board based on the
SLLIMM™ 2nd series of IGBT IPMs
Introduction
The STEVAL-IPM10F is a compact motor drive power board based on SLLIMM™ (small low-loss
intelligent molded module) 2nd series (STGIF10CH60TS-L). It provides an affordable and easy-to-use
solution for driving high power motors for a wide range of applications such as power white goods, air
conditioning, compressors, power fans, high-end power tools and 3-phase inverters for motor drives in
general. The IPM itself consists of short-circuit rugged IGBTs and a wide range of features like
undervoltage lockout, smart shutdown, embedded temperature sensor and NTC, and overcurrent
protection.
The main characteristics of this evaluation board are small size, minimal BOM and high efficiency. It
consists of an interface circuit (BUS and VCC connectors), bootstrap capacitors, snubber capacitor,
hardware short-circuit protection, fault event and temperature monitoring. In order to increase the
flexibility, it is designed to work in single- or three-shunt configuration and with double current sensing
options such as using three dedicated onboard op-amps, or op-amps embedded in the MCU. The
Hall/Encoder part completes the circuit.
Thanks to these advanced characteristics, the system has been specifically designed to achieve fast
and accurate current feedback conditioning, satisfying the typical requirements for field-oriented control
(FOC).
The STEVAL-IPM10F is compatible with ST's STM32-based control board, enabling designers to build a
complete platform for motor control.
March 2016
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www.st.com
Key features
UM2019
Figure 1: SLLIMM 2nd series motor control internal demo board (top view)
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Contents
Contents
1
2
Key features ..................................................................................... 6
Schematic diagrams........................................................................ 7
3
Main characteristics ...................................................................... 12
4
Filters and key parameters ........................................................... 13
4.1
Input signals .................................................................................... 13
4.2
Bootstrap capacitor ......................................................................... 13
4.3
Overcurrent protection .................................................................... 14
4.3.1
SD Pin........................................................................................... 14
4.3.2
Fault management............................................................................ 14
4.3.3
Shunt resistor selection .................................................................... 17
4.3.4
RC filter ............................................................................................. 18
4.3.5
Single- or three-shunt selection ........................................................ 18
5
Current sensing amplifying network ............................................ 19
6
Temperature monitoring ............................................................... 21
6.1
Thermal sensor (VTSO) .................................................................. 21
6.2
NTC Thermistor............................................................................... 21
7
Firmware configuration for STM32 PMSM FOC SDK .................. 23
8
Connectors, jumpers and test pins .............................................. 24
9
10
Bill of materials .............................................................................. 27
PCB design guide .......................................................................... 30
10.1
Layout of reference board ............................................................... 30
11
Recommendations and suggestions ........................................... 32
12
General safety instructions .......................................................... 33
13
14
References ..................................................................................... 34
Revision history ............................................................................ 35
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List of tables
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List of tables
Table 1: Fault timing ................................................................................................................................. 14
Table 2: Shunt selection ........................................................................................................................... 17
Table 3: Op-amp sensing configuration .................................................................................................... 19
Table 4: Amplifying networks .................................................................................................................... 20
Table 5: ST motor control workbench GUI parameters ............................................................................ 23
Table 6: Connectors.................................................................................................................................. 24
Table 7: Jumpers ...................................................................................................................................... 25
Table 8: Test pins ..................................................................................................................................... 26
Table 9: Bill of materials............................................................................................................................ 27
Table 10: Document revision history ........................................................................................................ 35
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List of figures
List of figures
Figure 1: SLLIMM 2nd series motor control internal demo board (top view) .............................................. 2
Figure 2: SLLIMM 2nd series motor control internal demo board: (bottom view) ...................................... 6
Figure 3: STEVAL-IPM10F circuit schematic (1 of 5) ................................................................................. 7
Figure 4: STEVAL-IPM10F circuit schematic (2 of 5) ................................................................................. 8
Figure 5: STEVAL-IPM10F circuit schematic (3 of 5) ................................................................................. 9
Figure 6: STEVAL-IPM10F circuit schematic (4 of 5) ............................................................................... 10
Figure 7: STEVAL-IPM10F circuit schematic (5 of 5) ............................................................................... 11
Figure 8: STEVAL-IPM10F architecture ................................................................................................... 12
Figure 9: CBOOT graph selection ............................................................................................................ 13
Figure 10: SD failure due to overcurrent................................................................................................... 15
Figure 11: SD failure due to undervoltage (UVLO below 50 µs) .............................................................. 16
Figure 12: SD failure due to undervoltage (UVLO above 50 µs) .............................................................. 16
Figure 13: One-shunt configuration .......................................................................................................... 18
Figure 14: Three-shunt configuration ........................................................................................................ 18
Figure 15: Thermal sensor voltage vs temperature .................................................................................. 21
Figure 16: NTC voltage vs temperature.................................................................................................... 22
Figure 17: Silk screen and etch - top side ................................................................................................ 30
Figure 18: Silk screen and etch - bottom side .......................................................................................... 31
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Key features
1
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Key features












Input voltage: 125 - 400 VDC
Nominal power: up to 1000 W
Input auxiliary voltage: up to 20 V DC
Motor control connector (32 pins) interfacing with ST MCU boards
Single- or three-shunt resistors for current sensing (with sensing network)
Two options for current sensing: dedicated op-amps or through MCU
Overcurrent hardware protection
IPM temperature monitoring and protection
Hall sensors (3.3 / 5 V)/encoder inputs (3.3 / 5 V)
IGBT intelligent power module:

SLLIMM™ 2nd series IPM (STGIF10CH60TS-L - DBC package)
Universal conception for further evaluation with bread board and testing pins
Very compact size
Figure 2: SLLIMM 2nd series motor control internal demo board: (bottom view)
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Schematic diagrams
Following figures show the whole schematic of the SLLIMM™ 2nd series card for
STGIF10CH60TS-L IPM products. This card consists of an interface circuit (BUS and VCC
connectors), bootstrap capacitors, snubber capacitor, short-circuit protection, fault output
circuit, temperature monitoring, single-/three-shunt resistors and filters for input signals. It
also includes bypass capacitors for VCC and bootstrap capacitors. The capacitors are
located very close to the drive IC, which is very helpful in preventing malfunction due to
noise.
Two current sensing options are provided: three dedicated onboard op-amps or using
opamps embedded on the MCU. Selection is performed through three jumpers.
The Hall/Encoder part (powered at 5 V or 3.3 V) completes the circuit.
Figure 3: STEVAL-IPM10F circuit schematic (1 of 5)
+ C4
TSV994
14
U1 D
47u /35 V
GSPG2110151505SG
1.65V
3.3V
11
0
RC 8
0
RC 4
R6
1k0
0
C2
10 n
0
RC 3
RC 7
47u /35 V
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0
RC1 0
X
0
RC 9
0
RC 6
RC 5
0
M
0
0
RC 1
N
STEVAL-IPMnmx decoder
RC 2
R3
J1
2
1
INPU T-dc
+
C1
1000u /400 V
R4
7k5
R2
470 K
Input
R1
470 K
120 R
+Bus
3.3V
D1
BA T48 JFILM
Bu s_voltag e
+ C3
R5
1k0
12
13
-
+
4
DC_bus_ voltage
2
Schematic diagrams
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3
3
1
DocID028947 Rev 1
2
SW 4
Cu rren t_C
Cu rren t_A
M_pha se_ B
PW M_V ref
M_pha se_ A
+5V
NTC_b ypa ss_relay
EM_S TOP
PW M-A-H
PW M-A-L
PW M-B-H
PW M-B-L
PW M-C-H
PW M-C-L
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
J2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
Con trol Conne ctor
3
2
1
Motor Outpu t
J3
M_pha se_ C
3.3V
Bu s_voltag e
TSO
2
SW 3
phase_A
phase_B
phase_C
NTC
3
Cu rren t_C_a mp
E3
Cu rren t_B
1
2
SW 2
2
SW 1
1
Cu rren t_B_a mp
E2
3
Cu rren t_A_a mp
E1
Schematic diagrams
Figure 4: STEVAL-IPM10F circuit schematic (2 of 5)
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1
GSPG2110151515SG
R32
R30
DocID028947 Rev 1
R43
2k1
6
5
-
+
-
+
TSV994
7
U1B
3.3V
TSV994
1
U1A
4.7u 50V
1k
R31
1k
R41
100n
C23
E2
C31
330p
TP26
C25
330p
TP24
1k0
C27
100p
1k0
C26
10n
Current_C_amp
R37
R35
1.65V
Current_A_amp
R39
2k1
9
10
R34
2k1
-
+
TSV994
8
U1C
3.3V
1k
R36
C29
330p
TP25
Current_B_amp
1k0
C30
100p
1k0
2
3
11
R42
R40
R38
2k1
R33
2k1
R29
2k1
3.3V
4
E3
C28
10n
1k0
C24
100p
1k0
C22
10n
4
1.65V
E1
1.65V
+
C21
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Figure 5: STEVAL-IPM10F circuit schematic (3 of 5)
Schematic diagrams
GSPG2110151530SG
11
4
11
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PW M-B-H
PW M-B-L
Phase B - inpu t
R12
5k6
EM_STOP
1k0
1k0
R20 1k0
R19 1k0
C14
10p
C20
330p
R28
10k
3.3V
C15
10p
C11
10p
C18
10p
TP11
C10
10p
C17
10p
R15 1k0
R14 1k0
R9
R8
TP23
TP7
SD
C19
1n
3.3V
BAT48JF ILM
R23
C16
1nF
1k0
17
16
15
14
13
12
11
9
10
8
7
6
5
4
3
2
1
TP12
TP20
TP4
2.2u
C7
4.7u 50V
+ C12
TP3
2.2u
D6
TSO
TP17
TP14
TP5
TP8
TP15
C13
100 n
TP6
TP2
C6
2.2u
C5
TSO
GND b
CIN
SD
VCC L
LINw
LINv
LINu
GND a
VCC H
HINw
HINv
HINu
P
T2
T1
IPM modul e
BAT48JF ILM
D5
BAT48JF ILM
D4
BAT48JF ILM
D3
R24
1k0
R21 1k0
R18 1k0
NW
NV
NU
W
V
U
STGIF10CH60TS-L
VBOO Tw
VBOO Tv
VBOO Tu
NC
U2
18
19
20
21
22
23
24
25
26
TP1
TP19
TP18
TP16
TP13
TP10
TP9
NTC
C8
100 n
3.3V
R25
0.06
3_SHUNT
TP21
R22
3k3
R17
3k9
R16
3k3
R13
3k9
R11
3k3
R7
3k9
SW7
12k
R10
R26
0.06
1_SHUNT
SW5
1_SHUNT
SW 6
R27
0.06
E1
E2
E3
SW 8
pha se_C
pha se_B
pha se_A
+Bus
C9
0,1 uF - 400 V
3_SHUNT
TP22
PWM-C-H
PWM-C-L
Phase C - inpu t
J4
2
1
15V
D2
LED Red
PW M-A-H
PW M-A-L
Phase A - inpu t
Schematic diagrams
Figure 6: STEVAL-IPM10F circuit schematic (4 of 5)
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GSPG10 11150900SG
DocID028947 Rev 1
3
+5V
3.3V
1
2
3
4
5
1
2
3
4
5
1
2
SW9
2
SW16
Encoder/Hall
H1/A+
H2/B+
H3/Z+
+ 3.3/5V
GND
J5
C33
100n
C32
100n
3
+5V
3.3V
C34
100n
R49
SW12
R48
SW11
R47
SW10
2k4
2k4
2k4
C35
10p
R44
4k7
Hall/Encoder
C36
10p
R45
4k7
C37
10p
R46
4k7
R50
4k7
SW13
R51
4k7
SW14
R52
4k7
SW15
M_pha se_C
M_pha se_B
M_pha se_A
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Figure 7: STEVAL-IPM10F circuit schematic (5 of 5)
Schematic diagrams
GSPG2110151550SG
1
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Main characteristics
3
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Main characteristics
The board is designed to be compatible with DC supply from 125 VDC up to 400 VDC
voltage.
A bulk capacitor according to the power level of the application must be mounted. The
footprint is already provided on the board.
The SLLIMM integrates six IGBT switches with freewheeling diodes together with high
voltage gate drivers. Thanks to this integrated module, the system is specifically designed
to achieve power inversion in a reliable and compact design. Such integration reduces the
required PCB area and the simplicity of the design increases reliability.
In order to increase the flexibility, it can operate in single- or three-shunt configuration by
modifying solder bridge jumper settings (see Section 4.3.5: "Single- or three-shunt
selection").
Figure 8: STEVAL-IPM10F architecture
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Filters and key parameters
4
Filters and key parameters
4.1
Input signals
The input signals (LINx and HINx), able to drive the internal IGBTs, are active high. A 100
kΩ (typ.) pull-down resistor is built-in for each input signal. In order to prevent input signal
oscillation, an RC filter was added on each input and placed as close as possible to the
IPM. The filter is designed using a time constant of 10 ns (1 kΩ and 10 pF).
4.2
Bootstrap capacitor
In the 3-phase inverter, the emitters of the low side IGBTs are connected to the negative
DC bus (VDC-) as common reference ground, which allows all low side gate drivers to share
the same power supply, while the emitter of high side IGBTs is alternately connected to the
positive (VDC+) and negative (VDC-) DC bus during running conditions.
A bootstrap method is a simple and cheap solution to supply the high voltage section. This
function is normally accomplished by a high voltage fast recovery diode. The SLLIMM 2 nd
series family includes a patented integrated structure that replaces the external diode. It is
realized with a high voltage DMOS functioning as diode with series resistor. An internal
charge pump provides the DMOS driving voltage. The value of the C BOOT capacitor should
be calculated according to the application condition.
Figure 9: "CBOOT graph selection" shows the behavior of CBOOT (calculated) versus
switching frequency (fsw), with different values of ∆VCBOOT for a continuous sinusoidal
modulation and a duty cycle δ = 50%.
The boot capacitor must be two or three times larger than the CBOOT calculated in the
graph. For this design, a value of 2.2 µF was selected.
Figure 9: CBOOT graph selection
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Filters and key parameters
4.3
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Overcurrent protection
The SLLIMM 2nd series integrates a comparator for fault sensing purposes. The comparator
has an internal voltage reference VREF (510 mV typ.) connected to the inverting input, while
the non-inverting input available on the CIN pin can be connected to an external shunt
resistor to implement the overcurrent protection function. When the comparator triggers,
the device enters the shutdown state.
The comparator output is connected to the SD pin in order to send the fault message to
the MCU.
4.3.1
SD Pin
The SD is an input/output pin (open drain type if used as output). Taking into account the
voltage reference on SD (3.3 V), a pull up resistor of 10 kΩ (R23) is used to guarantee
the right bias and consequently to keep the current on the open drain DMOS (I od) lower
than 3 mA.
The filter on SD (R28 and C20) has to be sized to obtain the desired re-starting time
after a fault event and placed as close as possible to the SD pin.
A shutdown event can be managed by the MCU, in this case the SD functions as the
input pin.
Conversely, the SD functions as an output pin when an overcurrent or undervoltage
condition is detected.
4.3.2
Fault management
The SLLIMM 2nd series integrates a specific kind of fault management, useful when SD
is functioning as output, able to identify the type of fault event.
As previously described, as soon as a fault occurs, the open-drain (DMOS) is activated and
LVGx outputs are forced low.
Two types of fault can be signaled:


Overcurrent (OC) sensed by the internal comparator (CIN);
Undervoltage (UVLO) on supply voltage (VCC).
Each fault enables the SD open drain for a different time (see the table below).
The duration of a shutdown event therefore tells us the type of failure that has occurred.
Table 1: Fault timing
Symbol
Parameter
OC
Over current event
UVLO
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Undervoltage lockout
Event time
SD open-drain enable time
result
≤ 20 µs
20 µs
> 20 µs
OC time
≤ 50 µs
50 µs
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Filters and key parameters
Symbol
Parameter
Event time
SD open-drain enable time
result
event
> 50 µs until the
VCC_LS
exceed the VCC_LS
UV turn ON threshold
UVLO time
Figure 10: "SD failure due to overcurrent" shows a shutdown as the result of an overcurrent
event. During the overcurrent, the voltage on the comparator (CIN) exceeds the threshold
(0.51 V typ.) and the shutdown is able to stop the application. In this case, the SD event
time is about 20 µs (for OC event less than 20 µs).
Figure 10: SD failure due to overcurrent
Figure 11: "SD failure due to undervoltage (UVLO below 50 µs)" shows the shutdown event
as the result of an undervoltage condition on the VCC supply. If VCC drops below the
undervoltage threshold, the shutdown can stop the application. If the voltage on V CC rises
above the VCC on threshold in less than 50 µs, the SD event time is about 50 µs.
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Filters and key parameters
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Figure 11: SD failure due to undervoltage (UVLO below 50 µs)
Figure 12: "SD failure due to undervoltage (UVLO above 50 µs)" shows the shutdown
event as the result of an undervoltage condition on the VCC supply. In this case, the drop on
VCC is greater than 50 µs. The SD event time is the same as the duration of drop.
Figure 12: SD failure due to undervoltage (UVLO above 50 µs)
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4.3.3
Filters and key parameters
Shunt resistor selection
The value of the shunt resistor is calculated by the following equation:
Equation 1
 =


Where Vref is the internal comparator (CIN) (0.51 V typ.) and IOC is the overcurrent
threshold detection level.
The maximum OC protection level should be set to less than the pulsed collector current in
the datasheet. In this design, the overcurrent threshold level is fixed at 30% above the
nominal IPM current.
For STGIF10CH60TS-L, IOC is 13.3 A peak, therefore:
Equation 2
 =
+  0.51 + 0.3
=
= 0.06Ω

13.3
Where VF is the voltage drop across diodes D6, D7, D8.
For the power rating of the shunt resistor, the following parameters must be considered:




Maximum load current of inverter (85% of I nom [Arms]): Iload(max).
Shunt resistor value at TC = 25 °C.
Power derating ratio of shunt resistor at T SH =100 °C
Safety margin.
The power rating is calculated by following equation:
Equation 3
 =
2
∙  ∙ 
1 (max)
∙
2

In case of STGIF10CH60TS-L and RSH = 0.06 Ω:


Inom= 7 A ---> [] =

Power derating ratio of shunt resistor at T SH = 100 °C: 80% (from datasheet
manufacturer)
Safety margin: 30%

√2
---> (max) = 85%([] ) = 6.0
Equation 4
 =
1 6.02 ∙ 0.06 ∙ 1.3
∙
= 1.75
2
0.8
Considering available commercial values, a 5 W shunt resistor was selected.
Based on the previous equations and conditions, minimum shunt resistance and power
rating is summarized below.
Table 2: Shunt selection
Inom
Device
(peak)
[A]
STGIF10CH60TS-L
10
OCP(peak)
[A]
Iload(max)
[Arms]
13.3
6.0
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RSHUNT
[Ω]
0.06
Minimum shunt power
rating PSH [W]
1.75
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Filters and key parameters
4.3.4
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RC filter
An RC filter network is required to prevent undesired short circuit operation due to the
noise on the shunt resistor. In this design, the RC filter, composed of R23, R18, R21, R24
and C19, has a constant time of about 1.3 µs. Adding the turn-off propagation delay of the
gate driver and the IGBT turn-off time (hundreds of nanoseconds in total), the total delay
time is less than 5 µs of short circuit withstand IGBT time.
4.3.5
Single- or three-shunt selection
Single- or three-shunt resistor circuits can be adopted by setting the solder bridges SW5,
SW6, SW7 and SW8.
The figures below illustrate how to set up the two configurations.
Figure 13: One-shunt configuration
Figure 14: Three-shunt configuration
Further details regarding sensing configuration are provided in the next section.
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5
Current sensing amplifying network
Current sensing amplifying network
The STEVAL-IPM10F motor control demonstration board can be configured to run in threeshunt or single-shunt configurations for field oriented control (FOC).
The current can be sensed thanks to the shunt resistor and amplified by using the on board
operational amplifiers or by the MCU (if equipped with op-amp).
Once the shunt configuration is chosen by setting solder bridge on SW5, SW6, SW7 and
SW8 (as described in Section 4.3.5: "Single- or three-shunt selection"), the user can
choose to send the voltage shunt to the MCU amplified or unamplified.
Single-shunt configuration requires a single op amp and three-shunt configuration requires
three op amps; therefore, in single-shunt configuration, the only voltage which is sent to the
MCU to control the sensing is connected to phase V through SW2.
SW1, SW2, SW4 can select which signals are sent to micro, as described below:
Table 3: Op-amp sensing configuration
Symbol
Configuration
Bridge
Sensing
Single
Shunt
1-2
2-3
open
Three
Shunt
1-2
2-3
On-board op-amp
Single
Shunt
1-2
2-3
On board op-amp
Three
Shunt
1-2
2-3
On-board op-amp
Single
Shunt
1-2
2-3
open
Three
Shunt
1-2
2-3
On-board op-amp
open
SW1
MCU op-amp
MCU op-amp
SW2
MCU op-amp
open
SW4
MCU op-amp
The operational amplifier TSV994 used on amplifying networks has a 20 MHz gain
bandwidth and operates with a single positive supply of 3.3 V.
The amplification network must allow bidirectional current sensing, so that an output offset
VO = +1.65 V represents zero current.
Referencing the STGIF10CH60TS-L (IOCP = 10 A; RSHUNT = 0.06 Ω), the maximum
measurable phase current, considering that the output swings from +1.65 V to +3.3 V
(MCU supply voltage) for positive currents and from +1.65 V to 0 for negative currents is:
Equation 5
 =
 =
∆
= 13.3

∆
1.65
=
= 0.124Ω
 13.3
The overall trans-resistance of the two-port network is:
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Current sensing amplifying network
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 =  ∙  = 0.06 ∙  = 0.124Ω
 =


=
0.124
= 2.1
0.06
Finally choosing Ra=Rb and Rc=Rd, the differential gain of the circuit is:
 =

= 2.1

An amplification gain of 2.1 was chosen. The same amplification is obtained for all the
other devices, taking into account the OCP current and the shunt resistance, as described
in Table 2: "Shunt selection".
The RC filter for output amplification is designed to have a time constant that matches
noise parameters in the range of 1.5 µs:
4 ∙  = 4 ∙  ∙  = 1.5
 =
1.5µ
= 375(330)
4 ∙ 1000
Table 4: Amplifying networks
Phase
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Amplifying network
RC filter
Ra
Rb
Rc
Rd
Re
Cc
Phase U
R30
R32
R29
R33
R31
C25
Phase V
R35
R37
R34
R39
R36
C29
Phase W
R40
R42
R38
R43
R41
C31
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6
Temperature monitoring
Temperature monitoring
The SLLIMM 2nd series family integrates a temperature sensor (VTSO) on the low side gate
driver and a NTC thermistor placed close to the power stage. The board is designed to use
both of them which can be selected by using SW3 in order to monitor internal IPM
temperature through the MCU.
6.1
Thermal sensor (VTSO)
A voltage proportional to the temperature is available on the TSO pin (17) and easily
measurable on the TP20 test pin.
The thermal sensor does not need any pull down resistors.
To increase the noise immunity, a capacitor filter of 1 nF (C16) is placed on this pin.
The following graph shows the typical variation of the voltage as a function of temperature.
Figure 15: Thermal sensor voltage vs temperature
6.2
NTC Thermistor
The built-in thermistor (85 kΩ at 25 °C) is inside the IPM and connected between T1 and
T2 pins (26, 25).
A pull up resistor (R10) of 12 kΩ is used in order to guarantee an almost linear voltage
variation on the NTC as a function of temperature. This voltage can be easily detected on
TP1 test pin.
The figure below shows the typical voltage on T2 as function of temperature.
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Temperature monitoring
UM2019
Figure 16: NTC voltage vs temperature
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7
Firmware configuration for STM32 PMSM FOC
SDK
Firmware configuration for STM32 PMSM FOC SDK
The following table summarizes the parameters which customize the latest version of the
ST FW motor control library for permanent magnet synchronous motor (PMSM): STM32
PMSM FOC SDK for this STEVAL-IPM10F.
Table 5: ST motor control workbench GUI parameters
Block
Over current protection
Bus voltage sensing
Rated bus voltage info
Current sensing
Command stage
Parameter
Value
Comparator threshold
Vref + Vf = 0.81 V
Overcurrent network offset
0
Overcurrent network gain
0.1 V/A
Bus voltage divider
1/125
Min rated voltage
125 V
Max rated voltage
400 V
Nominal voltage
325 V
Current reading typology
Single- or three-shunt
Shunt resistor value
0.06 Ω
Amplifying network gain
2.1
Phase U Driver
HS and LS: Active high
Phase V Driver
HS and LS: Active high
Phase W Driver
HS and LS: Active high
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Connectors, jumpers and test pins
8
UM2019
Connectors, jumpers and test pins
Table 6: Connectors
Connector
Reference
Description / pinout
Motor control connector
J2
1 - emergency stop
3 - PWM-1H
5 - PWM-1L
7 - PWM-2H
9 - PWM-2L
11 - PWM-3H
13 - PWM-3L
15 - current phase A
17 - current phase B
19 - current phase C
21 - NTC bypass relay
23 - dissipative brake
PWM
25 - +V power
27- PFC sync.
29 - PWM VREF
31 - measure phase A
33 - measure phase B
Motor connector
J3



phase A
phase B
phase C
VCC supply (20 VDC max)
J4
24/36


positive
negative
DocID028947 Rev 1
2 - GND
4 - GND
6 - GND
8 - GND
10 - GND
12 - GND
14 - HV bus voltage
16 - GND
18 - GND
20 - GND
22 - GND
24 - GND
26 - heat sink
temperature
28 - VDD_m
30 - GND
32 - GND
34 - measure phase C
UM2019
Connectors, jumpers and test pins
Connector
Reference
Description / pinout
Supply connector (DC – 125V to 400 V)
1.
2.
J7
L - phase
N - neutral
Hall sensors / encoder input connector
1.
2.
3.
4.
5.
J9
Hall sensors input 1 / encoder A+
Hall sensors input 2 / encoder B+
Hall sensors input 3 / encoder Z+
3.3 or 5 Vdc
GND
Table 7: Jumpers
Jumper
Description
TSO/NTC
SW3
TSO: jumper on 1-2
NTC: jumper on 2-3
To choose current U to send to control board:
SW1
Jumper on 1-2: from amplification
Jumper on 2-3: directly from motor output
To choose current V to send to control board
SW2
Jumper on 1-2: from amplification
Jumper on 2-3: directly from motor output
To choose current W to send to control board:
SW4
Jumper on 1-2: from amplification
Jumper on 2-3: directly from motor output
SW13
To modify phase A hall sensor network
SW14
To modify phase B hall sensor network
SW15
To modify phase C hall sensor network
To choose input power for Hall/Encoder
SW9, SW16
Jumper on 1-2: 5 V
Jumper on 2-3: 3.3 V
SW5, SW6
SW7, SW8
To choose one-shunt or three-shunt configuration.
(Through solder bridge)
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Connectors, jumpers and test pins
Jumper
UM2019
Description
SW5, SW6 close
SW7, SW8 open
one shunt
SW5, SW6 open
SW7, SW8 close
three shunt
Table 8: Test pins
26/36
Test Pin
Description
TP1
NTC (T2 pin)
TP2
VBOOTw
TP3
VBOOTv
TP4
VBOOTu
TP5
HinU (high side U control signal input)
TP6
HinV (high side V control signal input)
TP7
HinW (high side W control signal input)
TP8
VCCH
TP9
phase A (U pin)
TP10
phase B (V pin)
TP11
Ground
TP12
LinU (high side U control signal input)
TP13
phase C (W pin)
TP14
LinV (high side V control signal input)
TP15
LinW (high side W control signal input)
TP16
Negative DC input for U phase
TP17
CIN
TP18
Negative DC input for V phase
TP19
Negative DC input for W phase
TP20
TSO (TSO pin)
TP21
Ground
TP22
Ground
TP23
SD (shutdown pin)
TP24
Current_A_amp
TP25
Current_B_amp
TP26
Current_C_amp
DocID028947 Rev 1
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9
Bill of materials
Bill of materials
The components used to build the demonstration board are listed below. The majority of
the active components used are available from STMicroelectronics.
Table 9: Bill of materials
Item
Qty
Reference
Value
Tol.
Voltage
Current
Watt
Package
Manuf.
1
4
C2,C22,C26,C2
8
10 nF
±10
50V
-
Capacitor,
SMD 1206
Any
10 pF
±10
100V
-
Capacitor,
SMD 1206
Any
C10,C11,C14,C
15,
2
9
3
4
C20,C25,C29,C
31
330 pF
±10
50V
-
Capacitor,
SMD 1206
Any
4
3
C5,C6,C7
2.2 uF
±10
25V
-
Capacitor,
SMD 1206
Any
5
6
C8,C13,C23,C3
2,
C33,C34
100 nF
±10
50V
-
Capacitor,
SMD 1206
Any
6
2
C12,C21
4.7 uF
±10
50V
-
Elyt.
capacitor,
4x4
Any
7
2
C19,C16
1 nF
±10
50V
-
Capacitor,
SMD 1206
Any
8
1
C9
0.1 uF
±10
630V
-
Capacitor,
SMD 1812
Any
9
3
C24,C27,C30
100 pF
±10
100V
-
Capacitor,
SMD 1206
Any
10
2
C3,C4
47 uF
±10
50V
-
Elyt.
capacitor,
4x4
Any
11
5
D1,D3,D4,D5
D6
Diode
BAT48J
-
-
-
Schottky
Diode,
SOD323
ST
12
1
D2
LED Red
-
-
-
LED 3 mm,
2 mA,
universal
Any
13
1
J2
Connector
-
-
-
Connector
34-pins
Any
14
1
J3
Connector
-
400V
-
Connector
- 7 mm - 3
pole
Any
15
1
J4
Connector
-
50V
-
Connector
- 5 mm - 2
pole
Any
C17,C18,C35,C
36,
C37
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Bill of materials
UM2019
Item
Qty
Reference
Value
Tol.
Voltage
Current
Watt
Package
Manuf.
16
1
J1
Connector
-
300V
-
Connector
- 7 mm - 2
pole
Any
17
1
J5
Connector
-
63V
-
Five pins
of pin
header
Any
18
2
R1,R2
470 kΩ
±1
400V
1/8
Resistor,
SMD 1206
Any
19
1
R4
7.5 kΩ
±1
400V
1/8
Capacitor,
SMD 1206
Any
20
1
R3
120 Ω
±1
400V
1/8
Resistor,
SMD 1206
Any
21
3
R7,R13,R17
3.9 kΩ
±1
25V
1/8
Resistor,
SMD 1206
Any
1 kΩ
±1
25V
1/8
Resistor,
SMD 1206
Any
R5,R6,R8,R9,
R14,R15,R19,R
20,
22
21
R23,R30,R32,R
31,
R18,R21,R24,R
36,
R35,R41,R42,R
40,
R37
28/36
23
3
R11,R16,R22
3.3 kΩ
±1
25V
1/8
Resistor,
SMD 1206
Any
24
1
R28
10 kΩ
±1
25V
1/8
Resistor,
SMD 1206
Any
25
1
R10
12 kΩ
±1
25V
1/8
Resistor,
SMD 1206
Any
26
6
R29,R33,R34,R
38,
R39,R43
2.1 kΩ
±1
25V
1/8
Resistor,
SMD 1206
Any
27
1
R12
5.6 kΩ
±1
25V
1/8
Resistor,
SMD 1206
Any
Vishay
WSL28
16R06
00FEH
Any
28
3
R25,R26,R27
0.06 Ω
-
-
-
Resistor,
SMD 2512
29
6
R44,R45,R46,R
50,
R51,R52
4.7 kΩ
±1
25V
1/8
Resistor,
SMD 1206
DocID028947 Rev 1
UM2019
Bill of materials
Item
Qty
Reference
Value
Tol.
Voltage
Current
Watt
Package
Manuf.
30
3
R47,R48,R49
2.4 kΩ
±1
25V
1/8
Resistor,
SMD 1206
Any
31
6
SW1,SW2,SW3,
SW4,
SW9,SW16
Jumper
2.54
-
-
-
Three pins
of pin
header
Any
32
6
SW10,SW11,S
W12,SW13,
SW14,SW15
Jumper
2.54
-
-
-
Two pins
of pin
header
Any
-
-
-
-
Any
33
12
-
2.54mm,lo
w
profile,con
nector
34
2
SW7,SW8
Solder
Bridge
-
-
-
-
NA
35
2
SW5,SW6
open
-
-
-
-
Any
PCB
terminal
1mm
-
-
-
Test pin
Any
TP1,TP2,TP3,T
P4,
TP5,TP6,
TP7,TP8,
TP9,TP10,TP11,
TP12,
36
26
TP13,TP14,TP1
5,TP16,
TP17,TP18,TP1
9,TP20,
TP21,TP22,TP2
3,TP24,
TP25,TP26
37
1
U1
TSV994
-
-
-
Op amp,
SO14
ST
38
1
U2
STGIF10C
H60TS-L
-
-
-
STGIF10C
H60TS-L
ST
39
3
RC2,RC5,RC9
0Ω
Any
Any
Any
Resistor,
SMD 0805
Any
40
7
RC1,RC3,RC4,
RC6,
RC7,RC8,RC10
not
assembled
not
assembled
Any
9
to close switch
for:
SW1, SW2,
SW3, SW4,
SW9, SW10,
SW11, SW12,
SW16
-
-
Any
41
not
assembled
-
DocID028947 Rev 1
-
-
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PCB design guide
10
UM2019
PCB design guide
Optimization of PCB layout for high voltage, high current and high switching frequency
applications is a critical point. PCB layout is a complex matter as it includes several
aspects, such as length and width of track and circuit areas, but also the proper routing of
the traces and the optimized reciprocal arrangement of the various system elements in the
PCB area.
A good layout can help the application to properly function and achieve expected
performance. On the other hand, a PCB without a careful layout can generate EMI issues,
provide overvoltage spikes due to parasitic inductance along the PCB traces and produce
higher power loss and even malfunction in the control and sensing stages.
In general, these conditions were applied during the design of the board:




10.1
PCB traces designed as short as possible and the area of the circuit (power or signal)
minimized to avoid the sensitivity of such structures to surrounding noise.
Good distance between switching lines with high voltage transitions and the signal line
sensitive to electrical noise.
The shunt resistors were placed as close as possible to the low side pins of the
SLLIMM. To decrease the parasitic inductance, a low inductance type resistor (SMD)
was used.
RC filters were placed as close as possible to the SLLIMM pins in order to increase
their efficiency.
Layout of reference board
All the components are inserted on the top of the board. Only the IPM module is inserted
on the bottom to allow the insertion of a suitable heatsink for the application.
Figure 17: Silk screen and etch - top side
30/36
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PCB design guide
Figure 18: Silk screen and etch - bottom side
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Recommendations and suggestions
11
Recommendations and suggestions


32/36
UM2019
The BOM list is not provided with a bulk capacitor already inserted in the PCB.
However, the necessary space has been included (C1) and therefore it is advisable to
use an appropriate bulk capacity to stabilize the bus supply voltage.
Similarly, the BOM list does not include the heat sink. It is possible put the heat sink,
above the IPM on the bottom of the PCB, with thermal conductive foil and screws. The
value of RTH has to be considered for good thermal performance; it depends on certain
factors such as current phase, switching frequency, power factor and ambient
temperature.
DocID028947 Rev 1
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12
General safety instructions
General safety instructions
Warning: the evaluation board works with high voltage which could be deadly for the
users. Furthermore all circuits on the board are not isolated from the line input. Due to the
high power density, the components on the board as well as the heat sink can be heated to
a very high temperature, which can cause a burning risk when touched directly. The users
should be engineers and technicians who are experienced in power electronics technology
and make sure that no danger or risk may occur while operating this board.
After the operation of the evaluation board, the bulk capacitor C1 (if used) may
still store a high energy for several minutes. So it must be first discharged before
any direct touching of the board.
In order to protect the bulk capacitor C1, it is strongly recommended for the users
to use an external brake chopper after C1 (to discharge the high brake current
back from the induction motor).
DocID028947 Rev 1
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References
13
UM2019
References
1.
2.
3.
4.
5.
34/36
STGIF10CH60TS-L datasheet
TSV994 datasheet
STTH15R06 datasheet
UM1052 user manual
AN 4076
DocID028947 Rev 1
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14
Revision history
Revision history
Table 10: Document revision history
Date
Version
Changes
01-Mar-2016
1
Initial release.
DocID028947 Rev 1
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UM2019
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
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