PIC10F200/202/204/206 PIC10F200/202/204/206 Rev. A Silicon/Data Sheet Errata The PIC10F200/202/204/206 parts you have received conform functionally to the Device Data Sheet (DS41239D), except for the anomalies described below. 3. Module: IPD, Power-Down Base current On the PIC10F200/202/204/206 silicon, revisions earlier than A3, the power-down base current may remain higher than the specification for a short time when entering Sleep. Microchip intends to address all issues listed here in future revisions of the PIC10F200/202/204/206 silicon. Where noted, issues apply to listed revision only. The following graph illustrates the device current upon entering Sleep: FIGURE 1: 1. Module: Port Pins On the PIC10F204/206 silicon, Rev. A0, the data direction control latch for port pin GP2 is overridden when the comparator output is used internally. This applies when the following bit configuration is used: T0CS = 1 OPTION<5> CMPT0CS = 0 CMCON0<4> COUTEN = 1 CMCON0<6> Work around This issue is fixed in Rev. A1 and later. 2. Module: Comparator On the PIC10F204/206 silicon, Rev. A0, the internal voltage reference is disabled when a SLEEP instruction is executed. IDD IPD Time Device enters Sleep Device current reaches IPD The length of time between the device entering Sleep mode and the device current reaching IPD increases as both temperature and voltage decrease. Work around This issue is fixed in Rev. A3 and later. Work around Do not issue a SLEEP instruction when using the internal 0.6V voltage reference. This issue is fixed in Rev. A1 and later. © 2007 Microchip Technology Inc. DS80194G-page 1 PIC10F200/202/204/206 4. Module: MPLAB® IDE, Revision 6.61 and Earlier The MPLAB IDE 6.61 does not look for or set the Configuration Word in the hex file at the conventional logical location of 0xFFF. Work around The CONFIG data must be assigned in two locations within the assembly code to ensure proper Configuration Word placement in the hex file. This is only required for MPLAB IDE version 6.61 and earlier. EXAMPLE 1: CODE Fixed Code org 0xYYYY data _CP_OFF & _WDT_ON & etc. __CONFIG _CP_OFF & _WDT_ON & etc. Re-locatable Code .config code 0xYYYY data data _CP_OFF & _WDT_ON & etc. __CONFIG data _CP_OFF & _WDT_ON & etc. TABLE 1: Note 1: CONFIGURATION WORD ADDRESS Device YYYY PIC10F200 01FF PIC10F202 03FF PIC10F204 01FF PIC10F206 03FF YYYY is the address of the Configuration Word for the part. DS80194G-page 2 © 2007 Microchip Technology Inc. PIC10F200/202/204/206 Clarifications/Corrections to the Data Sheet: In the Device Data Sheet (DS41239D), the following clarifications and corrections should be noted. 1. Module: Special Features of the CPU Register 9-1: Configuration Word, bit 11-5 and bit 1-0 should be (Read as ‘1’) as shown in bold. REGISTER 9-1: CONFIGURATION WORD FOR PIC10F200/202/204/206 — — — — — — — MCLRE CP WDTE — bit 11 — bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 11-5 Unimplemented: Read as ‘1’ bit 4 MCLRE: GP3/MCLR Pin Function Select bit 1 = GP3/MCLR pin function is MCLR 0 = GP3/MCLR pin function is digital I/O, MCLR internally tied to VDD bit 3 CP: Code Protection bit 1 = Code protection off 0 = Code protection on bit 2 WDTE: Watchdog Timer Enable bit 1 = WDT enabled 0 = WDT disabled bit 1-0 Reserved: Read as ‘1’ © 2007 Microchip Technology Inc. DS80194G-page 3 PIC10F200/202/204/206 APPENDIX A: REVISION HISTORY Rev A Document (6/2004) First revision of this document. Rev B Document (6/2004) Added Module 2, VREF is disabled in Sleep. Rev C Document (9/2004) Added Module 3, MPLAB IDE and the _CONFIG assembly directive. Rev D Document (6/2006) Added the following Modules to the “Clarifications/ Corrections to the Data Sheet” section: Module 1, “Internal Oscillator” Module 2, “Voltage Reference” Module 3, “8-Lead 2x3 DFN (MC) Packaging” Module 4, “8-Lead 2x3 DFN (MC) Package – Top Marking” • Module 5, “6-Lead SOT-23 (OT) Package – Top Marking” • • • • Rev E Document (3/2007) Revised Module 1 and Module 2 work arounds. Clarification/Corrections to the Data Sheet: Revised Module 3: Replaced DFN Package Drawing; Added Module 6, “Timer0 Clock”; Added Module 7, Special Features of the CPU, Register 9-1. Rev F Document (5/2007) Revised Module 3, Table 1, Note 1. Clarification/Corrections to the Data Sheet: Data Sheet was updated. The following was removed: Module 1, “Internal Oscillator” Module 2, “Voltage Reference” Module 3, “8-Lead 2x3 DFN (MC) Packaging” Module 4, “8-Lead 2x3 DFN (MC) Package – Top Marking” • Module 5, “6-Lead SOT-23 (OT) Package – Top Marking” • Module 6, “Timer0 Clock”; • • • • Module 7, Special Features of the CPU, Register 9-1 is renumbered to Module 1. Rev G Document (6/2007) Moved Module 3 to Module 4. Added Module 3: IPD, Power-Down Base current DS80194G-page 4 © 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2007 Microchip Technology Inc. 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