PIC12F510 Silicon Errata and Data Sheet Clarification

PIC12F510
PIC12F510
Silicon Errata and Data Sheet Clarification
The PIC12F510 device that you have received conform
functionally to the current Device Data Sheet
(DS41268D), except for the anomalies described in this
document.
The silicon/specification issues discussed in the
following pages are for all silicon revisions. If, however,
questions do arise concerning the silicon revision
received in a particular factory shipment, please
contact your local Microchip sales office for assistance.
Silicon Errata
None.
© 2009 Microchip Technology Inc.
DS80268F-page 1
PIC12F510
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS41268D). Changes described in Modules 1,
2, 3, and 4 below apply to the PIC12F510 only and not
to the PIC16F506, which is described in the same data
sheet (DS41268D):
Note:
Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
1. Module: Analog-to-Digital Converter
(ADC)
The specifications listed in Table 1 supersede
Table 13-3 in DS41268D. The PIC12F510 will
meet the performance specifications stated in
Table 1 below if the device is operated as
described in this Errata.
TABLE 1:
Param
No.
A/D CONVERTER CHARACTERISTICS
Sym.
Characteristic
Min.
Typ†
Max.
Units
Conditions
A03
EIL
Integral Error
—
—
±1.5
LSB
VDD = 5.0V
A04
EDL
Differential Error
—
—
-1 < EDL ≤ +1.5
LSB
VDD = 5.0V
A06
EOFF
Offset Error
—
—
±1.5
LSB
VDD = 5.0V
A07
EGN
Gain Error
—
—
±1.5
LSB
VDD = 5.0V
† Data in “Typ” column is at 5.0V 25°C unless otherwise stated. The typical parameters are for design
guidance only and are not tested.
Work around
Table 9-2 below should replace the current
Table 9-2 in the data sheet.
None.
2. Module: Analog-to-Digital Converter
(ADC)
Section 9.1 “Clock Divisors”, paragraph 1
should read as shown in bold.
The ADC has 4 clock source settings,
ADCS<1:0>. There are 3 divisor values, 16, 8 and
4. The fourth setting is INTOSC with a divisor of 4.
TAD FOR ADCs SETTINGS WITH VARIOUS OSCILLATORS(1)
TABLE 9-2:
Source
ADCS<1:0>
Divisor
8 MHz
4 MHz
1 MHz
500 kHz
350 kHz
200 kHz
100 kHz
32 kHz
INTOSC
11
4
.5 μs
1 μs
—
—
—
—
—
—
FOSC
10
4
.5 μs
1 μs
4 μs
8 μs
11 μs
20 μs
40 μs
125 μs(3)
FOSC
01
8
1 μs
2 μs
8 μs
16 μs
23 μs
40 μs
80 μs
250 μs
FOSC
00
16
2 μs(2)
4 μs(2)
16 μs
32 μs
46 μs
80 μs
160 μs
500 μs
Note 1:
2:
3:
Operation of the ADC module clock in any of the shaded regions shown in this table (Table 9-2) may result in linearity
errors exceeding the limits stated in Table 1 of this Errata.
If the internal oscillator is selected as the main clock source through the Configuration Word register, the divide-by-16
option for the ADC clock should be used.
Characterized but not tested.
Work around
DS80268F-page 2
None.
© 2009 Microchip Technology Inc.
PIC12F510
3. Module: Analog-to-Digital Converter
(ADC)
EXAMPLE 9-2:
Section 9.1.5 “Sleep”, bullets should read as
follows (changes in bold).
• For accurate conversions, TAD must meet the
following:
• 2 μs ≤ TAD < 125 μs
• TAD = 1/(FOSC/divisor)
MOVLW 0xF1
MOVWF ADCON0
BSF ADCON0, 1
BSF ADCON0, 2
loop0
Work around
None.
4. Module: Analog-to-Digital Converter
(ADC)
Examples 9-1 and 9-2 changes shown in bold
below.
EXAMPLE 9-1:
loop0
MOVLW 0xF1
;configure A/D
MOVWF ADCON0
BSF ADCON0, 1 ;start conversion
NOP
BTFSC ADCON0, 1;wait for ‘DONE’
GOTO loop0
MOVF ADRES, W ;read result
MOVWF result0 ;save result
BSF ADCON0, 2
loop1
loop2
loop1
PERFORMING AN
ANALOG-TO-DIGITAL
CONVERSION
;Sample code operates out of BANK0
;setup for read of
;channel 1
;start conversion
CHANNEL SELECTION
CHANGE DURING
CONVERSION
loop2
;configure A/D
;start conversion
;setup for read of
;channel 1
NOP
BTFSC ADCON0, 1;wait for ‘DONE’
GOTO loop0
MOVF ADRES, W ;read result
MOVWF result0 ;save result
BSF ADCON0, 1 ;start conversion
BSF ADCON0, 3 ;setup for read of
BCF ADCON0, 2 ;channel 2
NOP
BTFSC ADCON0, 1;wait for ‘DONE’
GOTO loop1
MOVF ADRES, W ;read result
MOVWF result1 ;save result
BSF ADCON0, 1 ;start conversion
NOP
BTFSC ADCON0, 1;wait for ‘DONE’
GOTO loop2
MOVF ADRES, W ;read result
MOVWF result2 ;save result
CLRF ADCON0
;optional: returns
;pins to Digital mode and turns off
;the ADC module
Work around
None.
BSF ADCON0, 1
NOP
BTFSC ADCON0, 1;wait for ‘DONE’
GOTO loop1
MOVF ADRES, W ;read result
MOVWF result1 ;save result
BSF ADCON0, 3 ;setup for read of
BCF ADCON0, 2 ;channel 2
BSF ADCON0, 1 ;start conversion
NOP
BTFSC ADCON0, 1;wait for ‘DONE’
GOTO loop2
MOVF ADRES, W ;read result
MOVWF result2 ;save result
© 2009 Microchip Technology Inc.
DS80268F-page 3
PIC12F510
5. Module: Analog-to-Digital Converter
(ADC)
The Reset value for the ADCON0 register is
updated for Resets other than Power-on Reset.
Changes to the tables affected are listed below, in
Table 10-3, and identified in bold and italic text.
TABLE 10-3:
RESET CONDITIONS FOR REGISTERS – PIC12F510
Register
Address
W
MCLR Reset, WDT Time-out,
Wake-up On Pin Change, Wake-up on
Comparator Change
Power-on Reset
—
qqqq qqqu(1)
qqqq qqqu(1)
INDF
00h
xxxx xxxx
uuuu uuuu
TMR0
01h
xxxx xxxx
uuuu uuuu
PCL
02h
1111 1111
1111 1111
STATUS
03h
0001 1xxx
qq0q quuu(2)
FSR
04h
110x xxxx
11uu uuuu
OSCCAL
05h
1111 111-
uuuu uuu-
GPIO
06h
--xx xxxx
--uu uuuu
CM1CON0
07h
1111 1111
uuuu uuuu
ADCON0
08h
1111 1100
1111 1100
ADRES
09h
xxxx xxxx
uuuu uuuu
OPTION
—
1111 1111
1111 1111
TRISIO
—
--11 1111
--11 1111
Legend:
Note 1:
2:
u = unchanged, x = unknown, – = unimplemented bit, read as ‘0’, q = value depends on condition.
Bits <7:1> of W register contain oscillator calibration values due to MOVLW XX instruction at top of memory.
See Table 10-5 for Reset value for specific conditions.
Work around
None.
6. Module: Electrical Characteristics
The min. and max. values in Table 13-1 for Internal
Voltage Reference (VIVRF) have been revised.
Changes to the table are listed below and
identified in bold and italic text.
TABLE 13-1:
COMPARATOR SPECIFICATIONS
Sym.
Characteristics
VOS
Input Offset Voltage
VCM
Input Common Mode Voltage
CMRR
TRT
VIVRF
*
Note 1:
Common Mode Rejection Ratio
Response Time(1)
Internal Voltage Reference
Min.
Typ.
Max.
Units
—
±3
±10
mV
0
—
VDD – 1.5
V
+55*
—
—
dB
—
150
400*
ns
0.500
0.6
0.700
V
Comments
(VDD - 1.5V)/2
Internal
These parameters are characterized but not tested.
Response time measured with one comparator input at (VDD – 1.5)/2, while the other input transitions
from VSS to VDD – 1.5V.
Work around
None.
DS80268F-page 4
© 2009 Microchip Technology Inc.
PIC12F510
7. Module: Electrical Characteristics
The max. values at 2V and 5V VDD for LP
Oscillator IDD at 125°C have been revised as
shown in Table 2 below.
TABLE 2:
LP OSCILLATOR 125°C IDD
Standard Operating Conditions (unless otherwise specified)
Operating Temperature -40°C ≤ TA ≤ +125°C (extended)
DC Characteristics
Param
No.
D010
Sym.
Characteristics
Supply Current(2,3)
IDD
Note 1:
Min.
Typ(1)
Max.
Units
Conditions
—
11
24
μA
FOSC = 32 kHz, VDD = 2.0V
—
38
110
μA
FOSC = 32 kHz, VDD = 5.0V
Data in the Typical (“Typ”) column is based on characterization results at 25°C. This data is for design
guidance only and is not tested.
The supply current is mainly a function of the operating voltage and frequency. Other factors such as bus
loading, oscillator type, bus rate, internal code execution pattern and temperature also have an impact on
the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VSS, T0CKI = VDD,
MCLR = VDD; WDT disabled unless noted otherwise.
2:
3:
Work around
None.
8. Module: Electrical Characteristics
The typ. value at 5V VDD and the max. values at
2V and 5V VDD for ICMP have been revised as
shown in Table 3 below.
TABLE 3:
ICMP
Standard Operating Conditions (unless otherwise specified)
Operating Temperature -40°C ≤ TA ≤ +85°C or -40°C ≤ TA ≤
+125°C
DC Characteristics
Param
No.
D023
Sym.
Characteristic
ICMP
Comparator Current(2)
Min.
—
—
Typ(1) Max.
15
60
26
76
Units
μA
μA
Conditions
VDD = 2.0V (per comparator)
VDD = 5.0V (per comparator)
Note 1: Data in the Typical (“Typ”) column is based on characterization results at 25°C. This data is for design
guidance only and is not tested.
2: For standby current measurements, the conditions are the same as IDD, except that the device is in Sleep
mode. If a module current is listed, the current is for that specific module enabled and the device in Sleep.
Work around
None.
© 2009 Microchip Technology Inc.
DS80268F-page 5
PIC12F510
APPENDIX A:
DOCUMENT
REVISION HISTORY
Rev A Document (03/2006)
First Revision – Module 1: Analog-to-Digital Converter.
Rev B Document (08/2006)
Clarifications/Corrections to the Data Sheet: Added
Module 1: Analog-to-Digital Converter: Correction to
Section 9.1 Clock Divisors, paragraph 1; Table 9-2, TAD
for ADCS.
Rev C Document (03/2008)
Updated Module 1 by removing 25°C from Conditions
and updated paragraph.
Clarifications/Corrections to the Data Sheet: Updated
Module 1: Analog-to Digital Converter by rewording
and adding Table 9-2 updates. Added Modules 2 and 3
(Analog-to Digital Converter).
Rev D Document (9/2008)
Removed Silicon from title; Renumbered Modules;
Updated Module 2 by adding Notes 2 and 3 to Table 92 and removed shading from 125 μs(3) under the 32
kHz column; Added Table 2 to Module 1.
Rev E Document (1/2009)
Added Module 5: Analog-to-Digital Converter: Updates
to Tables 10-3 and 10-4 (Reset Conditions); Added
Module 6: Electrical Characteristic: Updates to Table
13-1 Comparator Specifications.
Rev F Document(6/2009)
Updated errata with the new format. Removed part
number PIC16F506 from errata. See DS80475 for
PIC16F506 errata items.
Data Sheet Clarifications: Revised Module 1. Added
Modules 7 and 8. Other minor edits.
DS80268F-page 6
© 2009 Microchip Technology Inc.
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•
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•
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© 2009 Microchip Technology Inc.
DS80268F-page 7
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DS80268F-page 8
© 2009 Microchip Technology Inc.