VFJA100 Jitter Attenuator to 1GHz 25.4x22mm SMD, PECL/LVPECL Features RoHS Status 1.0 GHz output frequency range Ultra low jitter: <0.2ps Meets OC-192 jitter transfer, generation and tolerance Low power: <220mW typical Low profile SMD package Compliant with Telcordia GR-1244-CORE, GR-253-CORE, ITU-T G.813, and ITU-T G.8261 Applications Sonet / SDH / ATM 10 Gigabit Ethernet Forward Error Correction (FEC) Description The VFJA100 is a Jitter Attenuator capable of providing an output frequency up to 1GHz. An internal synthesizer locks to the input reference clock and multiplies it up to the desired output frequency. An internal voltage regulator offers improved stability and noise performance. The output is configured as a differential LVPECL signal and requires external termination resistors. The VFJA100 is available in a 25.4mm x 22mm surface mount package. Electrical Specifications Parameter Input Frequency Output Frequency Operating Temperature Range Output Supply Voltage Jitter SSB Phase Noise Notes: 1. 2. Symbol Condition Min Typ Max Unit Note Note 2 FREF 0.008 100 MHz FOUT 50 1000 MHz T 0 -40 70 +85 C Signal PECL / LVPECL 3.15 VCC 12kHz to 20MHz 100Hz 1kHz 10kHz 100kHz Order Code B Order Code G 3.30 3.45 V 0.2 -90 -118 -142 -145 0.8 ps dBc/Hz @ 622.08MHz Consult factory for Bandwidth and Lock Range options For Fin < 20 MHz , ensure SR > 50 V/µs North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com • RevF0214 Specifications are subject to change without notice 1 VFJA100 Jitter Attenuator to 1GHz 25.4x22mm SMD, PECL/LVPECL Electrical Specifications Parameter Supply Current Symbol Condition Min ICC 50 Ohms Load Typ Max Unit 62 75 mA Note 50 Ohms to VCC-2V or Thevenin Equivalent Load @ 50% Duty Cycle Logic “1” Level Logic “0” Level 45 50 55 % VOH VCC-0.96 VCC-0.81 V VOL VCC-1.85 VCC-1.65 V 20 Lock Range AC Coupled Internally Input Level Enable / Disable Function Enable / Disable Time ppm 1.0 3.3 VP-P Input HIGH (>2.5V): DISABLED Input LOW (<0.5V) or floating: ACTIVE TE/TD Note 1 LVCMOS 100 ns Absolute Maximum Ratings Parameter Supply Voltage Storage Temperature Symbol Condition Min Typ Max Unit VCC -0.5 +5.5 V TS -55 +105 C Note How to Order Output FREQUENCY, XXXX.XXXX MHz VFJA100 Input FREQUENCY XXX.XXXX MHz Temperature Range Code B G Specification 0C to +70C -40C to +85C North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com • RevF0214 Specifications are subject to change without notice 2 VFJA100 Jitter Attenuator to 1GHz 25.4x22mm SMD, PECL/LVPECL Environmental and Mechanical Conditions Parameter Mechanical Shock Thermal Shock Condition Per MIL-STD-202, Method 213, Condition E Per MIL-STD-883, Method 1011, Condition A Vibration Per MIL-STD-883, Method 2007, Condition A Soldering Conditions 260C for 10s max Leak rate less than 5x10-8 atm.cc/s of helium (crystal only) Hermetic Seal Mechanical Outline Connection Diagram VCC C1 0.01 Disable 3 4 R1 180 Ω FOUT 5 nc Reference Clock Input 2 1 6 7 GND Pin # 1 2 3 4 5 6 7 nFOUT R2 180 Ω Connection VREF N/C VCC Disable FOUT FOUT GND North Americas: +1-800-757-6686 • International: +1-508-435-6831 • Asia: +65-655-17551 • www.ctscorp.com • RevF0214 Specifications are subject to change without notice 3