PIC16F630/676 PIC16F630/676 Rev. A Silicon/Data Sheet Errata The PIC16F630/676 parts you have received conform functionally to the Device Data Sheet (DS40039E), except for the anomalies described below. All issues listed here will be addressed in future revisions of the PIC16F630/676 silicon. 1. Module: Data EEPROM Memory The EEIF flag may be cleared inadvertently when performing operations on the PIR1 register simultaneously with the completion of an EEPROM write. This condition occurs when the EEPROM write timer completes at the same moment that the PIR1 register operation is executed. Register operations are those that have the PIR1 register as the destination and include, but are not limited to, BSF, BCF, ANDWF, IORWF and XORWF. Work around 1. Avoid operations on the PIR1 register when writing to the EEPROM memory. 2. Poll the WR bit (EECON1<1>) to determine when the write is complete. 3. Use a timer interrupt to catch any instances when the EEIF flag is inadvertently cleared. The timer interrupt should be set longer than 8 ms. If EEIF fails then the timer interrupt occurs as a default time out. The WR and WRERR flags are checked as part of the timer Interrupt Service Routine to verify the EEPROM write success. 4. If periodic interrupts are occurring in addition to the EEIF interrupts, then use a secondary flag to sense write completion. The secondary flag is set whenever EEPROM writes are active. An EEPROM write completion is indicated when the secondary flag is set and the WR flag is clear. © 2007 Microchip Technology Inc. 2. Module: Power-on Reset (Rising VDD Detect) The PIC16F630/676 Power-on Reset (POR) circuitry is sensitive to a low VDD level and may fail to release the Reset if VDD returns to an operational voltage after dropping to a very low level. The sensitive VDD condition occurs when VDD drops into an out-of-specification voltage region below the Brown-out Detect threshold and then recovers to a normal operating condition. The voltage region that can cause the problem is dependant upon temperature with the region growing as the temperature drops. A typical region is between 0.5 and 0.7V at -25°C. Below the region, the POR operates correctly. Above the region, the POR is inactive per the data sheet. Inside the region, the POR will assert Reset and will not release Reset until power is removed and VDD reaches VSS. Because the POR is independent of other Reset circuits (see Figure 9-4 of the data sheet), activating BOR or using the MCLR input will not eliminate the problem. Work around To resolve this problem the application must be designed to assure that VDD reaches VSS. This is described as D003 VPOR in Section 12.0 “Electrical Specifications” in the Device Data Sheet (DS40039). DS80185F-page 1 PIC16F630/676 Clarifications/Corrections to the Data Sheet: In the Device Data Sheet (DS40039E), the following clarifications and corrections should be noted. 1. Module: Product Identification System In the Product Identification System description, the package “SOIC (Gull wing, 3.90 mm body) lists the package code as SN. The correct package code for this device is SL. “Example b” should read I/SL, as shown in bold print in Figure 1 below. FIGURE 1: PRODUCT IDENTIFICATION SYSTEM PART NO. X /XX XXX Device Temperature Range Package Pattern Device: PIC16F6XX: Standard VDD range 2.0V to 5.5V PIC16F6XXT VDD range 2.0V to 5.5V (Tape and Reel) Temperature Range: I E = = -40°C to +85°C -40°C to +125°C Package: P SL ST = = = PDIP SOIC (Gull Wing, 3.90 mm body) TSSOP (4.4mm) Pattern: 3-Digit Pattern Code for QTP (blank otherwise). DS80185F-page 2 Examples: a) PIC16F630 - E/P 301 = Extended Temp., PDIP package, 20 MHz, QTP pattern #301. b) PIC16F676 - I/SL = Industrial Temp., SOIC package, 20 MHz. © 2007 Microchip Technology Inc. PIC16F630/676 2. Module: TRISA – PORTA Tri-state Register Register 3-2: Correction to replace R/W-x with R/W-1 as shown in bold. REGISTER 3-2: TRISA – PORTA TRI-STATE REGISTER (ADDRESS: 85h) U-0 U-0 R/W-1 R/W-1 R-1 R/W-1 R/W-1 R/W-1 — — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 bit 7 bit 0 bit 7-6: Unimplemented: Read as ‘0’ bit 5-0: TRISA<5:0>: PORTA Tri-State Control bit 1 = PORTA pin configured as an input (tri-stated) 0 = PORTA pin configured as an output Note: TRISA<3> always reads 1. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown 3. Module: ANSEL – Analog Select Register The ANSEL register address is 91h. Change all ANSEL register addresses called out as 9Fh to 91h in the following sections, as shown in bold: In Section 3.1, PORTA and the TRISA Registers, in the note box: Note: The ANSEL (91h) and CMCON (19h)..... In Section 3.3, PORTC, in the note box: Note: The ANSEL register (91h) must be..... In Section 4.3, Using Timer0 with an External Clock, in the note box: Note: The ANSEL (91h) and CMCON (19h)..... In Section 5.4, Timer1 Operation in Asynchronous Counter Mode, in the note box: Note: The ANSEL (91h) and CMCON (19h)..... In Section 9.4.1, RA2/INT Interrupt, in the note box: Note: The ANSEL (91h) and CMCON (19h)..... © 2007 Microchip Technology Inc. DS80185F-page 3 PIC16F630/676 4. Module: New 4x4 QFN Package Added The new 16-pin 4x4 QFN pinout diagrams will be added to the Pin Diagrams figure on page 2 and the Packaging Information chapter as shown below: Pin Diagram 14.1 VDD NC NC VSS 16 15 14 13 16-pin QFN RA5/T1CKI/OSC1/CLKIN 1 12 RA0/C1IN+/ICSPDAT RA4/T1G/OSC2/CLKOUT 2 11 RA1/CIN-/VREF/ICSPCLK RA3/MCLR/VPP 3 10 RA2/COUT/T0CKI/INT RC5 4 9 RA5/T1CKI/OSC1/CLKIN 1 RA4/AN3//T1G/OSC2/CLKOUT 2 RA3/MCLR/VPP 3 RC5 4 9 5 6 7 8 RC4 RC3 RC2 RC1 VDD NC NC VSS 16 15 14 13 PIC16F630 7 8 RC1/AN5 RA2/AN2/COUT/T0CKI/INT RC2/AN6 RA1/AN1/CIN-/VREF/ICSPCLK 6 11 10 5 RA0/AN0/CIN+/ICSPDAT RC4 12 RC3/AN7 PIC16F676 RC0 RC0/AN4 Package Marking Information 16-Lead QFN XXXXXX XXXXXX YWWNNN DS80185F-page 4 Example 16F630 -I/ML 510017 © 2007 Microchip Technology Inc. PIC16F630/676 16-Lead Plastic Quad Flat, No Lead Package (ML) – 4x4x0.9 mm Body [QFN] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D2 D EXPOSED PAD e E E2 2 2 1 b 1 TOP VIEW K N N NOTE 1 L BOTTOM VIEW A3 A A1 Units Dimension Limits Number of Pins MILLIMETERS MIN N NOM MAX 16 Pitch e Overall Height A 0.80 0.65 BSC 0.90 1.00 Standoff A1 0.00 0.02 0.05 Contact Thickness A3 0.20 REF Overall Width E Exposed Pad Width E2 Overall Length D Exposed Pad Length D2 2.50 2.65 2.80 b 0.25 0.30 0.35 Contact Length L 0.30 0.40 0.50 Contact-to-Exposed Pad K 0.20 – – Contact Width 4.00 BSC 2.50 2.65 2.80 4.00 BSC Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package is saw singulated. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-127B © 2007 Microchip Technology Inc. DS80185F-page 5 PIC16F630/676 5. Module: PORTA: Initializing Example Change Example 3-1: Initializing PORTA to the following (bold text): EXAMPLE 3-1: BCF CLRF MOVLW MOVWF BSF CLRF MOVLW MOVWF STATUS,RP0 PORTA 07h CMCON STATUS,RP0 ANSEL 0Ch TRISA BCF STATUS,RP0 DS80185F-page 6 INITIALIZING PORTA ;Bank 0 ;Init PORTA ;Set RA<2:0> to ;digital I/O ;Bank 1 ;digital I/O ;Set RA<3:2> as inputs ;and set RA<5:4,1:0> ;as outputs ;Bank 0 © 2007 Microchip Technology Inc. PIC16F630/676 APPENDIX A: REVISION HISTORY Rev. A Document (04/02/04) First revision of this document. Rev. B Document (06/03/04) Added Item 3, changing the ANSEL register address references from 9Fh to the correct address of 91h. Rev. C Document (11/2004) Added Module 1: “Data EEPROM Memory” for PIC16F630/676 silicon. Rev D Document (07/2005) Data Sheet Clarifications/Corrections Section: Added Module 4: New 4x4 QFN Package added. Rev. E Document (8/2006) Added Module 2: “Power-on Reset (Rising VDD Detect)” for PIC16F630/676 silicon. Rev. F Document (3/2007) Data Sheet Clarifications/Corrections Section: Module 1, Figure 1 - updated package SL; Module 4 - updated QFN package; Added Module 5: “PORTA: Initializing Example” in the Data Sheet correction section. © 2007 Microchip Technology Inc. DS80185F-page 7 PIC16F630/676 NOTES: DS80185F-page 8 © 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2007 Microchip Technology Inc. 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