INTEGRATED CIRCUITS 74LV125 Quad buffer/line driver (3-State) Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook 1998 Apr 28 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 FEATURES DESCRIPTION • Wide operating voltage: 1.0 to 5.5 V • Optimized for Low Voltage applications: 1.0 to 3.6 V • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V • Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, The 74LV125 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT125. The 74LV125 consists of four non-inverting buffers/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high impedance OFF-state. Tamb = 25°C. • Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Tamb = 25°C. • Output capability: bus driver • ICC category: MSI QUICK REFERENCE DATA GND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 ns PARAMETER SYMBOL tPHL/tPLH Propagation delay nA to nY CI Input capacitance CPD CONDITIONS TYPICAL UNIT 9 ns 3.5 pF 22 pF CL = 15 pF; VCC = 3.3 V Power dissipation capacitance per buffer VCC = 3.3 V; VI = GND to VCC1 NOTE: 1. CPD is used to determine the dynamic power dissipation (PD in µW) PD = CPD × VCC2 × fi (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # 14-Pin Plastic DIL –40°C to +125°C 74LV125 N 74LV125 N SOT27-1 14-Pin Plastic SO –40°C to +125°C 74LV125 D 74LV125 D SOT108-1 14-Pin Plastic SSOP Type II –40°C to +125°C 74LV125 DB 74LV125 DB SOT337-1 14-Pin Plastic TSSOP Type I –40°C to +125°C 74LV125 PW 74LV125PW DH SOT402-1 PIN DESCRIPTION FUNCTION TABLE PIN NUMBER SYMBOL 1, 4, 10, 13 1OE – 4OE 2, 5, 9, 12 1A – 4A Data inputs 3, 6, 8, 11 Data enable inputs (active LOW) 1Y – 4Y Data Outputs 7 GND Ground (0 V) 14 VCC Positive supply voltage 1998 Apr 28 INPUTS NAME AND FUNCTION OUTPUT nOE nA nY L L H L H X L H Z NOTES: H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state 2 853–1901 19290 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 PIN CONFIGURATION LOGIC SYMBOL (IEEE/IEC) 2 1 14 VCC 1A 2 13 4OE 1 1Y 3 12 4A 5 4 11 4Y 2A 5 10 3OE 2Y 6 9 3A 7 8 3Y 1OE 1 3 EN1 2OE 6 4 9 8 GND 10 12 SV00455 11 13 LOGIC SYMBOL 2 1A 1 1OE 5 2A 4 2OE 9 3A 10 3OE 12 4A 13 4OE 1Y 3 2Y 6 3Y 8 4Y SV00457 11 SV00456 RECOMMENDED OPERATING CONDITIONS SYMBOL VCC PARAMETER CONDITIONS MIN TYP See Note 1 DC supply voltage MAX UNIT 1.0 3.3 5.5 V VI Input voltage 0 – VCC V VO Output voltage 0 – VCC V +85 +125 °C 500 200 100 50 ns/V Tamb Operating ambient temperature range in free air tr, tf Input rise and fall times See DC and AC characteristics –40 –40 VCC = 1.0V to 2.0V VCC = 2.0V to 2.7V VCC = 2.7V to 3.6V VCC = 3.6V to 5.5V – – – – – – – – NOTE: 1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 5.5V. 1998 Apr 28 3 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 ABSOLUTE MAXIMUM RATINGS1, 2 In accordance with the Absolute Maximum Rating System (IEC 134). Voltages are referenced to GND (ground = 0 V). PARAMETER SYMBOL VCC DC supply voltage "IIK DC input diode current "IOK "IO "IGND, "ICC Tstg PTOT CONDITIONS RATING UNIT –0.5 to +7.0 V VI < –0.5 or VI > VCC + 0.5V 20 mA DC output diode current VO < –0.5 or VO > VCC + 0.5V 50 mA DC output source or sink current – bus driver outputs –0.5V < VO < VCC + 0.5V 35 DC VCC or GND current for types with – bus driver outputs mA mA 70 Storage temperature range °C –65 to +150 Power dissipation per package – plastic DIL – plastic mini-pack (SO) – plastic shrink mini-pack (SSOP and TSSOP) for temperature range: –40 to +125°C above +70°C derate linearly with 12 mW/K above +70°C derate linearly with 8 mW/K above +60°C derate linearly with 5.5 mW/K 750 500 400 mW NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions, voltages are referenced to GND (ground = 0 V) LIMITS SYMBOL PARAMETER -40°C to +85°C TEST CONDITIONS MIN VIH VIL HIGH level Input voltage LOW level Input voltage TYP1 0.9 0.9 VCC = 2.0 V 1.4 1.4 VCC = 2.7 to 3.6 V 2.0 2.0 VCC = 4.5 to 5.5 V 0.7<VCC VOH VOL HIGH level output voltage; BUS driver outputs LOW level l l output t t voltage out uts voltage; all outputs VOL 1998 Apr 28 V 0.7<VCC 0.3 0.3 VCC = 2.0 V 0.6 0.6 VCC = 2.7 to 3.6 V 0.8 0.8 0.3<VCC 0.3<VCC 1.8 2.0 1.8 VCC = 2.7 V; VI = VIH or VIL; –IO = 100µA 2.5 2.7 2.5 VCC = 3.0 V; VI = VIH or VIL; –IO = 100µA 2.8 3.0 2.8 VCC = 4.5 V; VI = VIH or VIL; –IO = 100µA 4.3 4.5 4.3 VCC = 3.0 V; VI = VIH or VIL; –IO = 8mA 2.40 2.82 2.20 VCC = 4.5 V; VI = VIH or VIL; –IO = 16mA 3.60 4.20 3.50 V V VCC = 1.2 V; VI = VIH or VIL; IO = 100µA 0 VCC = 2.0 V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 2.7 V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 VCC = 3.0 V; VI = VIH or VIL; IO = 100µA 0 0.2 0.2 0 0.2 0.2 VCC = 3.0 V; VI = VIH or VIL; IO = 8mA 0.20 0.40 0.50 VCC = 4.5 V; VI = VIH or VIL; IO = 16mA 0.35 0.55 0.65 4 V 1.2 VCC = 2.0 V; VI = VIH or VIL; –IO = 100µA VCC = 4.5 V; VI = VIH or VIL; IO = 100µA LOW level output voltage; BUS driver outputs UNIT MAX VCC = 1.2 V VCC = 1.2 V; VI = VIH or VIL; –IO = 100µA HIGH level l l output t t voltage out uts voltage; all outputs MIN VCC = 1.2 V VCC = 4.5 to 5.5 VOH -40°C to +125°C MAX V V Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 DC ELECTRICAL CHARACTERISTICS (Continued) Over recommended operating conditions, voltages are referenced to GND (ground = 0 V) LIMITS SYMBOL PARAMETER -40°C to +85°C TEST CONDITIONS MIN Input leakage current VCC = 5.5 V; VI = VCC or GND IOZ 3-State output OFF-state current VCC = 5.5 V; VI = VIH or VIL; VO = VCC or GND ICC Quiescent supply current; MSI ∆ICC Additional quiescent supply current per input II TYP1 -40°C to +125°C MAX MIN UNIT MAX 1.0 1.0 µA 5 10 µA VCC = 5.5 V; VI = VCC or GND; IO = 0 20.0 160 µA VCC = 2.7 V to 3.6 V; VI = VCC – 0.6 V 500 850 µA NOTE: 1. All typical values are measured at Tamb = 25°C. AC CHARACTERISTICS GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ SYMBOL PARAMETER WAVEFORM VCC(V) tPHL/tPLH Propagation delay nA to nY Figures 1, 2 LIMITS CONDITION –40 to +85 °C MIN TYP1 3 State output 3-State out ut enable time OE tto nY Y nOE Figures 2, 3 3 State output 3-State out ut disable time nOE OE tto nY Y Figures 2, 3 55 19 24 31 2.7 14 18 23 3.0 to 3.6 102 14 18 12 15 1.2 75 2.0 26 31 39 2.7 19 23 29 3.0 to 3.6 142 18 23 15 19 1.2 65 2.0 24 32 39 2.7 18 24 29 3.0 to 3.6 142 20 24 17 21 4.5 to 5.5 NOTES: 1. Unless otherwise stated, all typical values are measured at Tamb = 25°C 2. Typical values are measured at VCC = 3.3 V. 1998 Apr 28 5 UNIT MAX 2.0 4.5 to 5.5 tPHZ/tPLZ MIN 1.2 4.5 to 5.5 tPZH/tPZL –40 to +125 °C MAX ns ns ns Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 AC WAVEFORMS TEST CIRCUIT VM = 1.5 V at VCC ≥ 2.7 V and ≤ 3.6 V; VM = 0.5 × VCC at VCC < 2.7 V and ≥ 4.5 V. VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3 V at VCC ≥ 2.7 V and ≤ 3.6 V; VX = VOL + 0.1 × VCC at VCC < 2.7 V and ≥ 4.5 V. VY = VOH – 0.3 V at VCC ≥ 2.7 V and ≤ 3.6 V; VY = VOH – 0.1 ⋅ VCC at VCC < 2.7 V and ≥ 4.5 V. VCC PULSE GENERATOR D.U.T. RT VM CL t PHL t PLH DEFINITIONS V OH RL = Load resistor CL = Load capacitance includes jig and probe capacitiance. RT = Termination resistance should be equal to ZOUT of pulse generators. VM V OL SWITCH POSITION SV00459 VI VCC tPLH/tPHL Open < 2.7V VCC tPLZ/tPZL 2 * VCC 2.7–3.6V 2.7V tPHZ/tPZH GND 4.5V VI VCC SV00896 VM Figure 3. Load circuitry for switching times. GND tPLZ VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL tPZL VM VX tPZH tPHZ VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND VY VM outputs enabled outputs disabled outputs enabled SV00458 Figure 2. 3-state enable and disable times. 1998 Apr 28 S1 TEST Figure 1. Input (nA) to output (nY) propagation delays and output transition times. nOE Input RL = 1k 50 pF Test Circuit for Outputs GND nY OUTPUT RL = 1k VO VI Vl nA INPUT 2 * VCC Open GND 6 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 DIP14: plastic dual in-line package; 14 leads (300 mil) 1998 Apr 20 7 SOT27-1 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 SO14: plastic small outline package; 14 leads; body width 3.9 mm 1998 Apr 20 8 SOT108-1 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm 1998 Apr 20 9 SOT337-1 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm 1998 Apr 20 10 SOT402-1 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 NOTES 1998 Apr 20 11 Philips Semiconductors Product specification Quad buffer/line driver (3-State) 74LV125 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: 1998 Apr 20 12 Date of release: 05-96 9397-750-04419