AN-1364 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Differential Filter Design for a Receive Chain in Communication Systems by Mercy Chen INTRODUCTION RF engineers often see single-ended 50 Ω systems in design. Some of them feel that the differential circuit is not easy to design, test, and debug. Meanwhile, for better performance the differential system is often applied in communication systems especially in the IF stage. Among those difficulties, a differential filter is a key concern. This application note looks at some basic filter key specifications concepts, a few types of frequently used filter responses, a Chebyshev Type 1 filter application, and step-by-step instructions on how to transfer a single-ended filter design to a differential filter design. A differential filter design example is in this application note as well as a few points on how to optimize differential circuit PCB design. Rev. 0 | Page 1 of 10 AN-1364 Application Note TABLE OF CONTENTS Introduction ...................................................................................... 1 Designing a Band-Pass Filter .......................................................7 Revision History ............................................................................... 2 Application Example .....................................................................7 Differential Circuit Advantages .................................................. 3 Differential Filter Layout Consideration ....................................8 Filters .............................................................................................. 3 References .................................................................................... 10 Designing a Low-Pass Filter ........................................................ 6 REVISION HISTORY 7/15—Revision 0: Initial Version Rev. 0 | Page 2 of 10 Application Note AN-1364 This section discusses differential circuit advantages in RF signal chain applications compare to single-ended circuits. The user can reach a higher signal amplitude with a differential circuit than with a single-ended circuit. With the same power supply voltage, a differential signal can provide double the amplitude compared to a single-ended signal; it provides better linearity performance and SNR performance. a VOD = 1 – 0 = 1 VCC +1 VOUT+ 0 VOUT– +1 VOCM DIFFERENTIAL OUTPUT VOD p-p = 1 – (–1) = 2 Figure 3. Differential Amplifier VOUT VOUT VOUT [Cn (VIN )n Cn (VIN )n (3) VOUT C0 C1 cos t C 2 (cos t )2 C 3 (cos t )3 (4) Therefore, in the communication system, for better performance consideration, a differential circuit is preferred. Differential circuits are fairly immune to outside EMI and crosstalk from nearby signals. This is because the received voltage is doubled, and theoretically, the noise affects the tightly coupled traces equally. Therefore, they cancel each other out. Differential signals also tend to produce less EMI. This is because the changes in signal levels (dV/dt or dI/dt) create opposing magnetic fields, again canceling each other out. FILTERS Filter Specification Cutoff frequency, corner frequency, or break frequency is a boundary in a system's frequency response at which energy flowing through the system begins to reduce (attenuate or reflect) rather than passing through. 0 Differential signals can reject even order harmonics. For example, use continuous wave (CW) passes through one gain stage. 1 4 6 8 10 GAIN (dB) 2 2 m1 3dB CUTOFF FREQUENCY –10 If using one single-ended amplifier, the output can be expressed as shown in Figure 2, Equation 1, and Equation 2. –2 (6) Ideally, the output does not have any even order harmonics. Figure 1. Differential Output Amplitude –4 VOUT– where … indicates that the sequence continues. VOD = 0 – 1 = –1 b –6 VIN– = –Acos ωt VOUT 2C1 cos t 2C3 (cos t )3 0 VEE VOUT+ VOUT C0 C1( cos t ) C 2 ( cos t )2 C 3 ( cos t )3 (5) 13221-001 VIN– VIN+ VIN+ = Acos ωt 13221-003 If using one differential amplifier, the input and output are shown in Figure 3, Equation 3, Equation 4, Equation 5, and Equation 6. DIFFERENTIAL CIRCUIT ADVANTAGES 12 –20 –30 VOUT –40 m1 FREQUENCY = 219MHz dB(S(6,5)) = –3.014dB Figure 2. Single-Ended Amplifier –50 VOUT CnVIN n (1) VOUT C0 C1 cos t C 2 (cos t )2 C 3 (cos t )3 (2) where … indicates that the sequence continues. Rev. 0 | Page 3 of 10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 FREQUENCY (GHz) Figure 4. 3 dB Cutoff Frequency Point 0.9 1.0 13221-004 –2 VIN = Acos ωt 13221-002 –1 AN-1364 Application Note In-band ripple is the fluctuation of insertion loss within the pass band. Group delay is a measure of the time delay of the amplitude envelopes of the various sinusoidal components of a signal through a device under test, and is a function of frequency for each component. 1 IN-BAND RIPPLE 12 0 10 –1 8 DELAY (ns) –2 –3 0 20 40 60 80 100 120 140 160 180 200 220 FREQUENCY (MHz) 13221-005 4 –4 –20 0 100 0 0.2 0.3 0.4 0.5 0.6 0.7 FREQUENCY (GHz) 0.8 0.9 1.0 13221-006 –100 0.1 200 Figure 7. Group Delay 200 –200 100 FREQUENCY (GHz) Phase linearity is the direct proportionality of phase shift to frequency over the frequency range of interest. 0 2 0 Figure 5. In-Band Ripple PHASE (Degrees) 6 Figure 6. Phase Linearity Rev. 0 | Page 4 of 10 300 400 13221-007 GAIN (dB) ΔdB Application Note AN-1364 Filter Comparison Table 1. Filters Comparison Filter Butterworth Elliptic S21 Response See Figure 8 See Figure 9 Pros Very good flatness in pass band Rolls off very quickly in close in stop band Bessel Chebyshev Type I See Figure 10 See Figure 11 Chebyshev Type II See Figure 12 Maximum flat group/phase delay Rolls off quickly in stop band; no equalized ripple in stop band No ripple in pass band Cons Rolls off slowly in stop band Has equalized ripple in both pass band and stop band, this affects the stop band rejection performance Very slow roll off in stop band Has equalized ripple in pass band Roll off is not very fast; has equalized ripple in stop band 0 0 –10 –20 GAIN (dB) GAIN (dB) –20 –30 –40 –40 –60 –50 –80 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 FREQUENCY (GHz) –100 13221-008 –70 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 FREQUENCY (GHz) 13221-011 –60 Figure 11. Chebyshev Type I Filter S21 Response Figure 8. Butterworth Filter S21 Response 10 0 0 –10 GAIN (dB) GAIN (dB) –20 –40 –20 –30 GAIN = C 1 + C2 –40 –60 –50 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 FREQUENCY (GHz) PASS BAND –60 0.1 1 ω/ω0 Figure 9. Elliptiv Filter S21 Response 10 Figure 12. Chebyshev Type II Filter S21 Response 0 The IF filter designed in the communication receive chain is basically a low-pass filter or band-pass filter; it is used for rejecting the aliasing signals together with spurs generated by active components. The spurs include functions such as harmonics and IMD products. With the filter, the receive chain can provide clean and good SNR signals for ADC to analyze. –0.5 –1.0 –1.5 The Chebyshev Type I filter was chosen as the topology because it has good in-band flatness, quick roll off in stop band, and no equiripple in stop band. –2.0 –2.5 –3.0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 FREQUENCY (GHz) 0.9 1.0 13221-010 GAIN (dB) STOP BAND 13221-012 0 13221-009 –80 Figure 10. Bessel Filter S21 Response Rev. 0 | Page 5 of 10 AN-1364 Application Note DESIGNING A LOW-PASS FILTER C1SCALED = 1.433/(2π × 100 × 106 × 200) = 11.4 pF Because the receive IF filter is used to reject spurs and aliasing signals, using a faster stop band roll-off is better; however, faster roll-off means higher-order components. Nevertheless, a highorder filter is not recommended because following reasons: L2SCALED = (1.594 × 200)/(2π × 100 × 106) = 507.4 nH 11.4pF RL 200Ω Figure 13. Single-Ended Filter Example Convert the single-ended filter into a differential filter (see Figure 14). RS/2 = 100Ω Define the response needed by specifying the required attenuation at a selected frequency point. Use low-cost filter software, such as MathCad®, MATLAB®, or ADS to design the single-ended low-pass filter. Alternatively, design the filter by manually. RF Circuit Design by Chris Bowick (see the References section) offers a useful guide. RS/2 = 100Ω Cn 2πf c R L (8) LSCALED = Ln RL 2πf c (9) RL 200Ω 253.7nH Using the real world value for each component, the filter is updated as shown in Figure 15. RS/2 = 100Ω 250nH 12pF VS RS/2 = 100Ω (7) CSCALED = 11.4pF Figure 14. Converting Single-Ended Filter into Differential Filter To determine the orders of the filter, normalize the frequency of interest by dividing it with the cutoff frequency of the filter. For example, if the in-band ripple needs to be 0.1 dB, the 3 dB cutoff frequency is 100 MHz. At 250 MHz the rejection needs to be 28 dB, the frequency ratio is 2.5. A third-order low-pass filter can meet this requirement. If the source impedance of the filter is 200 Ω, the load impedance of the filter is also 200 Ω, RS/RL is 1; use a capacitor as the first component. Then the user receives a normalized C1 = 1.433, L2 = 1.594, C3 = 1.433, if the fc is 100 MHz, use Equation 7 and Equation 8 to finalized results 253.7nH 11.4pF VS To determine the maximum amount of ripple in the pass band, keep the specification to the maximum limit of the system requirement, this can help get faster roll-off in stop band. f fc 11.4pF VS In general, use a seventh-order or lower filter. Meanwhile, with the same order components, if bigger in-band ripple isn’t a problem, faster roll-off in stop band is a payout. Frequency ratio = 507.4nH 13221-013 RS 200Ω Difficulty for tuning at the design and debug stage. Difficulty in mass production, because capacitors and inductors have part-to-part variation; it is difficult for filters on each PCB board to have the same response. Large PCB size. 13221-014 • The circuit is shown in Figure 13. 12pF 250nH RL 200Ω 13221-015 • • C3SCALED = 11.4 pF Figure 15. Final Differential Filter Note that if the output impedance of the mixer or IF amplifier and the input impedance of ADC are capacitive, it is better to consider using a capacitor as the first component and a capacitor as the last component. Also, it is important to tune the first capacitor and last stage capacitor value at a higher rate (at least 0.5 pF) than the capacitance of the output impedance of the mixer or IF amplifier and input impedance of ADC. Otherwise, it is very difficult to tune the filter response. where: CSCALED is the final capacitor value. LSCALED is the final inductor value. Cn is a low-pass prototype element value. Ln is a low-pass prototype element value. RL is the final load resistor value. fc is the final cutoff frequency. Rev. 0 | Page 6 of 10 Application Note AN-1364 4. DESIGNING A BAND-PASS FILTER In communication systems when the IF frequency is quite high, some low frequency spurs also need to be filtered out, like half IF spur. For this kind of application, design a band-pass filter. For a band-pass filter, it is not necessary to be symmetrical for low frequency rejection and high frequency rejection. The easy way to design a band-pass antialiasing filter is to design a lowpass filter first, then add one shunt inductor in parallel with the shunt capacitor at the final stage of the filter to limit low frequency components (a shunt inductor is a high-pass resonance pole). If one stage high-pass inductor is not enough, add one more shunt inductor in parallel with the first stage shunt capacitor to get more rejection for low frequency spurs. After adding the shunt inductor, tune all components again, to receive the right out of band rejection specification and then finalize the filter components value. For subsystem level simulation, add the ADL5201 DGA S-parameter file at the input, use the voltage control voltage source to model the AD6641 ADC at the output of the filter. To change the low-pass filter into a band-pass filter, add two shunt inductors: L7 in parallel with C9 and L8 in parallel with C11. C12 represents the AD6641 input capacitance. R3 and R4 are two load resistors put at the input of AD6641 to be the load of filter. The AD6641 input is high impedance. After tuning, see Figure 21. The simulation results with ideal components is shown in Figure 16. 5. m5 m6 20 0 –20 GAIN (dB) Note that in general for a band-pass filter, serial capacitors are not recommended because they increase tuning and debugging difficulty. The capacitance value is usually quite small, it is heavily affected by parasitic capacitance. –40 –60 APPLICATION EXAMPLE –80 Center frequency: 368.4 MHz Bandwidth: 240 MHz Input and output impedance: 150 Ω In-band ripple: 0.2 dB Insertion loss: 1 dB Out of band rejection: 30 dB at 614.4 MHz 0 3. 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Figure 16. Filter Transmission Response with Ideal Inductors 6. Replace all ideal inductors with the inductor S-parameter files of the intended device (for example, Murata LQW18A). The insertion loss is a little bit higher than using ideal inductors. The simulation result changes slightly as shown in Figure 17. m1 m2 20 GAIN (dB) 0 –20 –40 –60 Start with a single-ended, low-pass filter design (see Figure 18). Change the single-ended filter into a differential filter. Keep the source and load impedance the same, shunt all capacitors, and cut all serial inductors in half and put them in the other differential path (see Figure 19). Optimize the components ideal value with real world value (see Figure 20). m1 FREQUENCY = 248MHz dB(S(2,1)) = 17.968dB m2 FREQUENCY = 488MHz dB(S(2,1)) = 17.730dB –80 0 0.1 0.2 0.3 0.4 0.5 0.6 FREQUENCY (GHz) 0.7 0.8 0.9 1.0 13221-021 2. 0.1 FREQUENCY (GHz) To build the example design, use the following steps: 1. m6 FREQUENCY = 488MHz dB(S(4,3)) = 18.475dB –100 Following are some of the band-pass filter design specifications taken from a real communication system design: • • • • • • m5 FREQUENCY = 248MHz dB(S(4,3)) = 18.527dB 13221-020 This section describes an application example of filter design between the ADL5201 and AD6641. The ADL5201 is a high performance IF digitally controlled gain amplifier (DGA), which is designed for base station real IF receiver applications or digital predistortion (DPD) observation paths; it has a 30 dB gain control range, very high linearity whose OIP3 reaches 50 dBm, and a voltage gain of about 20 dB. The AD6641 is a 250 MHz bandwidth DPD observation receiver that integrates a 12-bit 500 MSPS ADC, a 16,000 × 12 FIFO, and a multimode back end that allows users to retrieve the data through a serial port. This filter example is a DPD application. Figure 17. Filter Transmission Response with Murata LQW18A Inductors Rev. 0 | Page 7 of 10 AN-1364 Application Note + – TERM3 NUM = 3 Z = 150Ω L15 74nH + C12 2.8pF C13 4.8pF C14 2.8pF – TERM4 NUM = 4 Z = 150Ω 13221-016 L13 74nH Figure 18. Single-Ended Low-Pass Filter + – TERM3 NUM = 3 Z = 150Ω L15 37nH + C12 2.8pF C13 4.8pF C14 2.8pF – L14 37nH TERM4 NUM = 4 Z = 150Ω 13221-017 L13 37nH L16 37nH Figure 19. Differential Low-Pass Filter with Ideal Components + – TERM3 NUM = 3 Z = 150Ω L15 36nH + C12 2.7pF C13 4.3pF C14 2.7pF – L14 36nH TERM4 NUM = 4 Z = 150Ω 13221-018 L13 36nH L16 36nH Figure 20. Differential Low-Pass Filter with Real World Value + – TERM3 NUM = 3 Z = 150Ω L9 47nH R3 75Ω L11 33nH R2 + 4 1 S4P SNP8 2 C9 2.7pF 3 REF C8 8.2pF L7 68nH C10 3.9pF L10 47nH C11 3.9pF L8 56nH R4 75Ω L12 33nH C12 1.3pF R1 – TERM4 NUM = 4 Z = 150Ω VCVS SRC2 G=1 13221-019 C7 8.2pF Figure 21. Differential Band-Pass Filter The differential traces in a pair need to be of an equal length. This rule originated from the fact that a differential receiver detects where the negative and positive signals cross each other at the same time—the crossover point. Therefore, the signals arrive at the receiver at the same time for proper operation. The traces within a differential pair need to be routed close to each other, the coupling between the neighboring lines within a pair is small if the distance between them is >2× the dielectrical thickness. Also, this rule is based upon the fact that because the differential signals are equal and opposite, and if external noise equally interferes with these signals, the noise nullifies. Similarly, any unwanted noise induced by the differential signals into adjacent conductors cancels each other out if traces are routed side by side. Use a wide pair-to-pair spacing to minimize crosstalk between pairs. If using copper fill on the same layer, increase the clearance from the differential traces to the copper fill. A minimum clearance of 3× the trace width from the trace to the copper fill is recommended. Reduce intra pair skew in a differential pair by introducing small meandering corrections close to the source of the skew (see Figure 22). MATCH NEAR LENGTH MISMATCH The trace separation within a differential pair needs to be constant over its entire length. If the differential traces are routed close together, then they impact the overall impedance. If this separation is not maintained from the driver to the receiver, there are impedance mismatches along the way, resulting in reflections. Rev. 0 | Page 8 of 10 AVOID Figure 22. Using Meandering Corrections 13221-022 DIFFERENTIAL FILTER LAYOUT CONSIDERATION Application Note AN-1364 Avoid tight (90°) bends when routing differential pairs (see Figure 23). PREFERRED 13221-023 AVOID Figure 23. Avoid 90° Bends Using symmetric routing when routing differential pairs (see Figure 25). AVOID STUBS PREFERRED One example of the differential filter PCB layout is Analog Devices, Inc., receiver reference design board (see Figure 26). Figure 26 shows a fifth-order filter between the ADL5201 and the AD6649. The AD6649 is 14-bit 250 MHz pipeline ADC that has very good SNR performance. 13221-025 If test points are required, avoid introducing trace stubs and place the test points symmetrically (see Figure 24). Consider relaxing the filter component value tuning workloads on the printed circuit board (PCB); it is important to keep the parasitic capacitance and inductance as low as possible. The parasitic inductance may not be significant compared to the design value of the inductor in the filter design. The parasitic capacitance is more critical for a differential IF filter. The capacitors in the IF filter designs are only a few picofarads, if the parasitic capacitance reaches a few tenths of picofarads, it affects the filter response significantly. To avoid parasitic capacitance, it is good practice to avoid any ground or power planes under the differential routing region and under power supply chokes. Figure 24. Avoiding Trace Stubs 13221-024 PREFERRED AVOID 13221-026 Figure 25. Symmetric Routing Guidelines Figure 26. Example of Differential Circuit PCB Layout Design Rev. 0 | Page 9 of 10 AN-1364 Application Note REFERENCES Bowick, Chris. RF Circuit Design. Newnes. 1997. Calvo, Carlos. “The Differential-Signal Advantage for Communications System Design.” Analog Devices, Inc. ©2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN13221-0-7/15(0) Rev. 0 | Page 10 of 10

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