Circuit Note CN-0112 Circuit Designs Using Analog Devices Products Apply these product pairings quickly and with confidence. For more information and/or support call 1-800-AnalogD (1-800-262-5643) or visit www.analog.com/circuit. Devices Connected/Referenced AD5292 10-Bit, 1% Resistor Tolerance Digital Potentiometer OP184 Rail-to-Rail Input and Output, Low Noise, High Slew Rate Operational Amplifier Variable Gain Noninverting Amplifier Using the AD5292 Digital Potentiometer and the OP184 Op Amp CIRCUIT FUNCTION AND BENEFITS CIRCUIT DESCRIPTION This circuit provides a low cost, high voltage, variable gain noninverting amplifier using the AD5292 digital potentiometer in conjunction with the OP184 operational amplifier. The circuit employs the AD5292 digital potentiometer in conjunction with the OP184 operational amplifier, providing a low cost, variable gain noninverting amplifier. The circuit offers 1024 different gains, controllable through an SPI-compatible serial digital interface. The ±1% resistor tolerance performance of the AD5292 provides low gain error over the full resistor range, as shown in Figure 2. The input signal, VIN, is amplified by the OP184. The op amp offers low noise, high slew rate, and rail-to-rail inputs and outputs. The circuit supports rail-to-rail inputs and outputs for both single-supply operation at +30 V and dual-supply operation at ±15 V, and is capable of delivering up to ±6.5 mA output current. In addition, the AD5292 has an internal 20-times programmable memory that allows a customized gain setting at power-up. The circuit provides accuracy, low noise, and low THD and is well suited for signal instrumentation conditioning. VOUT V– –15V/GND VDD +15V/+30V 20kΩ AD5292 VSS –15V/GND The maximum current through the AD5292 is ±3 mA, which limits the maximum input voltage, VIN, based on the circuit gain as described in Equation 2. (2) The circuit gain equation is RAW RAB (1) The ±1% internal resistor tolerance of the AD5292 ensures a low gain error, as shown in Figure 2. VSS SERIAL INTERFACE 08426-001 C1 10pF R AB R → R 2 = AB R2 G–1 When the input signal connected to VIN is higher than the theoretical maximum value from Equation 2, R2 should be increased, and the new gain can be recalculated using Equation 1. +15V/+30V V+ OP184 R2 4.99kΩ ± 1% G = 1+ VIN ≤ 0.003 × R2 VDD VIN The maximum circuit gain is defined in Equation 1. G = 1+ (1024 – D )× R AB 1024 R2 (3) where D is the code loaded in the digital potentiometer. Figure 1. Variable Gain NonInverting Amplifier Simplified Schematic (Decoupling and All Connections Not Shown) Rev. B “Circuits from the Lab” from Analog Devices have been designed and built by Analog Devices engineers. Standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verified in a lab environment at room temperature. However, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. Accordingly, in no event shall Analog Devices be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any“Circuit from the Lab”. (Continued on last page) One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2009-2010 Analog Devices, Inc. All rights reserved. CN-0112 Circuit Note VDD 5 VIN 4 V+ OP184 4 GAIN GAIN 3 2 2 C1 10pF ERROR (%) 3 1 0 0 200 400 600 800 0 1000 CODE (Decimal) 20kΩ AD5292 (1024 – D) × RAB 1024 D × RAB 1024 Figure 4. Logarithmic Gain Circuit 08426-002 1 VSS SERIAL INTERFACE RAB GAIN ERROR (%) VOUT V– 08426-004 5 10k Figure 2. Gain and Gain Error vs. Decimal Code 1k 175 GAIN (dBV) 0 –10 GAIN, RAW = 20kΩ 150 125 GAIN 10 PHASE, RAW = 10kΩ PHASE, RAW = 20kΩ PHASE, RAW = 100Ω 100 75 GAIN, RAW = 10kΩ 50 25 GAIN, RAW = 100Ω 0 –20 –25 –50 –30 PHASE (Degrees) 20 100 10 1 –100 0 500 –125 –50 CODE (Decimal) –150 600 1k 10k 100k –175 200k FREQUENCY (Hz) Figure 5. Logarithmic Gain Function 08426-003 –60 1000 08426-005 –75 –40 The circuit gain is defined in Equation 4 Figure 3. Gain and Phase vs. Frequency for AC Input Signal G = 1+ When the circuit input is an ac signal, the parasitic capacitances of the digital potentiometer can cause undesirable oscillation in the output. This can be avoided, however, by connecting a small capacitor, C1, between the inverter input and its output. A value of 10 pF was used for the gain and phase plots shown in Figure 3. A simple modification of the circuit provides a logarithmic gain function, as shown in Figure 4. In this case, the digital potentiometer is configured in the ratiometric mode. (1024 – D ) 1024 D = D (4) where D is the code loaded in the digital potentiometer. A gain plot vs. code is shown in Figure 5. The AD5292 has a 20-times programmable memory, which allows presetting the output voltage in a specific value at power-up. Excellent layout, grounding, and decoupling techniques must be utilized in order to achieve the desired performance from the circuits discussed in this note (see Tutorial MT-031, Grounding Data Converters and Solving the Mystery of AGND and DGND and Tutorial MT-101, Decoupling Techniques). As a minimum, a 4-layer PCB should be used with one ground plane layer, one power plane layer, and two signal layers. Rev. B | Page 2 of 3 Circuit Note CN-0112 COMMON VARIATIONS MT-091 Tutorial, Digital Potentiometers, Analog Devices. The AD5291 (8 bits with 20-times programmable power-up memory) and the AD5293 (10 bits with no power-up memory) are both ±1% tolerance digital potentiometers that are suitable for this application. MT-101 Tutorial, Decoupling Techniques, Analog Devices. Data Sheets and Evaluation Boards AD5291 Data Sheet. AD5292 Data Sheet. LEARN MORE AD5292 Evaluation Board. MT-031 Tutorial, Grounding Data Converters and Solving the Mystery of "AGND" and "DGND", Analog Devices. AD5293 Data Sheet. OP184 Data Sheet. MT-032 Tutorial, Ideal Voltage Feedback (VFB) Op Amp, Analog Devices. REVISION HISTORY MT-087 Tutorial, Voltage References, Analog Devices. 3/10—Rev. A to Rev. B Changes to Circuit Function and Benefits Section....................... 1 12/09—Rev. 0 to Rev. A Corrected trademark ........................................................................ 1 8/09—Revision 0: Initial Version (Continued from first page) "Circuits from the Lab" are intended only for use with Analog Devices products and are the intellectual property of Analog Devices or its licensors. While you may use the "Circuits from the Lab" in the design of your product, no other license is granted by implication or otherwise under any patents or other intellectual property by application or use of the "Circuits from the Lab". Information furnished by Analog Devices is believed to be accurate and reliable. However, "Circuits from the Lab" are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability, noninfringement or fitness for a particular purpose and no responsibility is assumed by Analog Devices for their use, nor for any infringements of patents or other rights of third parties that may result from their use. Analog Devices reserves the right to change any "Circuits from the Lab" at any time without notice, but is under no obligation to do so. Trademarks and registered trademarks are the property of their respective owners. ©2009-2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CN08426-0-3/10(B) Rev. B | Page 3 of 3