AN-912: Driving a Center-Tapped Transformer with a Balanced Current-Output DAC (Rev. 0) PDF

AN-912
APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Driving a Center-Tapped Transformer with a Balanced Current-Output DAC
by Ken Gentile
Note that Figure 1 assumes that the DAC is of the current
sourcing variety. In the case of a current sinking DAC, the
direction of IA and IB is reversed. Also, a connection to VSUPPLY
should replace the ground connections at the transformer
center tap and the RO resistors.
The use of a center-tapped transformer as the output interface
for a balanced current-output DAC offers several benefits.
First, transformer coupling offers dc isolation between the
DAC output and the final load. It can also aid in the rejection
of common-mode signals present at the DAC output. Furthermore, transformer coupling can mitigate the even harmonics
that result from an imbalance between the DAC outputs.
Finally, all transformers have a limited bandwidth, which can
be used to advantage for suppressing the Nyquist images that
typically appear in a DAC output spectrum.
In this application note, the current flowing through the normal
and complementary pins is referred to as IA and IB, respectively.
The maximum current that the DAC can deliver is denoted as
IMAX and represents the upper limit for both IA and IB. The exact
value of IA (or IB) depends on the digital code present at the
DAC input. The behavior of IA and IB is such that when the
digital code is zero, then IA = 0 and IB = IMAX. Conversely, when
the digital code is full scale, then IA = IMAX and IB = 0. For
intermediate digital codes, the two output currents are between
zero and IMAX, but are balanced such that IA + IB = IMAX at all
times. Thus, IA and IB can be expressed as
The goal of this application note is two-fold. The first goal is to
provide an explanation of the functionality of a balanced output
in the context of a current-output DAC. The second goal is to
provide formulas that relate the transformer turns ratio (N), the
transformer load (RL), the DAC load resistors (RO), and the
maximum DAC output current (IMAX).
I A = αI MAX
BALANCED CURRENT-OUTPUT DAC
I B = (1 − α )I MAX
Balanced current-output DACs come in two varieties: those
with current source outputs and those with current sink
outputs. DACs with current source outputs always inject
current into the external load, while DACs with current sink
outputs always draw current from the external load. In both
cases, the DAC output consists of two pins: a normal pin and a
complementary pin. The arrows that indicate direction of
current flow in the diagrams that follow assume conventional
current flow (that is, current flows from a positive potential
toward a negative potential).
where α is the fractional digital code value, that is, the input
digital code value to the DAC divided by the full-scale code value.
For example, given a 10-bit DAC with an input code of 200 and
an IMAX value of 10 mA, then α = 200/1023 (where 1023 is the
full-scale code value given by 210 − 1). This yields IA ≈ 1.955 mA
and IB ≈ 8.045 mA. Also, notice that IB can be expressed in
terms of IA as IB = IMAX − IA.
RO
VSUPPLY
DIGITAL
CODE
(1)
1:N
IA
RL
DAC
RO
06737-001
IB
Figure 1. A Balanced Current-Output DAC with Transformer Coupling
Rev. 0 | Page 1 of 12
AN-912
TABLE OF CONTENTS
Balanced Current-Output DAC...................................................... 1
Reduction of Even Harmonics.........................................................6
DC Analysis....................................................................................... 3
Conclusion..........................................................................................6
AC Analysis ....................................................................................... 3
Appendix A ........................................................................................7
Impedance Matching........................................................................ 5
Appendix B.........................................................................................8
Example Calculations....................................................................... 6
Rev. 0 | Page 2 of 12
AN-912
DC ANALYSIS
With an understanding of the operation of a balanced currentoutput DAC, a dc analysis of a center-tapped transformer
coupled to the DAC output can now be examined. Figure 1
simplifies to the dc equivalent circuit shown in Figure 2, by
replacing the DAC with two current sources (one for the
normal output and the other for the complementary output).
The magnitude of the current delivered by each source is code
dependent, as indicated by Equation 1. The current sources
have arrows that indicate the direction of current flow. It is
assumed that the DAC outputs are of the current source variety.
The arrows would be reversed for the current sink variety. In
Figure 2, the center-tap connection is redrawn to clearly show
that the DAC output circuits are independent current loops
(note that the transformer polarity dots have been reoriented to
maintain functional equality with Figure 1).
IA
αIMAX
Combining this result with Equation 1, the magnetic flux in the
transformer core can be expressed as Φ = kNIMAX(2α − 1). The
importance of this result is that for the special case of α = ½
(that is, the middle DAC code), the magnetic flux in the core is
0, whereas any other DAC code results in a build-up of static
magnetic flux in the core. The significance of this fact is made
apparent in the AC Analysis section that follows.
AC ANALYSIS
RO
IB
RO
CENTER-TAP
06737-002
(1-α)IMAX
dots indicates that the magnetic flux produced by IA is opposed
to the magnetic flux produced by IB. The orientation of the dots
implies that Φ = kN(IA − IB), instead of kN(IA + IB) as previously
stated, for the configuration shown in Figure 1 and Figure 2.
Therefore, for the particular center-tapped configuration shown
in Figure 1 and Figure 2, the net magnetic flux is proportional
to the difference between IA and IB rather than the sum. This is a
consequence of the physical connection between the complementary current source and the lower primary winding.
Figure 2. DC Equivalent Model
Typically, the resistance of the transformer windings is much
less than the resistance of the DAC termination resistors (RO).
In most applications, this low winding resistance implies that
the vast majority of the dc current associated with IA (or IB)
flows through the transformer windings instead of through the
termination resistors. Thus, the dc power rating for the DAC
termination resistors is practically nil.
In general, consider a simple magnetic circuit consisting of a
single winding with an arbitrary number of turns of wire (N)
wrapped on the winding and a static current (I) flowing
through the wire. The current flowing in the wire creates a
magnetic flux (Φ) concentrated within the winding core that is
proportional to the product of the number of wire turns and the
current flowing through the wire (that is, Φ = kNI, where k is
the constant of proportionality). In the case of the tapped
transformer, which has two primary windings, the magnetic
flux in the core is the sum of the contributions of each winding
(that is, Φ = k(NAIA + NBIB). Given that this analysis is based on
a center-tapped transformer, the number of turns in each
primary winding is the same (that is, NA = NB), which means
that the magnetic flux can be expressed as Φ = kN(IA + IB).
Thus, the total magnetic flux in the transformer core is
proportional to the sum of the primary currents.
For ac analysis, consider the specific case in which a DAC
generates a sinusoidal output signal. In such a case, a time series
of digital codes drives the DAC and produces an output current
that varies in sinusoidal fashion. The range of the digital input
codes is split such that the lower half of the codes (0 to ½ full
scale) generates the lower half of the sinusoid and the upper half
of the codes (½ full scale to full scale) generates the upper half
of the sinusoid. The average value of the DAC-generated
sinusoid, therefore, is ½ full scale. The peak amplitude of the
sinusoid is also ½ full scale, since this is the amount by which
the signal can swing from the midpoint to either zero or full scale.
The sinusoidal current waveform at the normal output of the
DAC can be expressed as
I A = 12 I MAX + 12 I MAX sin(θ)
(2)
where θ represents the instantaneous phase of the sinusoid.
Similarly, because of the relationship between IA and IB, the
current waveform at the complementary output of the DAC can
be expressed as
I B = 12 I MAX − 12 I MAX sin(θ)
(3)
Inspection of Equation 2 and Equation 3 indicates that IA and
IB are both centered at ½IMAX. That is, ½IMAX is the dc term of
the sinusoidal waveform. Furthermore, when the magnitude of
sine function increases, then IA increases, whereas IB decreases
equally. Notice, too, that the sum of the normal and complementary output currents is always IMAX (that is, IA + IB = IMAX, as
mentioned previously in the Balanced Current-Output DAC
section). Such is the nature of a balanced output signal.
Note that Equation 2 and Equation 3 ignore the quantized
nature of the sinusoidal DAC output current.
It is important to note in Figure 2 that IA flows into the primary
winding that is marked with a dot, while IB flows into the primary winding that is opposite the dot. The placement of the
Rev. 0 | Page 3 of 12
AN-912
I A = 12 I MAX + 12 I MAX cos(θ)
and
I B = 12 I MAX − 12 I MAX cos(θ)
Given the special case of θ = 0, the sine case yields IA = ½IMAX
and IB = ½IMAX, whereas the cosine case yields IA = IMAX and IB = 0.
In the DC Analysis section, it was shown that Φ = kN(IA − IB).
Thus, if the digital generator stalls at θ = 0, the transformer core
carries no magnetic flux for the sine case and kNIMAX for the
cosine case. The implication is that if the digital generator is
stalled at θ = 0, and is then switched from sine to cosine (or vice
versa), the magnetic flux in the core jumps from 0 to kNIMAX (or
vice versa). This results in a voltage spike across all of the transformer windings due to the nearly infinite rate of change of flux
in the transformer core.
The previous paragraphs explore the transient behavior of the
transformer when switching between sine and cosine waveforms. To explore the steady state behavior of the transformer in
the context of ac analysis, it is necessary to understand how a
transformer behaves under the stimulus of a sinusoidal signal.
This is covered in the appendices. Appendix A describes the
basic ac behavior of an ideal transformer, while Appendix B
builds on Appendix A to show the ac operation of a tapped
transformer.
Figure 3 is the ac equivalent model assuming an ideal, centertapped transformer. Also given in Equation 4 to Equation 7 is a
list of the pertinent equations that relate the various circuit
parameters. Both the diagram and the equations are a result of
the concepts described in Appendix B.
1:N
VNORM
1/2
N
(IMAX√2)/4
ZCOMP
VCOMP
ZS
VS
RL
1/2
The actual voltage that appears across each primary winding is
referred to as vA for the upper primary winding and vB for the
lower. The value of vA and vB can be derived from vS and the
associated turns ratio between the secondary and each primary
winding. Thus, vA and vB can be expressed as
⎛ 1 ⎞ ⎛ 2 I MAX
v A = v B = v S ⎜ 2 ⎟ = ⎜⎜
4
⎝N ⎠ ⎝
RO RL
2RL + 4 RO N 2
Z S = 2 N 2 RO
VA
⎛ 2 I MAX
v S = ⎜⎜
2
⎝
⎞
⎞⎛
RO RL
⎟
⎟⎜
⎟⎜ R + 2R N 2 ⎟
O
⎠⎝ L
⎠
⎞⎛ NRO R L
⎟⎜
⎟⎜ R + 2R N 2
O
⎠⎝ L
⎞
⎟
⎟
⎠
RO
RL
DAC
VB
RO
Figure 4. Balanced Current-Output DAC with Isolation Switch
If the switch is open (see Figure 5), there is effectively no change
from an impedance point of view, because the current source
internal to the DAC exhibits a very high impedance (ideally
infinite). Thus, the complementary output drives the same load
regardless of the state of the switch. The voltage at the complementary output (vCOMP) is that given by Equation 6. However, the
upper and lower primary windings are mutually coupled with a
turns ratio of 1:1. This causes a voltage of the same magnitude
to also appear at the upper primary winding (as shown in
Figure 5).
VCOMP
RO
RL
(4)
DAC
RO
(5)
⎛ 2 I MAX
vNORM = vCOMP = ⎜⎜
8
⎝
⎞
⎟
⎟
⎠
Note that vA and vB are twice as large as vNORM and vCOMP. What
is the reason for the discrepancy? The answer lies in the fact
that the two primary windings interact with each other.
Consider Figure 4 where a switch has been added to provide a
means to disconnect the normal DAC output pin from the
circuit.
Figure 3. AC Equivalent Model Using a Center-Tapped Transformer
Z NORM = ZCOMP =
⎞⎛
RO R L
⎟⎜
⎟⎜ R + 2R N 2
O
⎠⎝ L
Figure 5. Isolated DAC output
(6)
(7)
VCOMP
06737-005
ZNORM
06737-003
(IMAX√2)/4
Equation 4 through Equation 7 can be used to predict the
impedance seen by each DAC output (ZNORM and ZCOMP), the
voltage generated by each of the DAC current sources (vNORM
and vCOMP), the impedance presented at the transformer
secondary (ZS), and the voltage across the secondary (vS). It is
important for the reader to understand that vNORM and vCOMP
do not represent the voltage that appears across each primary
winding, but rather the voltage produced by each current source
(IA or IB) as it flows through the reflected impedance of the
associated primary winding (ZNORM or ZCOMP).
06737-004
This result has interesting consequences when the DAC is driven
by a digital sinusoidal generator like a direct digital synthesizer
(DDS), for instance, that can be programmed to deliver either a
sine signal or a cosine signal. When a sine signal is generated,
Equation 2 and Equation 3 apply directly. When a cosine signal
is generated, Equation 2 and Equation 3 become, respectively,
The importance of this fact cannot be overstressed. With the
normal output of the DAC completely disconnected, there is
still a voltage present (vCOMP) across the upper DAC termination
resistor (RO). Its presence is due to the mutual coupling of the
Rev. 0 | Page 4 of 12
AN-912
Also, Equation 8 can be rewritten for the special case of ZS = RL as
two primary windings and the voltage produced by the
complementary DAC output driving its associated load
(ZCOMP).
vA
With the switch closed as in Figure 4, the current generated by
the normal DAC output produces a voltage across its equivalent
load (ZNORM). The magnitude of this voltage is vNORM and is the
same as vCOMP. By superposition, this signal sums with the signal
produced by the complementary output, that is vA = vNORM + vCOMP.
But vNORM = vCOMP, so vA = 2vNORM, which is why vA is twice as
large as vNORM. Likewise, vB is twice as large as vCOMP.
PL =
(8)
PL
In many applications, it is desirable that ZS be equal to RL. This
is especially true when a reconstruction filter is inserted between the secondary and the load, as shown in Figure 6.
RO
1:N
ZS
RL
FILTER
RL
06737-006
DAC
RO
Generally, the filter is designed to accommodate equal source
and load impedances, which implies that ZS = RL. Equation 32
in Appendix B shows that ZS = 2N2RO. If it is desired that ZS = RL,
then RL can be substituted for ZS. Solving for RO yields
(9)
Z S = RL
= ZCOMP
=
Z S = RL
RL
8N 2
ZS = RL
v NORM
vS
Z S = RL
=
Z S = RL
2 I MAX RL
8N
=
Z S = RL
2 I MAX RL
32 N 2
2
(15)
=
Z S = RL
RL ⎛ I MAX ⎞
⎜
⎟
2 ⎝ 4N ⎠
2
(16)
2
(17)
In fact, PL is at a minimum when RO = 0 (that is, PL = 0, as
expected) and at a maximum when RO = ∞. For the latter,
PL MAX
(10)
(11)
= vCOMP
v S 2 RL ⎛ I MAX RO N ⎞
⎜
⎟
=
RL
2 ⎜⎝ RL + 2RO N 2 ⎟⎠
⎛
⎞
⎜
⎟
RL ⎜ I MAX N ⎟
PL =
2 ⎜ RL + 2N 2 ⎟
⎜R
⎟
⎝ O
⎠
With this choice of RO, Equation 4 through Equation 7 can be
simplified as follows:
Z NORM
(14)
Equation 16 defines the power delivered to the load for the
impedance matched case and Equation 15 for the general case.
It is interesting to compare Equation 15 and Equation 16 and
to consider the effect on PL in Equation 15 when RO is varied.
Recall that there is only one particular value of RO that provides
impedance matching; namely, RO = RL/(2N2). If, however,
impedance matching is not a requirement, then there is the
freedom to choose any arbitrary value for RO. By rewriting
Equation 15 in a slightly different form (as shown in Equation 17),
the effect on PL due to varying RO becomes apparent. In this
form, it is evident that a decrease in RO results in a decrease in
the squared term, and vice versa.
Figure 6. DAC with Reconstruction Filter
R
RO = L 2
2N
Z S = RL
In the case of impedance matching (that is, ZS = RL, which
implies RO, as given in Equation 9), the PL equation reduces to
IMPEDANCE MATCHING
VSUPPLY
2 I MAX RL
16 N 2
=
Furthermore, the power delivered to the load is a function of
vS, so Equation 7 can be used to express the power delivered to
the load as
This yields another pair of equations useful for analyzing the
center-tapped circuit:
v A = 2vNORM and v B = 2vCOMP
Z S = RL
= vB
2
⎧ ⎛
⎞ ⎫
⎟ ⎪
⎪ ⎜
2
I
N ⎟ ⎪ RL ⎛ I MAX ⎞
⎪R
= lim ⎨ L ⎜ MAX
=
⎜
⎟
⎬
RO → ∞ 2 ⎜ RL
⎪ ⎜
+ 2N 2 ⎟⎟ ⎪ 2 ⎝ 2N ⎠
R
⎪⎩ ⎝ O
⎠ ⎪⎭
(18)
Comparison of Equation 16 and Equation 18 indicates that four
times more power (+6 dB) is delivered to the load when RO = ∞
as compared to the impedance matched case.
(12)
(13)
Rev. 0 | Page 5 of 12
AN-912
EXAMPLE CALCULATIONS
REDUCTION OF EVEN HARMONICS
Here, the previous formulas are used to determine the
component values for two different transformer applications.
In Example 1, a transformer with a 1:1 turns ratio (N = 1) is
employed, while in Example 2, a transformer with a 1:2
turns ratio (N = 2) is employed. Both examples use IMAX = 20 mA,
RL = 50 Ω, and assume that impedance matching is employed
(that is, ZS = RL).
The degree of dc balance between the normal and complementary DAC current sources has a direct impact on the magnitude
of even harmonics in the DAC output spectrum. Using a
transformer as the output coupling mechanism for the DAC
effectively masks any dc imbalance in the DAC outputs. This
results in a significant reduction of even harmonics when the
spectrum is observed at the output of the transformer.
Example 1: IMAX = 20 mA, RL = 50 Ω, and N = 1
Transformer coupling can also mask the effects of a dynamic
imbalance between the DAC outputs. However, the ability of
the transformer to mask an ac imbalance depends on the
inherent longitudinal balance of the transformer. Transformers
with a high degree of longitudinal balance require that the
manufacturer pay special attention to the physical design of the
transformer. The most common factor limiting the longitudinal
balance of a transformer is parasitic capacitive coupling within
the windings. The transformer must be designed in such a way
that the parasitic capacitance is evenly distributed relative to the
external contacts of the windings.
From Equation 9,
RO = 25 Ω (the value of the two DAC termination
resistors)
From Equation 10,
ZNORM = ZCOMP = 6.25 Ω (the load driven by each DAC
output pin)
From Equation 14,
vA = vB = 88.39 mV rms (the voltage across each primary)
From Equation 13,
CONCLUSION
vS = 176.8 mV rms (the voltage across the secondary)
A center-tapped transformer can be used to advantage as the
coupling element for a balanced current-output DAC. Formulas
have been presented to determine the load (ZNORM and ZCOMP)
and voltage (vA and vB) at each DAC output pin, the voltage (vS)
across the load (RL), and the power (PL) delivered to the load
(RL). Furthermore, the relationship between the DAC termination resistors (RO), the load resistance (RL), and the transformer
turns ratio (N) was defined.
From Equation 16,
PL = 0.625 mW (the power in the load)
Example 2: IMAX = 20 mA, RL = 50 Ω, and N = 2
From Equation 9,
RO = 6.25 Ω (the value of the two DAC termination
resistors)
From Equation 10,
ZNORM = ZCOMP = 1.5625 Ω (the load driven by each DAC
output pin)
From Equation 14,
vA = vB = 22.10 mV rms (the voltage across each primary)
From Equation 13,
vS = 88.39 mV rms (the voltage across the secondary)
From Equation 16,
PL = 0.156 mW (the power in the load)
Rev. 0 | Page 6 of 12
AN-912
SINUSOIDAL
VOLTAGE
SOURCE
Transformer Basics
VSRC
06737-007
Figure 7. Basic Transformer
In Figure 8, a transformer is shown with its primary winding
driven by a voltage source of VSRC (volts rms) that has a series
resistance of RSRC (ohms). The secondary is terminated with
an arbitrary resistance of RTERM. When a transformer is driven
by an ac signal, the ratio of the voltage across the secondary
winding to the voltage across the primary winding is the same
as the turns ratio; that is, vS/vP = N. This gives rise to the
concept of voltage transformation. That is, the primary voltage
is transformed to a secondary voltage (or vice versa) based on
the turns ratio.
SECONDARY
1:N
RTERM
VSRC
PRIMARY
SECONDARY
IMPEDANCE
TRANSFORMED
TO THE
PRIMARY
IMPEDANCE
TRANSFORMED
TO THE
SECONDARY
1:N
1:N
ZS = (N2)RSRC
ZS
ZP
VSRC
RTERM
06737-009
VSRC
RTERM
Note that when selecting a transformer, the reader should
be aware that some manufacturers specify the impedance
transformation ratio rather than the turns ratio. The turns
ratio (N) is found by taking the square root of the impedance
transformation ratio.
RSRC
RSRC
VS
Furthermore, conservation of energy requires that the power
exhibited in the primary winding must equal the power appearing in the load of the secondary winding (RTERM). Alternatively,
the power exhibited in the secondary winding must equal the
power appearing in the load of the primary winding (RSRC). This
knowledge makes it possible to treat RTERM as though it appears
in the primary circuit as ZP (that is, the secondary impedance
is transformed to an equivalent primary impedance). On the
other hand, RSRC can be treated as though it appears in the
secondary circuit as ZS, (that is, the primary impedance is
transformed to an equivalent secondary impedance). This
property of impedance transformation is related to the turns
ratio and is expressed as: ZP = (1/N2)RTERM and ZS = (N2)RSRC.
The concept of impedance transformation is demonstrated by
the equivalent circuits shown in Figure 9.
NS
SECONDARY
ZS
ZP
Figure 8. Transformer Driven by an AC Source
A:B
PRIMARY
VP
PRIMARY
N = NS/NP = B/A
NP
1:N
RSRC
The basic behavior of a transformer is governed by its turns
ratio (or winding ratio). The turns ratio, N, is the ratio of the
number of turns of wire in the secondary windings (NS) to the
number of turns of wire in the primary windings (NP); that is,
N = NS/NP. The turns ratio is often denoted on schematics by
two colon-separated numbers (for example, 3:5). An example
appears in Figure 7 in which an arbitrary turns ratio of A:B is
shown. This leads to the relationship N = NS/NP = B/A.
06737-008
APPENDIX A
ZP = (1/N2)RTERM
Figure 9. Transformed Impedance
Rev. 0 | Page 7 of 12
AN-912
Since the DAC is assumed to be of the balanced, current-output
variety, Figure 10 can be redrawn as shown in Figure 11. The
DAC is replaced by current sources IA and IB. These represent
sinusoidal current sources with a peak-to-peak amplitude of
IMAX (the maximum output current of the DAC). Also, the
center-tap connection is drawn differently than in Figure 10 to
clearly show that the signal sources exist as separate current loops.
APPENDIX B
A Balanced Current-Output DAC Driving a Tapped
Transformer
Figure 10 shows the general case for a DAC coupled to a tapped
transformer. For completeness, the two primary windings are
not assumed to be symmetrical (that is, the primary tap does
not split the primary winding into two equal halves) and the
two DAC termination resistors are not assumed to be equal
(RA and RB).
ZA consists of two parallel impedances. The first is the transformed impedance of the secondary resistor (RL), which is
referred to as Z1. The second is the transformed impedance
of RB, which is referred to as Z2. Note that the DAC output
impedance can be ignored under the assumption that the
internal current sources exhibit an infinite impedance (ideally),
which means that the internal impedance of the DAC output
does not impact the parallel combination of Z1 and Z2.
Therefore, ZA can be expressed as (see Appendix A regarding
impedance transformation):
The primary winding is split into two separate circuits as a
result of the ground connection at the primary tap. The upper
winding is referred to as Primary A and the lower winding as
Primary B. The windings are labeled A, B, and C to indicate the
number of turns associated with each winding (Primary A,
Primary B, and secondary, respectively). The overall turns ratio
of the transformer is 1:N, where N = C/(A + B). The tapped
transformer exhibits the following three independent accoupled networks (the associated turns ratios appear in
parentheses):
{( ) R }|| {( ) R }
A 2
C
A 2
B
L
1:N
VA
A
ZA
TAP
DAC
VB
IB
ZB
ZS
C
VS
RL
B
RB
06737-010
RA
N = C/(A+B)
Figure 10. A Balanced Current-Output DAC Coupled to a Tapped Transformer
1:N
A
IA
RA
VA
ZA
C
ZS
VS
RL
B
IB
RB
VB
(19)
Note that the symbol || in this and all subsequent equations can
be read as "in parallel with.”
Also shown in Figure 10 are the transformed impedances at
Primary A (ZA), Primary B (ZB), and the secondary (ZS) along
with the voltages that appear across each winding (vA, vB, and vS).
IA
B
⎧ R A2 ⎫ ⎧ R A 2 ⎫
RL RB
= ⎨ L 2 ⎬ || ⎨ B 2 ⎬ =
2
B 2
C
B
(
)
R
+ RB ( CA )
⎩
⎭ ⎩
⎭
L A
Primary A and the secondary (A:C)
Primary B and the secondary (B:C)
Primary A and Primary B (A:B)
ZB
TAP
Figure 11. DAC Shown as a Dual Current Source
Rev. 0 | Page 8 of 12
06737-011
•
•
•
Z A = Z1 || Z2 =
AN-912
Furthermore, in the context of ac analysis, the sine function can
be replaced by its rms equivalent, √2/2, which yields
Likewise, the value of ZB consists of two parallel impedances.
The first is the transformed impedance of the secondary resistor
(RL), which is referred to as Z3. The second is the transformed
impedance of RA, which is referred to as Z4. Therefore, ZB can be
expressed as:
B 2
A RA
⎧⎪ R B 2 ⎫⎪ ⎧⎪ R B 2 ⎫⎪
RL RA
= ⎨ L 2 ⎬ || ⎨ A 2 ⎬ =
2
2
⎪⎩ C ⎪⎭ ⎪⎩ A ⎪⎭ RL ( AB ) + RA ( CB )
{( ) R }|| {( ) R }
A
C 2
B
B
⎧ R C2 ⎫ ⎧ R C2 ⎫
R A RB
= ⎨ A 2 ⎬ || ⎨ B 2 ⎬ =
2
B 2
A
B
R
(
)
+ RB ( CA )
⎭
⎩
⎭ ⎩
A C
(21)
Referring to Figure 11, the sinusoidal current delivered by the
normal and complementary DAC outputs is given by IA = ½IMAX
+ ½IMAXsin(θ) and IB = ½IMAX − ½IMAXsin(θ), respectively.
However, for ac analysis, the dc term in both equations can be
eliminated, yielding IA = ½IMAX sin(θ) and IB = −½IMAX sin(θ).
IA = IB =
2
4
I MAX
A
RA VA
ZA
C
ZS
VS
RL
B
–(IMAX√2)/4
RB VB
ZB
TAP
Figure 12. Modified AC Equivalent Model
1:N
A
(IMAX√2)/4
RA VA
ZA
C
ZS
VS
RL
B
(IMAX√2)/4
RB VB
(22)
(23)
1:N
(IMAX√2)/4
I MAX
With the modification in Figure 13 it is no longer necessary to
treat IA and IB separately because it is now apparent that
06737-012
C 2
A
2
4
The upper current source drives the side of Primary A marked
with a dot, while the lower current source drives the side of
Primary B that is not marked with a dot. However, the dot
associated with Primary B can be moved to the other side of the
Primary B winding without impacting the functionality as long
as the connection to the signal source is reversed. Reversal of
the signal source is equivalent to simply changing its sign. This
is shown in Figure 13, where the sign of the lower current
source is changed and the dot is moved to the other side of the
Primary B winding.
(20)
Similarly, the value of ZS consists of two parallel impedances.
The first is the transformed impedance of RA, which is referred
to as Z5. The second is the transformed impedance of RB, which
is referred to as Z6. Therefore, ZS can be expressed as:
ZS = Z5 || Z6 =
I MAX and I B = −
Note that IB = −IA. From these results, Figure 11 can be redrawn
by replacing IA with its rms equivalent and by replacing IB with
–IA (see Figure 12).
{( ) }|| {( ) }
B 2
C RL
2
4
ZB
TAP
Figure 13. AC Equivalent Model with the Primary B Circuit Modified
Rev. 0 | Page 9 of 12
06737-013
Z B = Z3 || Z 4 =
IA =
AN-912
Notice that the load as seen by the current source driving
Primary A is the parallel combination of RA and ZA. Likewise,
the load as seen by the current source driving Primary B is the
parallel combination of RB and ZB. These loads are referred to as
ZNORM and ZCOMP, since they are the loads as seen by the normal
and complementary outputs of the DAC, respectively, and are
given as
⎫⎪
⎧⎪
RL RB
Z NORM = RA || Z A = {RA } || ⎨
C 2⎬
B 2
⎪⎩ RL ( A ) + RB ( A ) ⎪⎭
=
R A R B RL
2
2
RA RL ( AB ) + RA RB ( CA ) + RB RL
⎛ 2 I MAX
A
v A = v S ⎛⎜ ⎞⎟ = ⎜⎜
4
⎝C ⎠ ⎝
RA RB RL
=
2
A 2
RB RL ( B ) + RA RB ( CB ) + RA RL
B ⎛ 2 I MAX
v B = v S ⎛⎜ ⎞⎟ = ⎜⎜
4
⎝C⎠ ⎝
This result makes it possible to express the voltage generated by
each DAC output, which is the product of the DAC output
current and the load as seen by the DAC output. The normal
and complementary DAC output voltages are expressed as
vNORM = I A ZNORM
The equations derived thus far will work for any generalized
case of a tapped transformer. However, in practice, there are
two simplifications that significantly reduce the complexity of
these equations. The first is to use a center-tapped transformer
(that is, A = B). The second is to use equal DAC termination
resistors (that is, RA = RB) of value RO. Additionally, recall that
N = C/(B + A). With the stipulation that A = B, it is possible to
show that C/B = C/A = 2N. Applying these concepts to the
previous equations yields the following simplified equations:
(26)
⎞
⎞⎛
RA RB RL
⎟
⎟⎜
⎟⎜ R R ( A )2 + R R ( C )2 + R R ⎟
⎠⎝ B L B
A B B
A L ⎠
(27)
where IA and IB have been replaced based on Equation 23.
The secondary voltage (vS) is made up of the contribution of
each of the primary voltages multiplied by the associated turns
ratio. Specifically,
⎛ 2 I MAX
C
C
vS = v NORM ⎛⎜ ⎞⎟ + vCOMP ⎛⎜ ⎞⎟ = ⎜⎜
A
B
4
⎝ ⎠ ⎝
⎝ ⎠
Z NORM = ZCOMP =
RO RL
2RL + 4 RO N 2
Z S = 2N 2 RO
vCOMP = I B ZCOMP
⎛ 2 I MAX
= ⎜⎜
4
⎝
⎞
⎟×
⎟
⎠
⎞
⎛
RA RB RL ( AB )
RA RB RL
⎟
⎜
2
⎜ R R ( B ) + R R ( C )2 + R R + R R ( A )2 + R R ( C )2 + R R ⎟
B L
B L B
A B A
A B B
A L ⎠
⎝ A L A
(30)
(25)
⎞
⎞⎛
RA RB RL
⎟
⎟⎜
⎟⎜ R R ( B )2 + R R ( C )2 + R R ⎟
⎠⎝ A L A
B L ⎠
A B A
⎞
⎟×
⎟
⎠
⎞
⎛
RA RB RL ( AB )
RA RB RL
⎟
⎜
+
2
2
2
2
C
C
B
A
⎜R R ( ) +R R ( ) +R R
RB RL ( B ) + RA RB ( B ) + RA RL ⎟⎠
B L
A B A
⎝ A L A
(29)
(24)
⎧⎪
⎫⎪
RL RA
ZCOMP = RB || Z B = {RB } || ⎨
2⎬
2
⎪⎩ RL ( AB ) + RA ( CB ) ⎪⎭
⎛ 2 I MAX
= ⎜⎜
4
⎝
The two primary voltages (vA and vB) can be derived from vS
based on the respective turns ratios, as follows:
⎞
⎟×
⎟
⎠
⎞
⎛
RA RB RL ( CA )
RA RB RL ( CB )
⎟
⎜
+
2
2
2
C 2
A
⎜ R R ( B ) + R R (C ) + R R
RB RL ( B ) + RA RB ( B ) + RA RL ⎟⎠
B L
A B A
⎝ A L A
(28)
Rev. 0 | Page 10 of 12
(32)
⎛ 2 I MAX
v NORM = vCOMP = ⎜⎜
8
⎝
⎛ 2 I MAX
vS = ⎜⎜
2
⎝
(31)
⎞
⎞⎛
RO RL
⎟
⎟⎜
⎟⎜ R + 2R N 2 ⎟
O
⎠⎝ L
⎠
⎞⎛ NRO RL ⎞
⎟
⎟⎜
⎟⎜ R + 2R N 2 ⎟
O
⎠⎝ L
⎠
(33)
(34)
AN-912
NOTES
Rev. 0 | Page 11 of 12
AN-912
NOTES
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
AN06737-0-5/07(0)
Rev. 0 | Page 12 of 12
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