NTLJD3115P D

NTLJD3115P
Power MOSFET
−20 V, −4.1 A, mCoolt Dual P−Channel,
2x2 mm WDFN Package
Features
• WDFN Package Provides Exposed Drain Pad for Excellent Thermal
•
•
•
•
•
•
Conduction
2x2 mm Footprint Same as SC−88
Lowest RDS(on) Solution in 2x2 mm Package
1.8 V RDS(on) Rating for Operation at Low Voltage Gate Drive Logic
Level
Low Profile (< 0.8 mm) for Easy Fit in Thin Environments
Bidirectional Current Flow with Common Source Configuration
This is a Pb−Free Device
Applications
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V(BR)DSS
RDS(on) MAX
ID MAX (Note 1)
100 mW @ −4.5 V
−20 V
−4.1 A
135 mW @ −2.5 V
200 mW @ −1.8 V
S1
S2
G1
G2
D1
P−CHANNEL MOSFET
D2
P−CHANNEL MOSFET
• Optimized for Battery and Load Management Applications in
•
•
Portable Equipment
Li−Ion Battery Charging and Protection Circuits
High Side Load Switch
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
−20
V
Gate−to−Source Voltage
VGS
±8.0
V
ID
−3.3
A
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Steady
State
TA = 25°C
t≤5s
TA = 25°C
Steady
State
TA = 85°C
Power Dissipation
(Note 2)
Pulsed Drain Current
PIN CONNECTIONS
2.3
ID
TA = 85°C
TA = 25°C
A
−2.3
−1.6
PD
0.71
W
−20
A
TJ, TSTG
−55 to
150
°C
Source Current (Body Diode) (Note 2)
IS
−1.9
A
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
tp = 10 ms
Operating Junction and Storage Temperature
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface Mounted on FR4 Board using the minimum recommended pad size
of 30 mm2, 2 oz Cu.
© Semiconductor Components Industries, LLC, 2013
1
6
2 JDMG 5
G
3
4
JD = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
W
1.5
IDM
August, 2013 − Rev. 6
Pin 1
TA = 25°C
TA = 25°C
Steady
State
WDFN6
CASE 506AN
−4.1
PD
MARKING
DIAGRAM
D1
−2.4
t≤5s
Continuous Drain
Current (Note 2)
D2
1
D1
S1
1
G1
2
6
D1
5
G2
4
S2
D2
D2
3
(Top View)
ORDERING INFORMATION
Device
Package
Shipping†
NTLJD3115PT1G
WDFN6
(Pb−Free)
3000/Tape & Reel
NTLJD3115PTAG
WDFN6
(Pb−Free)
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NTLJD3115P/D
NTLJD3115P
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Max
Junction−to−Ambient – Steady State (Note 3)
RqJA
83
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
177
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
54
Unit
SINGLE OPERATION (SELF−HEATED)
°C/W
DUAL OPERATION (EQUALLY HEATED)
Junction−to−Ambient – Steady State (Note 3)
RqJA
58
Junction−to−Ambient – Steady State Min Pad (Note 4)
RqJA
133
Junction−to−Ambient – t ≤ 5 s (Note 3)
RqJA
40
3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu).
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2
°C/W
NTLJD3115P
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Test Conditions
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = −250 mA
−20
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
ID = −250 mA, Ref to 25°C
Parameter
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
VDS = −16 V, VGS = 0 V
V
9.95
mV/°C
TJ = 25°C
−1.0
TJ = 85°C
−10
IGSS
VDS = 0 V, VGS = ±8.0 V
VGS(TH)
VGS = VDS, ID = −250 mA
mA
±100
nA
−1.0
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Gate Threshold
Temperature Coefficient
Drain−to−Source On−Resistance
VGS(TH)/TJ
RDS(on)
Forward Transconductance
gFS
−0.4
−0.7
2.44
mV/°C
VGS = −4.5, ID = −2.0 A
75
100
mW
VGS = −2.5, ID = −2.0 A
101
135
VGS = −1.8, ID = −1.6 A
150
200
VDS = −5.0 V, ID = −2.0 A
6.0
S
531
pF
CHARGES, CAPACITANCES AND GATE RESISTANCE
CISS
Input Capacitance
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
VGS = 0 V, f = 1.0 MHz,
VDS = −10 V
91
56
QG(TOT)
5.5
Threshold Gate Charge
QG(TH)
0.7
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
1.4
RG
8.8
W
td(ON)
6.0
ns
tr
11
Gate Resistance
VGS = −4.5 V, VDS = −10 V,
ID = −2.0 A
6.2
nC
Total Gate Charge
1.0
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(OFF)
VGS = −4.5 V, VDD = −5.0 V,
ID = −1.0 A, RG = 6.0 W
21
tf
8.0
td(ON)
6.0
tr
td(OFF)
VGS = −4.5 V, VDD = −10 V,
ID = −2.0 A, RG = 2.0 W
tf
ns
12
19
6.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Recovery Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Time
VSD
VGS = 0 V, IS = −1.0 A
TJ = 25°C
−0.75
TJ = 125°C
−0.64
tRR
ta
tb
−1.0
V
12.6
VGS = 0 V, dISD/dt = 100 A/ms,
IS = −1.0 A
QRR
7.0
5.6
5.0
5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
ns
nC
NTLJD3115P
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
5
TJ = 25°C
VDS ≥ 10 V
−ID, DRAIN CURRENT (AMPS)
4.5
−1.8 V
4
3.5
−1.7 V
3
2.5
−1.6 V
2
−1.5 V
1.5
1
−1.4 V
0.5
−1.3 V
−1.2 V
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS = −1.9 V to −6 V
0
0.5
1
2
1.5
3
2.5
3.5
4
4
3
2
TJ = 25°C
1
TJ = 125°C
0
4.5
0
TJ = 100°C
0.08
TJ = 25°C
0.07
0.06
TJ = −55°C
0.05
0.04
1.0
3
1.5
2.0
2.5
0.15
TJ = 25°C
VGS = −2.5 V
0.1
VGS = −4.5 V
0.05
0
1
2
−ID, DRAIN CURRENT (AMPS)
10000
−IDSS, LEAKAGE (nA)
1.2
1.0
0.8
0
25
50
75
100
5
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
ID = −2.2 A
VGS = −4.5 V
−25
4
3
−ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance versus Drain Current
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
2.5
Figure 2. Transfer Characteristics
0.09
0.6
−50
2
Figure 1. On−Region Characteristics
VGS = −4.5 V
1.4
1.5
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
0.1
1.6
TJ = −55°C
1
0.5
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
−ID, DRAIN CURRENT (AMPS)
5
125
150
VGS = 0 V
TJ = 150°C
1000
TJ = 100°C
100
10
2
4
6
8
10
12
14
16
18
TJ, JUNCTION TEMPERATURE (°C)
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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4
20
NTLJD3115P
VDS = 0 V VGS = 0 V
C, CAPACITANCE (pF)
1000
TJ = 25°C
Ciss
800
600
400
Crss
Coss
200
0
5
VGS
0
VDS
5
10
15
20
5
4
0
−Is, SOURCE CURRENT (AMPS)
100
tf
tr
td(off)
td(on)
10
RG, GATE RESISTANCE (OHMS)
100
10
QGD
0
1
2
3
4
5
QG, TOTAL GATE CHARGE (nC)
0
2.5
2
1.5
1
0.5
TJ = 150°C
TJ = 25°C
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
TC = 25°C
TJ = 150°C
SINGLE PULSE
10 ms
100 ms
10 ms
*See Note 2 on Page 1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
6
VGS = 0 V
1 ms
0.01
4
Figure 8. Gate−To−Source and Drain−To−Source
Voltage versus Total Charge
1
0.1
8
ID = −2.2 A
TJ = 25°C
0
0
100
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
−ID, DRAIN CURRENT (AMPS)
t, TIME (ns)
QGS
3
VDD = −15 V
ID = −2.2 A
VGS = −4.5 V
12
VGS
1
1000
1
VDS
2
Figure 7. Capacitance Variation
1
16
3
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
10
20
QT
-V DS , DRAIN-TO-SOURCE VOLTAGE (VOLTS)
1200
-V GS, GATE-TO-SOURCE VOLTAGE (VOLTS)
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
dc
1
10
100
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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5
NTLJD3115P
EFFECTIVE TRANSIENT THERMAL RESISTANCE
TYPICAL PERFORMANCE CURVES (TJ = 25°C unless otherwise noted)
1000
100
D = 0.5
0.2
0.1
10
*See Note 2 on Page 1
P(pk)
0.05
0.02
1 0.01
t1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
0.1
0.000001
0.00001
0.0001
0.001
0.01
t, TIME (s)
0.1
Figure 12. Thermal Response
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6
1
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TA = P(pk) RqJA(t)
10
100
1000
NTLJD3115P
PACKAGE DIMENSIONS
WDFN6, 2x2
CASE 506AN
ISSUE G
D
ÍÍÍ
ÍÍÍ
ÍÍÍ
PIN ONE
REFERENCE
0.10 C
0.10 C
EXPOSED Cu
PLATING
MOLD CMPD
DETAIL B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
OPTIONAL
CONSTRUCTIONS
E
TOP VIEW
DIM
A
A1
A3
b
D
D2
E
E2
e
F
K
L
L1
L
L
L1
DETAIL A
A3
DETAIL B
0.10 C
ÉÉ
ÇÇÇ
ÇÇ ÇÇÇ
ÉÉÉ
ÉÉ
A
B
OPTIONAL
CONSTRUCTIONS
A
0.08 C
NOTE 4
A1
C
SIDE VIEW
0.10 C A
SOLDERMASK DEFINED
MOUNTING FOOTPRINT
1.80
B
1
3
F
1.10
6X
DETAIL A
2X
0.82
D2
D2
L
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.25
0.35
2.00 BSC
0.57
0.77
2.00 BSC
0.90
1.10
0.65 BSC
0.95 BSC
0.25 REF
0.20
0.30
--0.10
E2
0.10 C A
0.45
2.30
B
PACKAGE
OUTLINE
6
K
4
6X
b
0.10 C A
e
0.05 C
B
1
NOTE 3
6X
BOTTOM VIEW
0.39
0.65
PITCH
DIMENSIONS: MILLIMETERS
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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NTLJD3115P/D