30 V, 69 A, Single N Channel, u8FL Power MOSFET

NTTFS4824N
Power MOSFET
30 V, 69 A, Single N−Channel, m8FL
Features
•
•
•
•
Small Footprint (3.3 x 3.3 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
RDS(on) MAX
5.0 mW @ 10 V
30 V
Applications
N−Channel MOSFET
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
D (5−8)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
14.9
A
Continuous Drain
Current RqJA (Note 1)
TA = 25°C
Power Dissipation RqJA
(Note 1)
TA = 25°C
PD
2.2
W
Continuous Drain
Current RqJA ≤ 10 s
(Note 1)
TA = 25°C
ID
20.6
A
Continuous Drain
Current RqJA (Note 2)
TA = 85°C
TA = 85°C
Steady
State
14.9
PD
4.1
W
TC = 25°C
ID
8.3
A
TC = 85°C
6.0
TC = 25°C
PD
0.66
W
Continuous Drain
Current RqJC (Note 1)
TC = 25°C
ID
69
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
46.3
W
TA = 25°C, tp = 10 ms
IDM
207
A
TJ,
Tstg
−55 to
+150
°C
IS
46.3
A
Drain to Source dV/dt
dV/dt
6.0
V/ns
Single Pulse Drain−to−Source Avalanche Energy
(TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 38 Apk, L = 0.1 mH, RG = 25 W)
EAS
72
mJ
TL
260
°C
TC = 85°C
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
S (1,2,3)
MARKING DIAGRAM
1
TA = 25°C
Operating Junction and Storage Temperature
G (4)
10.8
Power Dissipation
RqJA (Note 2)
Pulsed Drain Current
69 A
7.5 mW @ 4.5 V
• DC−DC Converters
• Low Side Switching
Power Dissipation
RqJA ≤ 10 s (Note 1)
ID MAX
50
WDFN8
(m8FL)
CASE 511AB
FLAT LEAD
4824
A
Y
WW
G
1
S
S
S
G
4824
AYWWG
G
D
D
D
D
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NTTFS4824NTAG
Package
Shipping†
WDFN8 1500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2013
September, 2013 − Rev. 5
1
Publication Order Number:
NTTFS4824N/D
NTTFS4824N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Unit
Junction−to−Case (Drain)
Parameter
RqJC
2.7
°C/W
Junction−to−Ambient – Steady State (Note 3)
RqJA
57.7
Junction−to−Ambient – Steady State (Note 4)
RqJA
187.8
Junction−to−Ambient – (t ≤ 10 s) (Note 3)
RqJA
30.3
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
25
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25°C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
gFS
1.9
6
VGS = 10 V to 11.5 V
VGS = 4.5 V
Forward Transconductance
1.5
ID = 20 A
3.7
ID = 10 A
3.6
ID = 20 A
5.8
ID = 10 A
5.7
VDS = 1.5 V, ID = 20 A
mV/°C
5.0
mW
7.5
53
S
CHARGES AND CAPACITANCES
Input Capacitance
Ciss
1750
2363
Output Capacitance
Coss
350
473
Reverse Transfer Capacitance
Crss
170
255
Total Gate Charge
QG(TOT)
12.6
18
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
QG(TOT)
VGS = 0 V, f = 1.0 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V, ID = 20 A
pF
nC
1.7
4.7
4.8
VGS = 11.5 V, VDS = 15 V, ID = 20 A
29
nC
13
ns
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(on)
tr
td(off)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
38
18
5.5
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NTTFS4824N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(on)
tr
td(off)
ns
9.0
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
21
25
4.4
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.8
TJ = 125°C
0.7
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 20 A
1.0
ns
22
VGS = 0 V,
dIS/dt = 100 A/ms,
IS = 20 A
V
10.5
11.5
QRR
10
nC
Source Inductance
LS
0.38
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.054
1.3
0.9
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
2.0
W
NTTFS4824N
125
TJ = 25°C
7.0 V
10 V
VDS ≥ 10 V
VGS = 4.5 V
5.0 V
ID, DRAIN CURRENT (A)
130
120
110
100
90
80
70
60
50
40
30
20
10
0
4.2 V
4.0 V
3.8 V
3.6 V
3.4 V
0
0.5
1
1.5
2
3
2.5
3.5
4
4.5
75
50
TJ = 100°C
25
TJ = −55°C
2
3
4
5
6
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
0.009
0.008
0.007
0.006
0.005
0.004
0.003
5
4
7
6
9
8
VGS, GATE−TO−SOURCE VOLTAGE (V)
10
0.010
0.008
0.007
0.006
VGS = 4.5 V
0.005
0.004
VGS = 10 V
0.003
0.002
20
30
40
50
60
70
80
90
100 110 120
ID, DRAIN CURRENT (A)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10000
VGS = 0 V
IDSS, LEAKAGE (nA)
1.8
1.7 ID = 20 A
1.6 VGS = 10 V
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
−50 −25
0
TJ = 25°C
0.009
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = 25°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID = 20 A
TJ = 25°C
3
0
5
0.010
0.002
100
3.2 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
TYPICAL CHARACTERISTICS
25
50
75
100
125
150
TJ = 150°C
1000
TJ = 125°C
100
10
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
30
NTTFS4824N
TYPICAL CHARACTERISTICS
VGS, GATE−TO−SOURCE VOLTAGE (V)
3000
C, CAPACITANCE (pF)
VGS = 0 V
TJ = 25°C
Ciss
2000
1000
Coss
0
Crss
0
5
10
15
20
25
30
10
8
6
VGS
Qgs
4
Qgd
2
0
ID = 20 A
TJ = 25°C
0
4
8
12
16
20
24
28
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
IS, SOURCE CURRENT (A)
td(off)
tf
100
tr
td(on)
10
1
1
10
15
10
5
0.5
0.6
0.7
0.8
0.9
1
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
10 ms
100 ms
10
1 ms
0.01
20
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
0.1
VGS = 0 V
TJ = 25°C
25
0
0.4
100
1000
1
32
30
VDD = 15 V
ID = 15 A
VGS = 10 V
t, TIME (ns)
QT
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
1000
ID, DRAIN CURRENT (A)
12
VGS = 20 V
Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
0.1
1
10 ms
dc
10
100
75
ID = 38 A
50
25
0
25
50
75
100
125
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
150
NTTFS4824N
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE D
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
0.20 C
D
A
D1
B
2X
0.20 C
8 7 6 5
4X
E1 E
q
c
1 2 3 4
A1
TOP VIEW
0.10 C
A
e
SIDE VIEW
0.10
8X b
C A B
0.05
C
4X
L
C
6X
0.10 C
DETAIL A
SEATING
PLANE
DETAIL A
8X
e/2
1
0.42
4
INCHES
NOM
0.030
−−−
0.012
0.008
0.130 BSC
0.116
0.120
0.078
0.083
0.130 BSC
0.116
0.120
0.058
0.063
0.009
0.012
0.026 BSC
0.012
0.016
0.026
0.032
0.012
0.017
0.002
0.005
0.055
0.059
0_
−−−
MIN
0.028
0.000
0.009
0.006
MAX
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.016
0.020
0.037
0.022
0.008
0.063
12 _
0.65
PITCH
PACKAGE
OUTLINE
4X
0.66
M
E3
8
G
MILLIMETERS
MIN
NOM
MAX
0.70
0.75
0.80
0.00
−−−
0.05
0.23
0.30
0.40
0.15
0.20
0.25
3.30 BSC
2.95
3.05
3.15
1.98
2.11
2.24
3.30 BSC
2.95
3.05
3.15
1.47
1.60
1.73
0.23
0.30
0.40
0.65 BSC
0.30
0.41
0.51
0.65
0.80
0.95
0.30
0.43
0.56
0.06
0.13
0.20
1.40
1.50
1.60
0_
−−−
12 _
SOLDERING FOOTPRINT*
K
E2
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
E3
e
G
K
L
L1
M
q
5
D2
BOTTOM VIEW
3.60
L1
0.75
2.30
0.57
0.47
2.37
3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NTTFS4824N/D
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