30V, Single N-Channel, u8FL

NTTFS4840N
Power MOSFET
30 V, 26 A, Single N−Channel, m8FL
Features
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
•
•
•
•
•
DC−DC Converters
Point of Load
Power Load Switch
Notebook Battery Management
Motor Control
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V(BR)DSS
RDS(on) MAX
24 mW @ 10 V
30 V
N−Channel MOSFET
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
D (5−8)
Symbol
Value
Unit
VDSS
30
V
VGS
±20
V
ID
7.3
A
Continuous Drain
Current RqJA (Note 1)
TA = 25°C
Power Dissipation RqJA
(Note 1)
TA = 25°C
PD
2.2
W
Continuous Drain
Current RqJA ≤ 10 s
(Note 1)
TA = 25°C
ID
10.3
A
Continuous Drain
Current RqJA (Note 2)
TA = 85°C
S (1,2,3)
7.5
TA = 25°C
PD
4.4
W
TA = 25°C
ID
4.6
A
TA = 85°C
3.3
TA = 25°C
PD
0.84
W
Continuous Drain
Current RqJC (Note 1)
TC = 25°C
ID
26
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
27.8
W
TA = 25°C, tp = 10 ms
IDM
77
A
TC = 85°C
Operating Junction and Storage Temperature
Source Current (Body Diode)
19
TJ,
Tstg
−55 to
+150
°C
IS
23
A
dV/dt
6.0
V/ns
Single Pulse Drain−to−Source Avalanche Energy
(TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 18.3 Apk, L = 0.1 mH, RG = 25 W)
EAS
16.7
mJ
TL
1
S
S
S
G
WDFN8
(m8FL)
CASE 511AB
4840
A
Y
WW
G
4840
AYWWG
G
D
D
D
D
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
Drain to Source dV/dt
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
MARKING DIAGRAM
1
Power Dissipation
RqJA (Note 2)
Pulsed Drain Current
G (4)
5.3
TA = 85°C
Steady
State
26 A
36 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Power Dissipation
RqJA ≤ 10 s (Note 1)
ID MAX
260
°C
ORDERING INFORMATION
Device
Package
Shipping†
NTTFS4840NTAG
WDFN8 1500/Tape & Reel
(Pb−Free)
NTTFS4840NTWG
WDFN8 5000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
© Semiconductor Components Industries, LLC, 2011
January, 2011 − Rev. 1
1
Publication Order Number:
NTTFS4840N/D
NTTFS4840N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Unit
Junction−to−Case (Drain)
Parameter
RqJC
4.5
°C/W
Junction−to−Ambient – Steady State (Note 3)
RqJA
57.5
Junction−to−Ambient – Steady State (Note 4)
RqJA
149.2
Junction−to−Ambient – (t ≤ 10 s) (Note 3)
RqJA
28.7
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
IDSS
Gate−to−Source Leakage Current
V
17
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25°C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
3.0
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
5.6
VGS = 10 V to 11.5 V
VGS = 4.5 V
Forward Transconductance
gFS
1.5
ID = 20 A
15
ID = 10 A
15
ID = 20 A
28
ID = 10 A
25
VDS = 1.5 V, ID = 20 A
mV/°C
24
mW
36
22
S
580
pF
CHARGES AND CAPACITANCES
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
80
Total Gate Charge
QG(TOT)
5.5
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
QG(TOT)
VGS = 0 V, f = 1.0 MHz, VDS = 15 V
VGS = 4.5 V, VDS = 15 V, ID = 20 A
140
nC
0.75
2.2
2.8
VGS = 10 V, VDS = 15 V, ID = 20 A
10.8
nC
10.5
ns
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(on)
tr
td(off)
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
38.2
11.5
2.6
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NTTFS4840N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(on)
tr
td(off)
ns
6.3
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
19.4
15.8
1.7
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.96
TJ = 125°C
0.87
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 20 A
1.2
ns
12.5
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 20 A
V
7.7
4.8
QRR
4.4
nC
Source Inductance
LS
0.66
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.20
1.5
2.0
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
3.0
W
NTTFS4840N
TYPICAL CHARACTERISTICS
10 V
7.5 V
TJ = 25°C
ID, DRAIN CURRENT (A)
40
50
VGS = 5 V
4.8 V
VDS ≥ 10 V
ID, DRAIN CURRENT (A)
50
4.6 V
4.4 V
30
4.2 V
4.0 V
20
3.8 V
3.6 V
10
0
1
0.5
2
1.5
3
2.5
10
0.020
4
5
6
7
8
9
VGS (V)
2.5
2.0
3.0
3.5
10
4.0
0.045
TJ = 25°C
0.04
0.035
VGS = 4.5 V
0.03
0.025
0.02
VGS = 10 V
0.015
0.01
10
15
20
25
30
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. VGS
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.7
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = −55°C
1.5
Figure 2. Transfer Characteristics
0.030
1.5
TJ = 125°C
Figure 1. On−Region Characteristics
0.040
1.6
TJ = 25°C
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID = 20 A
TJ = 25°C
3
20
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.050
0.010
30
0
1.0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
3.4 V
3.3 V
3.0 V
3.5
4
40
10,000
VGS = 0 V
ID = 20 A
VGS = 10 V
IDSS, LEAKAGE (nA)
1.4
TJ = 150°C
1000
1.3
1.2
1.1
1.0
0.9
TJ = 125°C
100
0.8
0.7
0.6
−50
−25
0
25
50
75
100
125
150
10
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
30
NTTFS4840N
TYPICAL CHARACTERISTICS
VGS = 0 V
TJ = 25°C
900
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
1000
800
700
Ciss
600
500
400
300
Coss
200
100
0
Crss
0
5
10
15
20
30
25
7
6
5
Qgd
Qgs
4
3
TJ = 25°C
VDD = 15 V
VGS = 10 V
ID = 20 A
2
1
0
0
1
2
3
4
5
6
7
8
9
10
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
11
20
IS, SOURCE CURRENT (A)
td(off)
tr
tf
td(on)
10
1
10
5
VGS = 0 V
TJ = 25°C
0.5
0.6
0.7
0.8
0.9
1.0
1.1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
10 ms
10
100 ms
1 ms
1
0.01
0.1
10
RG, GATE RESISTANCE (W)
100
0.1
15
0
0.4
100
10 ms
VGS = 20 V
Single Pulse
TC = 25°C
dc
RDS(on) Limit
Thermal Limit
Package Limit
1
10
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
t, TIME (ns)
8
Qg, TOTAL GATE CHARGE (nC)
VDD = 15 V
ID = 15 A
VGS = 10 V
ID, DRAIN CURRENT (A)
QT
9
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
1
10
100
18
ID = 18.3 A
16
14
12
10
8
6
4
2
0
25
50
75
100
125
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
150
NTTFS4840N
TYPICAL CHARACTERISTICS
100
Duty Cycle = 50%
R(t) (°C/W)
10
20%
10%
5%
1
2%
1%
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.1
0.01
PULSE TIME (sec)
Figure 13. Thermal Response
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6
1
10
100
1000
NTTFS4840N
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB−01
ISSUE B
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
0.20 C
D
A
D1
B
2X
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
0.20 C
8 7 6 5
4X
E1 E
1 2 3 4
q
c
TOP VIEW
A1
0.10 C
A
0.10 C
e
SIDE VIEW
0.10
8X b
C A B
0.05
c
L
C
6X
DETAIL A
SEATING
PLANE
DETAIL A
INCHES
NOM
0.030
−−−
0.012
0.008
0.130 BSC
0.116
0.120
0.078
0.083
0.130 BSC
0.116
0.120
0.058
0.063
0.026 BSC
0.012
0.016
0.025
−−−
0.012
0.017
0.002
0.005
0.055
0.059
0_
−−−
MIN
0.028
0.000
0.009
0.006
MAX
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.020
−−−
0.022
0.008
0.063
12 _
SOLDERING FOOTPRINT*
8X
0.42
e/2
1
4
E2
0.65
PITCH
PACKAGE
OUTLINE
K
4X
0.66
M
5
8
G
MILLIMETERS
MIN
NOM
MAX
0.70
0.75
0.80
0.00
−−−
0.05
0.23
0.30
0.40
0.15
0.20
0.25
3.30 BSC
2.95
3.05
3.15
1.98
2.11
2.24
3.30 BSC
2.95
3.05
3.15
1.47
1.60
1.73
0.65 BSC
0.30
0.41
0.51
0.64
−−−
−−−
0.30
0.43
0.56
0.06
0.13
0.20
1.40
1.50
1.60
0_
−−−
12 _
D2
L1
3.60
BOTTOM VIEW
0.75
2.30
0.57
0.47
2.37
3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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NTTFS4840N/D
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