NID6002N Preferred Device Self−Protected FET with Temperature and Current Limit 65 V, 6.5 A, Single N−Channel, DPAK http://onsemi.com HDPlus™ devices are an advanced series of power MOSFETs which utilize ON Semiconductor’s latest MOSFET technology process to achieve the lowest possible on−resistance per silicon area while incorporating smart features. Integrated thermal and current limits work together to provide short circuit protection. The devices feature an integrated Drain−to−Gate Clamp that enables them to withstand high energy in the avalanche mode. The Clamp also provides additional safety margin against unexpected voltage transients. Electrostatic Discharge (ESD) protection is provided by an integrated Gate−to−Source Clamp. Features • • • • • • • VDSS (Clamped) RDS(on) TYP ID TYP (Limited) 65 V 210 mW 6.5 A Drain Gate Input RG Overvoltage Protection MPWR ESD Protection Short Circuit Protection/Current Limit Thermal Shutdown with Automatic Restart IDSS Specified at Elevated Temperature Avalanche Energy Specified Slew Rate Control for Low Noise Switching Overvoltage Clamped Protection Pb−Free Package is Available Current Limit Temperature Limit Current Sense Source MARKING DIAGRAM 1 DPAK CASE 369C STYLE 2 D6002N Y WW G 2 3 = Device Code = Year = Work Week = Pb−Free Device YYW D6 002NG 1 = Gate 2 = Drain 3 = Source ORDERING INFORMATION Device NID6002NT4 NID6002NT4G Package Shipping † DPAK 2500/Tape & Reel DPAK (Pb−Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Preferred devices are recommended choices for future use and best overall value. © Semiconductor Components Industries, LLC, 2007 April, 2007 − Rev. 5 1 Publication Order Number: NID6002N/D NID6002N MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage Internally Clamped VDSS 70 Vdc Gate−to−Source Voltage VGS "14 Vdc Drain Current Continuous ID Total Power Dissipation @ TA = 25°C (Note 1) @ TA = 25°C (Note 2) Internally Limited PD W 1.3 2.5 °C/W Thermal Resistance Junction−to−Case Junction−to−Ambient (Note 1) Junction−to−Ambient (Note 2) Single Pulse Drain−to−Source Avalanche Energy (VDD = 50 Vdc, VGS = 5.0 Vdc, IL = 1.3 Apk, L = 160 mH, RG = 25 W) (Note 3) Operating and Storage Temperature Range (Note 4) RqJC RqJA RqJA 3.0 95 50 EAS 143 mJ TJ, Tstg −55 to 150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface mounted onto minimum pad size (100 sq/mm) FR4 PCB, 1 oz cu. 2. Mounted onto 1″ square pad size (700 sq/mm) FR4 PCB, 1 oz cu. 3. Not subject to production test. 4. Normal pre−fault operating range. See thermal limit range conditions. http://onsemi.com 2 NID6002N MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit 60 65 70 V − 27 100 − 45 200 1.0 − 1.85 5.0 2.4 − − 185 210 − − 210 445 240 520 − 0.9 1.1 OFF CHARACTERISTICS Drain−to−Source Clamped Breakdown Voltage (VGS = 0 V, ID = 2 mA) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 52 V, VGS = 0 V) IDSS Gate Input Current (VGS = 5.0 V, VDS = 0 V) IGSS mA mA ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = 150 mA) Threshold Temperature Coefficient VGS(th) Static Drain−to−Source On−Resistance (Note 5) (VGS = 10 V, ID = 2.0 A, TJ @ 25°C) RDS(on) Static Drain−to−Source On−Resistance (Note 5) (VGS = 5.0 V, ID = 2.0 A, TJ @ 25°C) (VGS = 5.0 V, ID = 2.0 A, TJ @ 150°C) RDS(on) Source−Drain Forward On Voltage (IS = 7.0 A, VGS = 0 V) V −mV/°C mW mW VSD V SWITCHING CHARACTERISTICS (Note 8) Turn−on Delay Time RL = 6.6 W, Vin = 0 to 10 V, VDD = 13.8 V, ID = 2.0 A, 10% Vin to 10% ID td(on) − 96 − ns Turn−on Rise Time RL = 6.6 W, Vin = 0 to 10 V, VDD = 13.8 V, ID = 2.0 A, 10% ID to 90% ID trise − 250 − ns Turn−off Delay Time RL = 6.6 W, Vin = 0 to 10 V, VDD = 13.8 V, ID = 2.0 A, 90% Vin to 90% ID td(off) − 840 − ns Turn−off Fall Time RL = 6.6 W, Vin = 0 to 10 V, VDD = 13.8 V, ID = 2.0 A, 90% ID to 10% ID tfall − 660 − ns Slew Rate ON RL = 6.6 W, Vin = 0 to 10 V, VDD = 13.8 V, ID = 2.0 A, 70% to 50% VDD dVDS/dTon − 73 − V/ms Slew Rate OFF RL = 6.6 W, Vin = 0 to 10 V, VDD = 13.8 V, ID = 2.0 A, 50% to 70% VDD dVDS/dToff − 35 − V/ms VDS = 10 V, VGS = 5.0 V, TJ = 25°C (Note 7) VDS = 10 V, VGS = 5.0 V, TJ = 130°C (Notes 7, 8) VDS = 10 V, VGS = 10 V, TJ = 25°C (Notes 7, 8) ILIM 4.0 4.0 − 6.4 5.5 7.9 11 11 − A VGS = 5.0 V (Note 8) TLIM(off) 150 180 200 °C SELF PROTECTION CHARACTERISTICS (Note 6) Current Limit Temperature Limit (Turn−off) VGS = 5.0 V DTLIM(on) − 10 − °C VGS = 10 V (Note 8) TLIM(off) 150 180 200 °C Thermal Hysteresis VGS = 10 V DTLIM(on) − 20 − °C Input Current during Thermal Fault VDS = 0 V, VGS = 5.0 V, TJ = TJ > T(fault) (Note 8) VDS = 0 V, VGS = 10 V, TJ = TJ > T(fault) (Note 8) Ig(fault) 5.5 12 5.2 11 − mA 8000 400 − − − − Thermal Hysteresis Temperature Limit (Turn−off) ESD ELECTRICAL CHARACTERISTICS Electro−Static Discharge Capability Human Body Model (HBM) Machine Model (MM) 5. 6. 7. 8. ESD Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. Fault conditions are viewed as beyond the normal operating range of the part. Current limit measured at 380 ms after gate pulse. Not subject to production test. http://onsemi.com 3 V NID6002N TYPICAL PERFORMANCE CURVES 12 6 TJ = −55°C ID, DRAIN CURRENT (AMPS) ID, DRAIN CURRENT (AMPS) TJ = 25°C 10 V 10 8 5V 4.5 V 6 4.0 V 4 3.5 V 2 TJ = 25°C 5 4 TJ = 100°C 3 2 TJ = 100°C 1 TJ = 25°C 3.0 V 0 10 5.0 20 15 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 0 1 2 3 4 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 0.27 ID = 2 A TJ = 25°C 0.26 0.25 0.24 0.23 0.22 0.21 0.20 0.19 0.18 3.0 5.0 7.0 9.0 11 TJ = 25°C 0.22 VGS = 5 V 0.21 0.20 0.19 VGS = 10 V 0.18 2.0 2.5 3.0 3.5 4.0 ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.6 5 0.23 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 1E−03 1.8 ID = 3.75 A VGS = 10 V 8E−04 1.4 IDSS, LEAKAGE (A) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) (W) TJ = −55°C 0 1.2 1 0.8 6E−04 TJ = 100°C 4E−04 2E−04 0.6 0.4 −55 0E+00 −35 −15 5 25 45 65 85 105 0 10 20 30 40 50 60 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 4 70 NID6002N TYPICAL PERFORMANCE CURVES 12000 7 VGS = 0 V TJ = 25°C VDS = 0 V TJ = 160°C 10000 6 8000 IGSS (mA) 5 4 3 6000 4000 2 2000 1 0 0.0 0 0.2 0.4 0.6 0.8 VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) 1.0 6 7 6.5 7.5 8 VGS = 10 V VGS = 5 V 6 Current Limit 4 Temperature Limit 2 0 0E+0 1E−3 2E−3 8.5 9 9.5 10 10.5 Figure 8. Input Current vs. Gate Voltage 12 10 8 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 7. Diode Forward Voltage vs. Current DRAIN CURRENT (AMPS) IS, SOURCE CURRENT (AMPS) 8 3E−3 4E−3 5E−3 6E−3 7E−3 TIME (seconds) Figure 9. Short Circuit Response* *(Actual thermal cycling response in short circuit dependent on device power level, thermal mounting, and ambient temperature conditions) http://onsemi.com 5 NID6002N PACKAGE DIMENSIONS DPAK CASE 369C−01 ISSUE O SEATING PLANE −T− V E R 4 Z A S 1 2 DIM A B C D E F G H J K L R S U V Z C B 3 U K F J L H D G M MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 4.58 BSC 0.87 1.01 0.46 0.58 2.60 2.89 2.29 BSC 4.57 5.45 0.63 1.01 0.51 −−− 0.89 1.27 3.93 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 2 PL 0.13 (0.005) INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.090 BSC 0.180 0.215 0.025 0.040 0.020 −−− 0.035 0.050 0.155 −−− T SOLDERING FOOTPRINT* 6.20 0.244 3.0 0.118 2.58 0.101 5.80 0.228 1.6 0.063 6.172 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. HDPlus is a trademark of Semiconductor Components Industries, LLC (SCILLC) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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