LT3686 - 37V/1.2A Step-Down Regulator in 3mm × 3mm DFN

LT3686
37V/1.2A Step-Down
Regulator in 3mm × 3mm DFN
Features
Description
Wide Input Range:
Operation from 3.6V to 37V
Overvoltage Lockout Protects Circuit Through
55V Transients
n Low Minimum On-Time:
Converts 16VIN to 3.3VOUT at 2MHz
n 1.2A Output Current
n Adjustable Frequency: 300kHz to 2.5MHz
n Constant Switching Frequency at Light Loads
n Tracking and Soft-Start
n Precision UVLO
n Short-Circuit Robust
nI in Shutdown <1µA
Q
n Internally Compensated
n 10-Lead 3mm × 3mm DFN Package
The LT®3686 is a current mode PWM step-down DC/DC
converter with an internal 1.2A power switch, packaged in
10-lead 3mm × 3mm DFN. The wide input range of 3.6V to
37V makes the LT3686 suitable for regulating power from
a wide variety of sources, including 24V industrial supplies
and automotive batteries. Its high maximum frequency allows the use of tiny inductors and capacitors, resulting in
a very small solution. Operating frequency above the AM
band avoids interfering with radio reception, making the
LT3686 particularly suitable for automotive applications.
n
Cycle-by-cycle current limit and DA current sense provide
protection against fault conditions. Soft-start and frequency
foldback eliminate input current surge during start-up. An
optional internal regulated active load at the output via
the BD pin keeps the LT3686 at full switching frequency
at light loads, resulting in low, predictable output ripple
above the audio and AM bands. Internal compensation and
an internal boost diode reduce external component count.
Applications
n
n
n
n
Automotive Systems
Battery-Powered Equipment
Wall Transformer Regulation
Distributed Supply Regulation
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
Typical Application
3.3V Step-Down Converter
12VIN Efficiency (2.1MHz)
90
BD
VIN
2.2µF
BOOST
EN/UVLO
80
0.22µF
LT3686
MBRM140
SS
10nF
6.8µH
SW
MODE
DA
RT
GND
22µF
10k
15.4k
VOUT
3.3V
1.2A
31.6k
FB
3.3VOUT
70
EFFICIENCY (%)
VIN
6V TO 37V
5VOUT
60
50
40
30
20
10
3686 TA01a
(VIN 6V TO 16V AT 2.1MHz)
0
0
200
800 1000
600
400
LOAD CURRENT (mA)
1200
3686 TA01b
3686fc
1
LT3686
Absolute Maximum Ratings
Pin Configuration
(Note 1)
Input Voltage (VIN).....................................................55V
BOOST Voltage..........................................................55V
BOOST Pin Above SW Pin..........................................25V
FB Voltage....................................................................6V
EN/UVLO Voltage.......................................................55V
BD Voltage.................................................................25V
RT Voltage...................................................................6V
SS Voltage................................................................2.5V
MODE Voltage..............................................................6V
Operating Junction Temperature Range (Note 2)
LT3686E............................................. –40°C to 125°C
LT3686I.............................................. –40°C to 125°C
LT3686H............................................. –40°C to 150°C
Storage Temperature Range................... –65°C to 150°C
TOP VIEW
VIN
1
BD
2
FB
3
SS
4
RT
5
10 SW
11
GND
9 DA
8 BOOST
7 MODE
6 EN/UVLO
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
JA = 43°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3686EDD#PBF
LT3686EDD#TRPBF
LDYC
10-Lead Plastic DFN
–40°C to 125°C
LT3686IDD#PBF
LT3686IDD#TRPBF
LDYC
10-Lead Plastic DFN
–40°C to 125°C
LT3686HDD#PBF
LT3686HDD#TRPBF
LDYC
10-Lead Plastic DFN
–40°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3686fc
2
LT3686
Electrical
Characteristics
The
l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, VEN/UVLO ≥ 1.32V.
PARAMETER
CONDITIONS
Quiescent Current at Shutdown
Quiescent Current
MIN
TYP
MAX
VEN/UVLO < 0.4V
VEN/UVLO = 1V
0.1
10
1
15
µA
µA
Not Switching, MODE ≤ 0.4V
Not Switching, MODE ≥ 0.8V
1.1
1.2
1.3
1.4
mA
mA
3.4
3.6
V
Internal Undervoltage Lockout
Overvoltage Lockout
l
37
38
39
V
l
0.790
0.785
0.8
0.8
0.810
0.815
V
V
Feedback Voltage
Feedback Voltage Line Regulation
0.0012
VIN = 3.6V ↔ 37V
FB Pin Bias Current
Switching Frequency
20
0.3
1.9
IDA < 1.2A
RT = 15.4kΩ
RT = 100kΩ
RT = 267kΩ
Minimum On Time
Minimum Off Time
Switch VCESAT
ISW = 1.2A
Switch Current Limit
(Note 3)
100
nA
2.5
2.3
MHz
MHz
kHz
kHz
100
110
ns
150
200
2.1
670
300
1.9
1.85
2.6
2.65
A
A
600
30
µA
µA
SW = 10V (Note 4)
SW = 0V (Note 5)
400
20
BOOST Pin Current
ISW = 1.2A
20
ISW = 1.2A
MODE > 0.8V, BD < 5.2V
ns
mV
2.3
2.3
Switch Active Current
Minimum Boost Voltage Above Switch
%/V
680
l
Max BD Pin Active Load Current
UNITS
2.2
mA
2.4
V
30
40
mA
BD Pin Active Load Disable Threshold
l
5.2
6.5
V
DA Pin Current to Stop OSC
l
1.2
1.7
A
MODE High
l
0.8
MODE Low
l
V
MODE Pin Bias Current
SS Threshold
V
0.1
µA
0.9
SS Source Current
VSS = 1V
EN/UVLO Bias Current
VEN/UVLO = 10V
VEN/UVLO = 0V
EN/UVLO Threshold to Turn Off
1.3
l
EN/UVLO Hysteresis Current
Boost Diode Forward Drop
0.4
IBD to IBOOST = 200mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3686E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3686I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3686H is guaranteed over the full –40°C to
150°C operating junction temperature range.
2
V
2.7
µA
40
1
µA
µA
1.22
1.27
1.32
V
1.8
2.4
3
µA
0.85
V
Note 3: Current limit guaranteed by design and/or correlation to static test.
Slope compensation reduces current limit at higher duty cycle.
Note 4: Current flows into pin.
Note 5: Current flows out of pin.
Note 6: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may impair device
reliability. See High Temperature Consideration section. Also see Operation
section.
3686fc
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LT3686
Typical Performance Characteristics
5VOUT Efficiency
3.3VOUT Efficiency (2MHz)
90
30
VIN = 12V
VOUT = 3.3V
L = 6.8µH
f = 2MHz
20
10
0
200
800 1000
600
400
LOAD CURRENT (mA)
50
MODE < 0.4V
40
30
10
0
200
800 1000
600
400
LOAD CURRENT (mA)
3686 G01
10
20
VIN (V)
30
40
3686 G03
Internal Undervoltage Lockout
(UVLO)
4.0
700
3.5
600
MINIMUM
VSW (mV)
IOUT (A)
0
800
1.0
0.8
500
400
3.0
300
0.6
0.4
10
20
VIN (V)
30
100
40
0
500
0
1000
1500
ISW (mA)
2000
Overvoltage Lockout (OVLO)
2.0
–50
0
50
100
TEMPERATURE (°C)
150
3686 G06
VFB vs Temperature
40
820
39
810
38
VFB (mV)
VIN (V)
2500
3686 G05
3686 G04
37
800
790
36
35
–50
2.5
150°C
125°C
25°C
–50°C
200
VOUT = 5V
L = 10µH
f = 2MHz
0.2
0
0
1200
900
TYPICAL
1.2
VOUT = 3.3V
L = 6.8µH
f = 2MHz
0.2
Switch Voltage Drop
1.6
1.4
0.8
3686 G02
5VOUT Maximum Load Current
1.8
1.0
0.4
VIN (V)
2.0
1.2
0.6
VIN = 12V
VOUT = 5V
L = 10µH
f = 2MHz
20
0
MINIMUM
1.4
60
1200
TYPICAL
1.6
IOUT (A)
EFFICIENCY (%)
MODE < 0.4V
40
1.8
MODE > 0.8V
70
60
50
2.0
80
MODE > 0.8V
70
EFFICIENCY (%)
3.3VOUT Maximum Load Current
90
80
0
TA = 25°C unless otherwise noted.
0
50
100
TEMPERATURE (°C)
150
3686 G07
780
–50
0
50
100
TEMPERATURE (°C)
150
3686 G08
3686fc
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LT3686
Typical Performance Characteristics
Switching Frequency vs
Temperature
Switching Frequency vs RT
2.20
FREQUENCY (MHz)
250
RT (kΩ)
200
150
100
50
0
Soft-Start/Track vs Frequency
(1MHz)
1200
RT = 15.4k
2.15
1000
2.10
800
FREQUENCY (kHz)
300
TA = 25°C unless otherwise noted.
2.05
2.00
0.5
1
1.5
FREQUENCY (MHz)
2
1.90
–50
2.5
0
50
100
TEMPERATURE (°C)
3686 G09
Soft-Start/Track vs VFB
700
35
600
30
300
25
20
15
100
5
0
0
400
200
600
800
SS (mV)
1000
1200
0
10
20
30
EN/UVLO (V)
40
3.0
1.0
–50
50
SWITCH PEAK
MODE > 0.8
30
25
MODE < 0.4
15
VIN (V)
VIN (V)
150
5VOUT Maximum VIN for Full
Frequency (2MHz)
MODE > 0.8
2.0
1.0
50
100
TEMPERATURE (°C)
35
20
DA VALLEY
0
3686 G14
25
2.5
CURRENT LIMIT (A)
1.5
3.3VOUT Maximum VIN for Full
Frequency (2MHz)
Current Limit vs Duty Cycle
2500
2.0
3686 G13
3686 G12
1.5
2000
2.5
10
200
0
1000
1500
SS (mV)
3.0
CURRENT LIMIT (A)
40
400
500
Switch Current Limit vs
Temperature
45
500
0
3686 G11
EN/UVLO Pin Current
800
10
MODE < 0.4
20
15
10
5
0.5
0
0
150
3686 G10
EN/UVLO (µA)
FB (mV)
900
400
200
1.95
0
600
0
25
50
75
DUTY CYCLE (%)
100
3686 G15
0
VOUT = 3.3V
L = 6.8µH
f = 2MHz
0
500
1000
LOAD CURRENT (mA)
1500
3686 G16
VOUT = 5V
L = 10µH
f = 2MHz
5
0
0
1000
500
LOAD CURRENT (mA)
3686 G17
3686fc
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LT3686
Typical Performance Characteristics
3.3VOUT Typical Minimum Input
Voltage
8
6
7
MODE < 0.4
4
MODE < 0.4
VSW
2V/DIV
MODE > 0.8
5
MODE > 0.8
3
IL
200mA/DIV
4
200ns/DIV
3
2
2
VOUT = 3.3V
L = 15µH
f = 1MHz
1
0
Continuous Mode Waveform
6
VIN (V)
VIN (V)
5VOUT Typical Minimum Input
Voltage
7
5
TA = 25°C unless otherwise noted.
1
10
100
1000
VOUT = 5V
L = 22µH
f = 1MHz
1
0
1
ILOAD (mA)
10
100
VIN = 10V
VOUT = 3.3V
L = 6.8µH
f = 2MHz
COUT = 22µF
ILOAD = 200mA
1000
ILOAD (mA)
3686 G18
3686 G19
Light Load Discontinuous Mode
Waveform
Fixed Frequency No Load
Waveform
VSW
2V/DIV
VSW
2V/DIV
IL
200mA/DIV
IL
200mA/DIV
200ns/DIV
VIN = 10V
VOUT = 3.3V
L = 6.8µH
f = 2MHz
COUT = 22µF
ILOAD = 25mA
3686 G20
3686 G21
200ns/DIV
3686 G22
VIN = 10V
VOUT = 3.3V
L = 6.8µH
f = 2MHz
COUT = 22µF
ILOAD = 0mA
3686fc
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LT3686
Pin Functions
VIN (Pin 1): The VIN pin supplies current to the LT3686’s
internal regulator and to the internal power switch. This
pin must be locally bypassed.
BD (Pin 2): The BD pin is used to provide current to
the internal Boost Schottky diode. Tie this pin to output
whenever possible. When the MODE pin is greater than
0.8V, the LT3686 will prevent pulse-skipping at light
loads by regulating an active load on the BD pin; see the
Applications Information section Fixed Frequency at Light
Load.
FB (Pin 3): The LT3686 regulates its feedback pin to 0.8V.
Connect the feedback resistor divider tap to this pin. Set
the output voltage according to VOUT = 0.8(1 + R1/R2). A
good value for R2 is 10k.
SS (Pin 4): Provides Soft-Start and Tracking. An internal
2µA current source tied to a 2.5V reference supplies current to this pin to charge an external capacitor to create a
voltage ramp at the pin. Feedback voltage and switching
frequency both track SS voltage. Feedback voltage stops
tracking at 0.8V. SS is reset under all fault conditions. Float
the pin if soft-start feature is not being used.
RT (Pin 5): The RT pin is used to program the oscillator
frequency. Select the value of RT resistor according to
Table 1 in the applications section of the data sheet.
EN/UVLO (Pin 6): The EN/UVLO pin is used to start up the
LT3686. Pull the pin below 0.4V to shutdown the LT3686. The
1.27V threshold can function as an accurate undervoltage
lockout (UVLO), preventing the regulator from operating
until the input voltage has reached the programmed level.
Do not drive the EN/UVLO pin above VIN.
MODE (Pin 7): The MODE pin acts as mode select for the
BD active load; when it is tied high, the LT3686 will prevent
pulse skipping at light loads by regulating an active load on
the BD pin. To disable the active load, tie MODE to GND.
BOOST (Pin 8): The BOOST pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar
NPN power switch.
DA (Pin 9): Connect catch diode (D1) anode to this pin.
SW (Pin 10): The SW pin is the output of the internal power
switch. Connect this pin to the inductor, catch diode and
boost capacitor.
GND (Exposed Pad Pin 11): The exposed pad GND pin is
the only ground connection for the device. The exposed
pad should be soldered to a large copper area to reduce
thermal resistance.
3686fc
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LT3686
Block Diagram
BOOST
VIN
VIN
R4
C2
EN/ULVO
OFF ON
R5
INT REG
UVLO
OVLO
DRIVER
1.27V
C3
Q1
SW
L1
R1
FB
SS
R2
VOUT
C1
BD
–
+
+
D1
gm
ACTIVE
LOAD
VC
SLOPE
COMP
C4
R
Q
S
Q
0.8V
DA
OSC
FREQUENCY FOLDBACK
GND
RT
MODE
3686 BD
R3
3686fc
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LT3686
Operation
The LT3686 is a current mode step-down regulator. The
EN/UVLO pin is used to place the LT3686 in shutdown. The
1.27V threshold on the EN/UVLO pin can be programmed
by an external resistor divider (R4, R5) to disable the
LT3686. When the EN/UVLO pin is driven above 1.27V, an
internal regulator provides power to the control circuitry.
This regulator includes both overvoltage and undervoltage
lockout to prevent switching when VIN is more than 37V
or less than 3.6V.
Tracking soft-start is implemented by providing constant
current via the SS pin to an external soft-start capacitor
(C4) to generate a voltage ramp. FB voltage is regulated to
the voltage at the SS pin until it exceeds 0.8V; FB is then
regulated to the reference 0.8V. Soft-start also reduces
the oscillator frequency to avoid hitting current limit during start-up. The SS capacitor is reset during fault events
such as overvoltage, undervoltage, thermal shutdown
and startup.
An oscillator is programmed by resistor RT. The oscillator
sets an RS flip-flop, turning on the internal 1.2A power
switch Q1. An amplifier and comparator monitor the current flowing between the VIN and SW pins, turning the
switch off when this current reaches a level determined by
the voltage at VC. An error amplifier measures the output
voltage through an external resistor divider tied to the FB
pin and servos the VC node. If the error amplifier’s output
increases, more current is delivered to the output; if it
decreases, less current is delivered. An active clamp (not
shown) on the VC node provides current limit.
The switch driver operates from either VIN or from the
BOOST pin. An external capacitor and the internal boost
diode are used to generate a voltage at the BOOST pin that
is higher than the input supply. This allows the driver to
fully saturate the internal bipolar NPN power switch for
efficient operation.
A comparator monitors the current flowing through the
catch diode via the DA pin and reduces the LT3686’s operating frequency when the DA pin current exceeds the
1.7A valley current limit. This helps to control the output
current in fault conditions such as shorted output with high
input voltage. The DA comparator works in conjunction
with the switch peak current limit comparator to determine
the maximum deliverable current of the LT3686.
The active load is enabled when MODE is tied above 0.8V
and disabled when the MODE pin is below 0.4V. To use the
active load, the BD pin should be tied to VOUT . The LT3686
will prevent pulse skipping at light loads by regulating the
active load. The active load will assist startup by guaranteeing a minimum load to charge the boost capacitor. It also
hastens the recharge of boost capacitor when operating
beyond maximum duty cycle.
The active load works only when the BD pin is less than
5.2V.
3686fc
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LT3686
Applications Information
FB Resistor Network
45
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1% resistors according to:
40
EN/UVLO (µA)
35
⎛V
⎞
R1= R2 ⎜ OUT – 1⎟
⎝ 0.8V ⎠
30
25
20
15
10
R2 should be 20k or less to avoid bias current errors.
Reference designators refer to the Block Diagram.
5
0
0
10
Programmable Undervoltage Lockout
 V

R4 =R5  IN – 1
 1.27V 
R4 also sets the hysteresis voltage for the programmable
UVLO:
Hysteresis = R4 • 2.4µA
Once VIN drops below the programmed voltage, the LT3686
will enter a low quiescent current state (IQ ≈ 15µA). To
shutdown the LT3686 completely (IQ < 1µA), reduce EN/
UVLO pin voltage to below 0.4V.
50
Figure 2. EN/UVLO Pin Current
Input Voltage Range
The input voltage range for the LT3686 applications depends
on the output voltage and on the absolute maximum ratings
of the VIN and BOOST pins. The minimum input voltage
is determined by either the LT3686’s minimum operating
voltage of 3.6V, or by its maximum duty cycle.
The duty cycle is the fraction of time that the internal switch
is on and is determined by the input and output voltages:
DC =
VOUT + VD
VIN – VSW + VD
Where VD is the forward voltage drop of the catch diode
(~0.4V) and VSW is the voltage drop of the internal switch
(~0.67V at maximum load). This leads to a minimum input
voltage of:
10000
1000
100
IQ (µA)
40
3686 F02
The EN/UVLO pin can be programmed by an external resistor divider between VIN and the EN/UVLO pin. Choose
the resistors according to:
10
VIN(MIN) =
VOUT + VD
– VD + VSW
DC MAX
DCMAX can be adjusted with frequency.
1
0.1
20
30
EN/UVLO (V)
0
1
2
3
4
5
EN/UVLO (V)
6
7
8
The boost capacitor is charged with the energy stored in
the inductor, the circuit will rely on some minimum load
current to sustain the charge across the boost capacitor.
3686 F01
Figure 1. IQ vs VEN/UVLO (VIN = 10V)
3686fc
10
LT3686
Applications Information
The maximum input voltage is determined by the absolute
maximum ratings of the VIN and BOOST pins. For fixed
frequency operation, the maximum input voltage is determined by the minimum duty cycle DCMIN:
VIN(MAX) =
VOUT + VD
– VD + VSW
DCMIN
DCMIN can be adjusted with frequency. Note that this is a
restriction on the operating input voltage for fixed frequency
operation; the circuit will tolerate transient inputs up to
the absolute maximum ratings of the VIN and BOOST pins.
Minimum On Time
As the input voltage is increased, the LT3686 is required
to switch for shorter periods of time. Delays associated
with turning off the power switch dictate the minimum on
time of the part. The minimum on time for the LT3686 is
100ns (Figure 3).
When the required on time decreases below the typical
minimum on time of 100ns, instead of the switch pulse
width becoming narrower to accommodate the lower duty
cycle requirement, the switch pulse width remains fixed at
100ns. The inductor current ramps up to a value exceeding the load current and the output ripple increases. The
part then remains off until the output voltage dips below
the programmed value before it begins switching again
(Figure 4).
Provided that the load can tolerate the increased output
voltage ripple and that the components have been properly
selected, operation while pulse skipping is safe and will
not damage the part. As the input voltage increases, the
inductor current ramps up quicker, the number of skipped
pulses increases, and the output voltage ripple increases.
Inductor current may reach current limit when operating
in pulse skip mode with small valued inductors. In this
case, the LT3686 will periodically reduce its frequency to
keep the inductor valley current to 1.7A (Figure 5). Peak
VSW
10V/DIV
VSW
20V/DIV
IL
500mA/DIV
IL
500mA/DIV
VOUT
100mA/DIV
AC
VOUT
100mV/DIV
AC
500ns/DIV
3686 F03
VIN = 18V
VOUT = 3.3V
L = 6.8µH
COUT = 22µF
ILOAD = 1.2mA
Figure 3. Continuous Mode Operation Near Minimum On Time
2µs/DIV
3686 F04
VIN = 35V
VOUT = 3.3V
L = 6.8µH
COUT = 22µF
IOUT = 300mA
Figure 4. Pulse Skip Occurs When Required On Time Is
Below 100ns
3686fc
11
LT3686
Applications Information
inductor current is therefore peak current plus minimum
switch delay:
Table 1. RT vs Frequency
FREQUENCY (MHz)
RT (kΩ)
2.5
9.53
2.3
12.1
2.1
15.4
1.7A + (VIN – VOUT)/L • 100ns
VSW
10V/DIV
IL
500mA/DIV
VOUT
100mA/DIV
AC
2µs/DIV
3686 F05
VIN = 35V
VOUT = 3.3V
L = 6.8µH
COUT = 22µF
IOUT = 1.2A
Figure 5. Pulse Skip with Large Load Current Will Be Limited by
the DA Valley Current Limit. Notice the Flat Inductor Valley
Current and Reduced Switching Frequency
1.9
20
1.7
25.5
1.5
31.6
1.3
40.2
1.1
52.3
0.9
69.8
0.7
97.6
0.5
150
0.3
280
300
250
200
RT (kΩ)
The part is robust enough to survive prolonged operation under these conditions as long as the peak inductor
current does not exceed 2A. Inductor current saturation
and junction temperature may further limit performance
during this operating regime.
100
50
Frequency Selection
0
0
0.5
1
1.5
FREQUENCY (MHz)
2
2.5
3686 F06a
Figure 6a. Switching Frequency vs RT
40
35
30
INDUCTANCE (µH)
The maximum frequency that the LT3686 can be programmed to is 2.5MHz. The minimum frequency that the
LT3686 can be programmed to is 300kHz. The switching
frequency is programmed by tying a 1% resistor from the
RT pin to ground. Table 1 can be used to select the value
of RT. Minimum on-time and edge loss must be taken into
consideration when selecting the intended frequency of
operation. Higher switching frequency increases power
dissipation and lowers efficiency. Finite transistor bandwidth
limits the speed at which the power switch can be turned
on and off, effectively setting the minimum on-time of the
LT3686. For a given output voltage, the minimum on-time
determines the maximum input voltage to remain in continuous mode operation outlined in the Minimum On Time
section of the data sheet. Finite transition time results in
a small amount of power dissipation each time the power
switch turns on and off (edge loss). Edge loss increases
with frequency, switch current, and input voltage.
150
5VOUT
25
12VOUT
20
15
3.3VOUT
10
5
0
0.25
0.75
1.25
1.75
FREQUENCY (MHz)
2.25
3686 F06b
Figure 6b. Suggested Inductance vs Frequency
3686fc
12
LT3686
Applications Information
The MODE pin serves as mode select for the BD active
load circuit. The active load is enabled when MODE is
tied high and disabled when MODE is tied low. See Fixed
Frequency at Light Load section.
Inductor Selection and Maximum Output Current
A good first choice for the inductor value is:
L=
4(VOUT + VD)
f
Catch Diode
A low capacitance 1-2A Schottky diode is recommended
for the catch diode, D1. The diode must have a reverse
voltage rating equal to or greater than the maximum input
voltage. The MBRM140 is a good choice; it is rated for
1A continuous forward current and a maximum reverse
voltage of 40V.
Input Capacitor
where VD is the voltage drop of the catch diode (~0.4V), L
is in μH, frequency is in MHz. With this value there will be
no subharmonic oscillation. The inductor’s RMS current
rating must be greater than the maximum load current
and its saturation current should be about 30% higher. For
robust operation during fault conditions, the saturation
current should be above 2A. To keep efficiency high, the
series resistance (DCR) should be less than 0.1Ω. Table
2 lists several vendors and types that are suitable.
There are several graphs in the Typical Performance
Characteristics section of this data sheet that show the
maximum load current as a function of input voltage and
inductor value for several popular output voltages. Low
inductance may result in discontinuous mode operation, which is okay, but further reduces maximum load
current. For details of the maximum output current and
discontinuous mode operation, see Linear Technology
Application Note 44.
Bypass the input of the LT3686 circuit with a 2.2μF or
higher value ceramic capacitor of X7R or X5R type. Y5V
types have poor performance over temperature and applied voltage and should not be used. A 2.2μF ceramic is
adequate to bypass the LT3686 and will easily handle the
ripple current. However, if the input power source has
high impedance, or there is significant inductance due to
long wires or cables, additional bulk capacitance may be
necessary. This can be provided with a low performance
electrolytic capacitor. Step-down regulators draw current
from the input supply in pulses with very fast rise and
fall times. The input capacitor is required to reduce the
resulting voltage ripple at the LT3686 and to force this very
high frequency switching current into a tight local loop,
minimizing EMI. A 2.2μF capacitor is capable of this task,
but only if it is placed close to the LT3686 and the catch
diode (see the PCB Layout section). A second precaution
regarding the ceramic input capacitor concerns the maximum input voltage rating of the LT3686. A ceramic input
capacitor combined with trace or cable inductance forms
Table 2
VENDOR
URL
PART SERIES
INDUCTANCE RATE (µH)
SIZE (mm)
Sumida
www.sumida.com
CDRH4D28
CDRH5D28
CDRH8D28
1.2 to 4.7
2.5 to 10
2.5 to 33
4.5 × 4.5
5.5 × 5.5
8.3 × 8.3
www.toko.com
A916CY
D585LC
2 to 12
1.1 to 39
6.3 × 6.2
8.1 × 8
www.we-online.com
WE-TPC(M)
WE-PD2(M)
WE-PD(S)
1 to 10
2.2 to 22
1 to 27
4.8 × 4.8
5.2 × 5.8
7.3 × 7.3
Toko
Würth Elektronik
3686fc
13
LT3686
Applications Information
a high quality (underdamped) tank circuit. If the LT3686
circuit is plugged into a live supply, the input voltage can
ring to twice its nominal value, possibly exceeding the
LT3686’s voltage rating. This situation is easily avoided;
see the Hot-Plugging Safely section.
response. Transient performance can be improved with
a high value capacitor, but a phase lead capacitor across
the feedback resistor, R1, may be required to get the full
benefit (see the Compensation section).
For small size, the output capacitor can be chosen according to:
Output Capacitor
The output capacitor has two essential functions. Along
with the inductor, it filters the square wave generated by
the LT3686 to produce the DC output. In this role it determines the output ripple so low impedance at the switching
frequency is important. The second function is to store
energy in order to satisfy transient loads and stabilize the
LT3686’s control loop. Ceramic capacitors have very low
equivalent series resistance (ESR) and provide the best
ripple performance. A good value is:
C OUT =
C OUT =
83
VOUT • f
where COUT is in μF and frequency is in MHz. However,
using an output capacitor this small results in an increased
loop crossover frequency and increased sensitivity to
noise, requiring careful PCB design.
High performance electrolytic capacitors can be used for
the output capacitor. Low ESR is important, so choose one
that is intended for use in switching regulators. The ESR
should be specified by the supplier and should be 0.1Ω
or less. Such a capacitor will be larger than a ceramic
capacitor and will have a larger capacitance, because the
capacitor must be large to achieve low ESR. Table 3 lists
several capacitor vendors.
145
VOUT • f
where COUT is in μF and frequency is in MHz. Use an X5R or
X7R type and keep in mind that a ceramic capacitor biased
with VOUT will have less than its nominal capacitance. This
choice will provide low output ripple and good transient
Table 3
VENDOR
PHONE
URL
PART SERIES
COMMENTS
Panasonic
(714) 373-7366
www.panasonic.com
Ceramic
Polymer
Tantalum
EEF Series
Kemet
(864) 963-6300
www.kemet.com
Ceramic
Tantalum
Sanyo
(408) 794-9714
www.sanyovideo.com
Ceramic
Polymer
Tantalum
Murata
(404) 436-1300
www.murata.com
Ceramic
www.avxcorp.com
Ceramic
Tantalum
www.taiyo-yuden.com
Ceramic
AVX
Taiyo Yuden
(864) 963-6300
T494, T495
POSCAP
TPS Series
3686fc
14
LT3686
Applications Information
Figure 7 shows the transient response of the LT3686 with
several output capacitor choices. The output is 3.3V. The
load current is stepped from 0.25A to 1A and back to 0.25A,
and the oscilloscope traces show the output voltage. The
upper photo shows the recommended value. The second
photo shows the improved response (less voltage drop)
resulting from a larger output capacitor and a phase lead
capacitor. The last photo shows the response to a high
performance electrolytic capacitor. Transient performance
is improved due to the large output capacitance.
BOOST and BD Pin Considerations
Capacitor C3 and the internal boost diode are used to
generate a boost voltage that is higher than the input
voltage. In most cases a 0.22μF capacitor will work well.
Figure 8 shows two ways to arrange the boost circuit. The
BOOST pin must be at least 2.2V above the SW pin for
best efficiency. For outputs of 3V and above, the standard
circuit (Figure 8a) is best. For outputs less than 3V and
above 2.5V, place a discrete Schottky diode (such as the
MODE < 0.4V
MODE > 0.8V
VOUT
32.4k
22µF
FB
10k
IL
500mA/DIV
IL
500mA/DIV
VOUT
50mV/DIV
AC
VOUT
50mV/DIV
AC
3686 F07a
20µs/DIV
3686 F07b
20µs/DIV
3686 F07c
20µs/DIV
3686 F07f
20µs/DIV
3686 F07i
VOUT
32.4k
47pF
22µF
×2
FB
10k
IL
500mA/DIV
IL
500mA/DIV
VOUT
50mV/DIV
AC
VOUT
50mV/DIV
AC
3686 F07d
20µs/DIV
3686 F07e
VOUT
32.4k
FB
10k
+
100µF
SANYO
4TPB100M
IL
500mA/DIV
IL
500mA/DIV
VOUT
50mV/DIV
AC
VOUT
50mV/DIV
AC
3686 F07g
20µs/DIV
3686 F07h
Figure 7. Transient Load Response of the LT3686 with Different Output Capacitors as the Load Current Is Stepped from 0.25A to 1A.
VIN = 12V, VOUT = 3.3V, L = 6.8µH , Frequency = 2MHz
3686fc
15
LT3686
Applications Information
BAT54) in parallel with the internal diode to reduce VD. The
following equations can be used to calculate and minimize
boost capacitance in μF:
CBOOST =
the optimal boost capacitor for the chosen BD voltage.
The absence of BD voltage during startup will increase
minimum voltage to start and reduce efficiency. You must
also be sure that the maximum voltage rating of BOOST
pin is not exceeded. The BD pin can also be tied to VIN
(Figure 8c) but VIN will be limited to 25V and the active
load circuit is automatically disabled.
0.065
(VBD + VCATCH – VD − 2.2) • f
VD is the forward drop of the boost diode, VCATCH is the
forward drop of the catch diode (D1), and frequency is
in MHz.
The minimum operating voltage of an LT3686 application is limited by the undervoltage lockout (3.6V) and by
the maximum duty cycle as outlined above. For proper
start-up, the minimum input voltage is also limited by
the boost circuit. If the input voltage is ramped slowly, or
For lower output voltages the BD pin can be tied to an
external voltage source with adequate local bypassing
(Figure 8b). The above equations still apply for calculating
BD
BOOST
LT3686
VIN
VIN
SW
DA
GND
8a
VOUT
VBOOST – VSW ≅ VOUT
MAX VBOOST ≅ VIN + VOUT
VDD
BD
BOOST
LT3686
VIN
VIN
SW
DA
GND
8b
VOUT
VBOOST – VSW ≅ VDD
MAX VBOOST ≅ VIN + VDD
BD
BOOST
LT3686
VIN
VIN
SW
GND
8c
VOUT
DA
VBOOST – VSW ≅ VIN
MAX VBOOST ≅ 2VIN
3686 F08
Figure 8
3686fc
16
LT3686
Applications Information
the LT3686 is turned on with its EN/UVLO pin when the
output is already in regulation, then the boost capacitor
may not be fully charged. Because the boost capacitor is
charged with the energy stored in the inductor, the circuit
will rely on some minimum load current to get the boost
circuit running properly.
This minimum load will depend on the input and output
voltages, and on the arrangement of the boost circuit. The
minimum load generally goes to zero once the circuit has
started. Figure 9 shows plots of minimum load to start
and to run as a function of input voltage. In many cases
the discharged output capacitor will present a load to the
switcher which will allow it to start. At light loads, the
inductor current becomes discontinuous and the effective
duty cycle can be very high. This reduces the minimum
input voltage to approximately 400mV above VOUT. At
higher load currents, the inductor current is continuous
and the duty cycle is limited by the maximum duty cycle,
requiring a higher input voltage to maintain regulation.
As the LT3686 enters dropout, the boost capacitor voltage
will be limited by VOUT, which is fixed by the maximum duty
cycle. If the boost capacitor’s voltage during dropout falls
7
9
8
6
7
6
4
VIN (V)
VIN (V)
5
3
4
3
2
2
START
RUN
SUSTAIN
1
0
5
1
10
100
START
RUN
SUSTAIN
1
0
1000
1
10
ILOAD (mA)
100
3686 F09a
Figure 9a. Typical Minimum Input Voltage, VOUT = 3.3V,
f = 1MHz, L = 15µH, Mode < 0.4V
Figure 9b. Typical Minimum Input Voltage, VOUT = 5V,
f = 1MHz, L = 22µH, Mode < 0.4V
8
6
7
RUN
5
4
3
4
3
2
2
1
0
RUN
6
VIN (V)
VIN (V)
3686 F09b
7
5
1000
ILOAD (mA)
1
1
10
100
1000
ILOAD (mA)
0
1
10
100
1000
ILOAD (mA)
3686 F09c
Figure 9c. Typical Minimum Input Voltage, VOUT = 3.3V,
f = 1MHz, L = 15µH, Mode > 0.8V
3686 F09d
Figure 9d. Typical Minimum Input Voltage, VOUT = 5V,
f = 1MHz, L = 22µH, Mode > 0.8V
3686fc
17
LT3686
Applications Information
below the minimum voltage to sustain boosted operation
(2.2V across the boost capacitor), the output voltage will
fall suddenly to:
VOUT = (VIN – 2.2) • DCMAX
Figure 9 shows the minimum VIN necessary to sustain
boosted operation during dropout. Once VIN drops below
the sustain voltage, VIN will need to reach the start voltage
again to refresh the boost capacitor. The programmable
undervoltage lockout (UVLO) function can be used to
avoid operating unless VIN is greater than the start voltage.
Fixed Frequency at Light Load
The LT3686 contains unique active load circuitry to allow
for full frequency switching at very light loads. To enable
the active load, tie the MODE pin to greater than 0.8V.
Typical fixed frequency nonsynchronous buck regulators
skip pulses at light loads. With a fixed input voltage, as
the load current decreases in discontinuous mode, the
regulator is required to switch for shorter periods of time.
When the required on time decreases below the typical
minimum on time, the regulator skips one or more pulses
so the effective average duty cycle is equal to the required
duty cycle. This likelihood of entering pulse-skipping is
exacerbated by the tendency for minimum on time to
increase at very light loads. Pulse-skipping is undesirable
because it causes unpredictable, sub-harmonic output
ripple that can interfere with the operation of other sensitive
components such as AM receivers and audio equipment.
Instead of controlling switch current, the internal error
amplifier servos the active load on the output via the BD
pin to maintain output voltage regulation. The impact on
efficiency is mitigated by pulling the minimum current
necessary to keep switching at full frequency. The necessary BD load to maintain output regulation depends on
VIN, inductor size, and load current. As the necessary
BD load increases beyond its 40mA limit, pulse-skipping
mode will resume.
The BD active load circuitry is enabled when MODE tied
high and disabled when MODE is tied low. Even when
activated, the active load will shutdown when BD voltage
exceeds either 5.2V or VIN in an effort to minimize power
dissipation and intelligently react to external configurations.
To address the startup concerns delineated in the BOOST
and BD Pin Considerations section, the active load will
assist startup by pulling maximum current (40mA) to
charge the boost capacitor voltage in the absence of an
adequate load. An internal power good circuit will disable
the BD active load when VFB reaches 0.7V. Figure 9 compares plots of minimum input voltage to start and run as
a function of load current. In many cases the discharged
output capacitor will present a load to the switcher which
will allow it to start. The plots show the worst-case situation where VIN is ramping very slowly.
The active load also activates to hasten the recharge of
boost cap when operating beyond maximum duty cycle.
When not in use, the active load pulls no current.
The BD active load is designed to combat pulse-skipping
by providing an operational regime between full frequency
discontinuous and pulse-skipping modes.
As the LT3686 approaches minimum on time in discontinuous mode, its power switch transitions smoothly into a
fixed on time, fixed frequency open loop current source.
18
35
PULSE-SKIPPING
30
ACTIVE
LOAD
25
VIN (V)
The maximum VIN before pulse-skipping in discontinuous mode is directly dependent on load current; as the
load decreases, so does the pulse-skipping boundary. An
artificial load on the output helps push the pulse-skipping
boundary higher. The LT3686 achieves this goal by commanding the minimum load necessary to keep itself at
full switching frequency, hence the circuitry is called an
active load.
40
20
DCM
15
CCM
10
5
0
0
20
40
60
80
IOUT (mA)
100
120
140
3686 F10
Figure 10. Regions of Operation (5VOUT, 2MHz)
3686fc
LT3686
Applications Information
Soft-Start
The SS pin is used to soft-start the LT3686, eliminating
input current surge during start-up. It can also be used to
track another voltage in the system (Figure 11).
An internal 2µA current source charges an external softstart capacitor to generate a voltage ramp. FB voltage is
regulated to the voltage at the SS pin until it exceeds 0.8V,
FB is then regulated to the reference 0.8V. Soft-start also
reduces the oscillator frequency to avoid hitting current
limit during start-up. Figure 12 shows the start-up waveforms with and without the soft-start circuit.
VOUT
2V/DIV
VSS
500mV/DIV
1ms/DIV
3686 F11
Figure 11. LT3686 Configured to Track Voltage on SS Pin
VSW
10V/DIV
SS
GND
IL
500mA/DIV
VOUT
2V/DIV
VIN = 10V
VOUT = 3.3V
L = 6.8µH
COUT = 22µF
CSS = 0
5µs/DIV
VSW
10V/DIV
SS
1.2nF
GND
IL
500mA/DIV
VOUT
2V/DIV
VIN = 10V
VOUT = 3.3V
L = 6.8µH
COUT = 22µF
CSS = 1.2nF
50µs/DIV
3686 F12
Figure 12. To Soft-Start the LT3686, Add a Capacitor to the SS Pin
3686fc
19
LT3686
Applications Information
Short and Reverse Protection
If the inductor is chosen so that it won’t saturate excessively, the LT3686 will tolerate a shorted output. When
operating in short-circuit condition, the LT3686 will reduce
its frequency until the valley current is 1.7A (Figure 13).
There is another situation to consider in systems where
the output will be held high when the input to the LT3686
is absent. This may occur in battery charging applications
or in battery backup systems where a battery or some
other supply is diode ORed with the LT3686’s output. If
the VIN pin is allowed to float and the EN/UVLO pin is held
high (either by a logic signal or because it is tied to VIN),
then the LT3686’s internal circuitry will pull its quiescent
current through its SW pin. This is fine if your system
can tolerate a few mA in this state. If you ground the EN/
UVLO pin, the SW pin current will drop to essentially
zero. However, if the VIN pin is grounded while the output
is held high, then parasitic diodes inside the LT3686 can
VSW
20V/DIV
pull large currents from the output through the SW pin
and the VIN pin. Figure 14 shows a circuit that will run
only when the input voltage is present and that protects
against a shorted or reversed input.
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT3686 circuits. However, these capacitors can cause problems if the LT3686 are plugged into a
live supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the voltage
at the VIN pin of the LT3686 can ring to twice the nominal
input voltage, possibly exceeding the LT3686’s rating and
damaging the part. If the input supply is poorly controlled
or the user will be plugging the LT3686 into an energized
VIN
VIN
LT3686
BD
BOOST
EN/UVLO
SW
VOUT
MODE
IL
500mA/DIV
SS
2µs/DIV
3686 F13
VIN = 35V
L = 6.8µH
COUT = 22µF
RT = 17.4k
VOUT = 0V
Figure 13. The LT3686 Reduces its Frequency from 2MHz to
160kHz to Protect Against Shorted Output
DA
RT
GND
FB
3686 F14
Figure 14. Input Diode Prevents a Shorted Input from
Discharging a Backup Battery Tied to the Output; it Also
Protects the Circuit from a Reversed Input. The LT3686
Runs Only When the Input is Present
3686fc
20
LT3686
Applications Information
supply, the input network should be designed to prevent
this overshoot. Figure 15 shows the waveforms that result when an LT3686 circuit is connected to a 24V supply
through six feet of 24-gauge twisted pair. The first plot is
the response with a 2.2μF ceramic capacitor at the input.
The input voltage rings as high as 35V and the input current peaks at 20A. One method of damping the tank circuit
is to add another capacitor with a series resistor to the
circuit. In Figure 15b an aluminum electrolytic capacitor
has been added. This capacitor’s high equivalent series
resistance damps the circuit and eliminates the voltage
CLOSING SWITCH
SIMULATES HOT PLUG
IIN
VIN
+
LOW
IMPEDANCE
ENERGIZED
24V SUPPLY
+
LT3686
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of
the circuit, though it is likely to be the largest component
in the circuit. An alternative solution is shown in Figure
15c. A 1Ω resistor is added in series with the input to
eliminate the voltage overshoot (it also reduces the peak
input current). A 0.1μF capacitor improves high frequency
filtering. This solution is smaller and less expensive than
the electrolytic capacitor. For high input voltages its impact
on efficiency is minor, reducing efficiency less than one
half percent for a 5V output at full load operating from 24V.
VIN
20V/DIV
2.2µF
20µs/DIV
(15a)
LT3686
+
RINGING VIN MAY EXCEED
ABSOLUTE MAXIMUM
RATING OF THE LT3686
IIN
5A/DIV
STRAY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
10µF
35V
AI.EI.
DANGER!
VIN
20V/DIV
2.2µF
IIN
5A/DIV
(15b)
1Ω
+
0.1µF
LT3686
20µs/DIV
VIN
20V/DIV
2.2µF
IIN
5A/DIV
(15c)
20µs/DIV
3686 F15
Figure 15. A Well Chosen Input Network Prevents Input Voltage Overshoot and Ensures Reliable Operation
When the LT3686 Is Connected to a Live Supply
3686fc
21
LT3686
Applications Information
Frequency Compensation
The LT3686 uses current mode control to regulate the
output. This simplifies loop compensation. In particular,
the LT3686 does not require the ESR of the output capacitor for stability allowing the use of ceramic capacitors to
achieve low output ripple and small circuit size. Figure 16
shows an equivalent circuit for the LT3686 control loop.
The error amp is a transconductance amplifier with finite
output impedance. The power section, consisting of the
modulator, power switch and inductor, is modeled as a
transconductance amplifier generating an output current
proportional to the voltage at the VC node. Note that the
output capacitor integrates this current, and that the capacitor on the VC node (CC) integrates the error amplifier output
current, resulting in two poles in the loop. RC provides a
zero. With the recommended output capacitor, the loop
1V
–
+
RC
160k
CC
100pF
GND
SW
gm =
2A/V
OUT
R1
–
VC
CURRENT MODE
POWER STAGE
CPL
FB
gm =
200µA/V
ERROR
AMPLIFIER
1M
+
LT3686
crossover occurs above the RCCC zero. This simple model
works well as long as the value of the inductor is not too
high and the loop crossover frequency is much lower than
the switching frequency. With a larger ceramic capacitor
(very low ESR), crossover may be lower and a phase lead
capacitor (CPL) across the feedback divider may improve
the phase margin and transient response. Large electrolytic
capacitors may have an ESR large enough to create an
additional zero, and the phase lead may not be necessary.
If the output capacitor is different than the recommended
capacitor, stability should be checked across all operating
conditions, including load current, input voltage and temperature. The LT1375 data sheet contains a more thorough
discussion of loop compensation and describes how to
test the stability using a transient load.
ESR
800mV
+
C1
C1
R2
3686 F16
Figure 16. Model for Loop Response
3686fc
22
LT3686
Applications Information
ideally at the ground terminal of the output capacitor C1.
The SW and BOOST nodes should be as small as possible.
Finally, keep the FB node small so that the ground pin and
ground traces will shield it from the SW and BOOST nodes.
Include vias near the exposed GND pad of the LT3686 to
help remove heat from the LT3686 to the ground plane.
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 17 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
flow in the LT3686’s VIN and SW pins, the catch diode (D1)
and the input capacitor (C2). The loop formed by these
components should be as small as possible and tied to
system ground in only one place. These components,
along with the inductor and output capacitor, should be
placed on the same side of the circuit board, and their
connections should be made on that layer. Place a local,
unbroken ground plane below these components, and
tie this ground plane to system ground at one location,
High Temperature Considerations
The die temperature of the LT3686E/I must be lower than
the maximum rating of 125°C (150°C for the LT3686H).
For high ambient temperatures, care should be taken in
the layout of the circuit to ensure good heat sinking of the
LT3686. The maximum load current should be derated as
the ambient temperature approaches the maximum allowed
OUT
SW
D1
C2
BD
FB
VIN
DA
BST
SS
RT
UVLO
MODE
3686 F17
Figure 17. PCB Layout
3686fc
23
LT3686
Applications Information
junction temperature. The die temperature is calculated by
multiplying the LT3686 power dissipation by the thermal
resistance from junction to ambient. Power dissipation
within the LT3686 can be estimated by calculating the total
power loss from an efficiency measurement and subtracting the catch diode loss. The resulting temperature rise at
full load is nearly independent of input voltage. Thermal
resistance depends on the layout of the circuit board, but
43°C/W is typical for the (3mm × 3mm) DFN package.
Outputs Greater Than 19V
Note that for outputs above 19V, the input voltage range
will be limited by the maximum rating of the BOOST pin.
VIN
30V TO 36V
2.2µF
The sum of input and output voltages cannot exceed the
BOOST pin’s 55V rating. The 25V circuit (Figure 18) shows
how to overcome this limitation using an additional Zener
diode.
Other Linear Technology Publications
Application Notes 19, 35 and 44 contain more detailed
descriptions and design information for Buck regulators
and other switching regulators. The LT1376 data sheet
has a more extensive discussion of output ripple, loop
compensation and stability testing. Design Note 100
shows how to generate a bipolar output supply using a
buck regulator.
0.22µF
15V
VIN
LT3686
BD
BOOST
EN/UVLO
0.22µF
MODE
SW
100µH
SS
100nF
RT
DA
GND
61.9k
VOUT
500mA
301k
FB
10µF
10k
3686 F18
Figure 18. 25V Step-Down Converter
3686fc
24
LT3686
Typical Applications
0.8V Step-Down Converter
VIN
3.6V TO 25V
3.3V Step-Down Converter
VIN
5V TO 37V
2.2µF
BOOST
EN/UVLO
SS
1nF
4.7µH
VOUT
0.8V
1.2A
SS
1nF
GND
GND
31.6k
FB
61.9k
61.9k
VOUT
3.3V
1.2A
DA
RT
FB
15µH
SW
MODE
DA
RT
0.22µF
LT3686
SW
MODE
BOOST
EN/UVLO
0.22µF
LT3686
BD
VIN
2.2µF
BD
VIN
22µF
10k
100µF
3686 TA02b
3686 TA02a
1.8V Step-Down Converter
VIN
3.6V TO 25V
3.3V Step-Down Converter with Programmed UVLO
VIN
7.5V TO 37V
BD
VIN
2.2µF
BOOST
EN/UVLO
2.2µF
6.8µH
SS
DA
RT
GND
0.22µF
15µH
VOUT
3.3V
1.2A
DA
MODE
RT
1nF
31.6k
FB
SS
47µF
10k
BOOST
SW
12.4k
FB
61.9k
LT3686
100k
VOUT
1.8V
1.2A
SW
MODE
1nF
EN/UVLO
0.22µF
LT3686
BD
VIN
500k
22µF
10k
GND
61.9k
3686 TA02d
3686 TA02c
2.5V Step-Down Converter
VIN
3.6V TO 25V
5V Step-Down Converter
VIN
7V TO 37V
BD
VIN
2.2µF
BOOST
EN/UVLO
SS
1nF
RT
GND
61.9k
VOUT
2.5V
1.2A
DA
SS
1nF
GND
61.9k
22µH
VOUT
5V
1.2A
DA
RT
21.5k
FB
0.22µF
SW
MODE
10µH
SW
MODE
BOOST
EN/UVLO
LT3686
0.22µF
LT3686
BD
VIN
2.2µF
52.3k
FB
15µF
10k
33µF
10k
3686 TA02f
3686 TA02e
3686fc
25
LT3686
Package Description
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
6
0.40 ± 0.10
10
1.65 ± 0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.75 ±0.05
0.00 – 0.05
5
1
(DD) DFN REV C 0310
0.25 ± 0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3686fc
26
LT3686
Revision History
REV
DATE
DESCRIPTION
PAGE NUMBER
A
1/10
Revised Features section
B
6/10
C
5/11
Updated Electrical Characteristics (Feedback Voltage)
Added H-grade information
Revised Electrical Characteristics and updated Note 6
Revised Programmable Undervoltage Lockout section and updated Table 1 and minor value update in Outputs
Greater Than 19V section in Applications Information section
Revised unit to µH on 0.8V Step-Down Converter figure in Typical Applications
1
3
2, 3, 23
3
10, 12, 24
25
3686fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LT3686
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LT3689
36V, 60V Transient Protection, 800mA, 2.2MHz, High
Efficiency MicroPower Step-Down DC/DC Converter with
POR Reset and Watchdog Timer
VIN: 3.6V to 36V Transient to 60V, VOUT(MIN) = 0.8V, IQ = 75µA, ISD <1µA,
16-Pin 3mm 3mm QFN Package
LT3682
36V, 60VMAX, 1A, 2.2MHz, High Efficiency MicroPower
Step-Down DC/DC Converter
VIN: 3.6V to 36V, VOUT(MIN) = 0.8V, IQ = 75µA, ISD <1µA, 12-Pin 3mm 3mm
DFN Package
LT3970
40V, 350mA (IOUT), 2.2MHz, High Efficiency Step-Down
DC/DC Converter with Only 2.5µA of Quiescent Current
VIN: 4.2V to 40V, VOUT(MIN) = 1.21V, IQ = 2.5µA, ISD <1µA, 10-Pin
3mm 3mm DFN, 10-Pin MSOP Packages
LT3480
36V with Transient Protection to 60V, 2A (IOUT), 2.4MHz,
High Efficiency Step-Down DC/DC Converter with
Burst Mode® Operation
VIN: 3.6V to 38V, VOUT(MIN) = 0.78V, IQ = 70µA, ISD <1µA, 10-Pin
3mm 3mm DFN, 10-Pin MSOP Packages
LT3685
36V with Transient Protection to 60V, 2A (IOUT), 2.4MHz,
High Efficiency Step-Down DC/DC Converter
VIN: 3.6V to 38V, VOUT(MIN) = 0.78V, IQ = 70µA, ISD <1µA, 10-Pin
3mm 3mm DFN, 10-Pin MSOP Packages
LT3481
34V with Transient Protection to 36V, 2A (IOUT), 2.8MHz,
High Efficiency Step-Down DC/DC Converter with Burst
Mode Operation
VIN: 3.6V to 34V, VOUT(MIN) = 1.26V, IQ = 50µA, ISD <1µA, 10-Pin
3mm 3mm DFN, 10-Pin MSOP Packages
LT3684
34V with Transient Protection to 36V, 2A (IOUT), 2.8MHz,
High Efficiency Step-Down DC/DC Converter
VIN: 3.6V to 34V, VOUT(MIN) = 1.26V, IQ = 850µA, ISD <1µA, 10-Pin
3mm 3mm DFN, 10-Pin MSOP Packages
LT3508
36V with Transient Protection to 40V, Dual 1.4A (IOUT),
3MHz, High Efficiency Step-Down DC/DC Converter
VIN: 3.7V to 37V, VOUT(MIN) = 0.8V, IQ = 4.6mA, ISD = 1µA, 24-Pin
4mm 4mm QFN, 16-Pin TSSOP Packages
LT3505
36V with Transient Protection to 40V, 1.4A (IOUT), 3MHz,
High Efficiency Step-Down DC/DC Converter
VIN: 3.6V to 34V, VOUT(MIN) = 0.78V, IQ = 2mA, ISD = 2µA, 8-Pin
3mm 3mm DFN, 8-Pin MSOP Packages
LT3500
36V, 40VMAX, 2A, 2.5MHz, High Efficiency Step-Down DC/ VIN: 3.6V to 36V, VOUT(MIN) = 0.8V, IQ = 2.5mA, ISD <10µA, 10-Pin
DC Converter and LDO Controller
3mm 3mm DFN Package
LT3507
36V, 2.5MHz Triple (2.4A + 1.5A +1.5A (IOUT)) with LDO
Controller High Efficiency Step-Down DC/DC Converter
VIN: 4V to 36V, VOUT(MIN) = 0.8V, IQ = 7mA, ISD = 1µA, 38-Pin 5mm 7mm
QFN Package
LT3437
60V, 400mA (IOUT), MicroPower Step-Down DC/DC
Converter with Burst Mode Operation
VIN: 3.3V to 60V, VOUT(MIN) = 1.25V, IQ = 100µA, ISD <1µA, 10-Pin
3mm 3mm DFN, 16-Pin TSSOP Packages
LT1976/LT1977
60V, 1.2A (IOUT), 200/500kHz, High Efficiency
Step-Down DC/DC Converter with Burst Mode Operation
VIN: 3.3V to 60V, VOUT(MIN) = 1.2V, IQ = 100µA, ISD <1µA, 16-Pin TSSOP
Package
LT3434/LT3435
60V, 2.4A (IOUT), 200/500kHz, High Efficiency
Step-Down DC/DC Converter with Burst Mode Operation
VIN: 3.3V to 60V, VOUT(MIN) = 1.2V, IQ = 100µA, ISD <1µA, 16-Pin TSSOP
Package
LT1936
36V, 1.4A (IOUT), 500kHz, High Efficiency Step-Down
DC/DC Converter
VIN: 3.6V to 36V, VOUT(MIN) = 1.2V, IQ = 1.9mA, ISD <1µA, 8-Pin MS Package
LT3493
36V, 1.4A (IOUT), 750kHz, High Efficiency Step-Down
DC/DC Converter
VIN: 3.6V to 36V, VOUT(MIN) = 0.8V, IQ = 1.9mA, ISD <1µA, 6-Pin
2mm 3mm DFN Package
LT1766
60V, 1.2A (IOUT), 200kHz, High Efficiency Step-Down
DC/DC Converter
VIN: 5.5V to 60V, VOUT(MIN) = 1.2V, IQ = 2.5mA, ISD = 25µA, 16-Pin TSSOP
Package
3686fc
28
Linear Technology Corporation
LT 0511 REV C • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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 LINEAR TECHNOLOGY CORPORATION 2009