SIGNAL TO NOISE RATIO CAN BE IMPROVED BY CONTROLLING THE SONG LEVEL BOTH WITH THE EXTERNAL DAC Song Quality Improvement Using the DAC on AT89C51SND1 Reference Design AND WITH THE AT89C51SND1 SONG Application Modes LEVEL SFR REGISTER. The DAC UDA1330ATS has two application modes, Standard mode, and L3 mode. TO CONTROL THE SONG LEVEL WITH THE DAC UDA1330ATS, THE L3 MODE MUST BE USED. THIS APPLICATION NOTE GIVES SOME Configuration Area The application mode can be set with the three voltage levels on the APPSEL pin of UDA1330ATS (see Table 1). In standard mode (or static mode), APPLx pins are static input pins. In L3 mode, a serial protocol is specified over the APPLx pins. See Philips® datasheet UDA1330ATS for more information. Figure 1 and Figure 2 are the functional schematics of the reference design in standard mode and L3 mode. MAX4468 Figure 3: Hardware Changes Location (L3 Mode) INFORMATION ON ACTIVATING/DEVoltage on Mode Pin APPSEL fsys ACTIVATING THE L3 MODE OF DAC UDA1330ATS (OR COMPATIBLE VSSD L3 mode 256fs, 384fs or 512fs HARDWARE) FOR THE AT89C51SND1 1/2 VDDD Static pin mode 384fs REFERENCE DESIGN. VDDD place of the first 10K SMD resistor, remove the sec ond resistor and keep the SMD capacitor as is. 4. Upload the new firmware according to the DAC configuration. Proceed with software changes outlined in the following section. 256fs Table 1: Selecting Application Mode and System Clock Frequency Via Appsel Pin Hardware Changes 1. Locate the MAX4468 component on the reference design (see the arrow on the top right side of the Figure 3). 2. Locate the 3 SMD resistor/capacitor aligned between the MAX4468 and the PCB edge. 3. To de-activate the L3 mode, from left to right, solder a 10K SMD resistor, another 10K SMD resistor and keep the SMD capacitor as is. To activate the L3 mode, from left to right, perform a short-circuit in Software Changes 1. Unzip the source code package of the latest version of the reference design firm-ware: snd1c-refd-nf. The files corresponding to DAC controls are: dac_drv.c and dac_drv.h in the directory snd1-refd-nfx_x_x/lib_board/dac. 2. Edit the file snd1c-refd-nf-x_x_x/Lib_board/refd.h and comment or un-comment the line #define DAC_L3MODE to respectively de-activate or activate the L3 mode usage. 3. Recompile the project. 4. Upload the new Hex file on the configured or unconfigured board in L3 mode according to the software selected (see Section “Hardware Changes”). VDDD VDDD 10K 10K APPSEL APPSEL 10K 10K Px.y Px.y APPLx APPLx AT89C51SND1 UDA1330ATS Figure 1: Functional Overview of the Reference Design with DAC in Standard Mode www.atmel.com page 37 AT89C51SND1 UDA1330ATS Figure 2: Functional Overview of the Reference Design with DAC in L3 Mode