AN-1318: Differential Overvoltage Protection Circuits for Current Sense Amplifiers (Rev. 0) PDF

AN-1318
APPLICATION NOTE
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Differential Overvoltage Protection Circuits for Current Sense Amplifiers
by Emmanuel Adrados and Paul Blanchard
INTRODUCTION
Most current sense amplifiers are capable of handling high
common-mode voltages (CMVs) but not high differential input
voltages. In certain applications, there are fault conditions
wherein the differential input voltage at the shunt exceeds the
specified maximum voltage of the amplifier. These conditions
can cause damage to the amplifier. This application note
introduces two basic overvoltage protection circuits for current
sense amplifiers and discusses the effects of the circuits on device
performance for two types of current sense architectures—a
current sense amplifier (using the AD8210 as an example) and a
difference amplifier (using the AD8418 as an example).
VIN _ MAX − VRATED _ MAX
R
= 3 mA
(1)
where:
VIN_MAX is the expected maximum differential voltage.
VRATED_MAX is the maximum rated voltage (0.7 V).
R is the total series resistance (R1 + R2).
For example, if the expected maximum transient input voltage
is 10 V, the equation is
10 V − 0.7 V
R
= 3 mA
(2)
OVERVOLTAGE PROTECTION CIRCUIT
If R = 3.1 kΩ, then based on Equation 1, R1 and R2 = 1.55 kΩ.
Figure 1 shows the basic connection for overvoltage protection
of a current sense amplifier. When the differential input voltage
exceeds the maximum rated value for a given amplifier, the
amplifier may begin to pull current into the internal protection
diodes. The additional series resistors, R1 and R2, prevent large
current flow to the internal protection diodes if a large
differential voltage signal is present between the input pins.
These values for R1 and R2 are significant, relative to the input
impedance of certain amplifiers, and can contribute a large error
to the overall system performance. Keep the values of R1 and
R2 as low as possible to minimize error contribution. One way
to reduce the value of R1 and R2 is to add external protection
diodes with higher current capabilities on the input pins, as
shown in Figure 2.
+5V
+5V
VS
R1
VREF1
VS
R2
GND
10Ω
VCM
GND
D1
VREF2
D2
IN
GND
Figure 2. Overvoltage Protection Circuit with External Input Differential
Protection Diodes
12582-001
GND
VREF1
OUT
R2
VREF2
VCM
VS
V1
OUT
V1
IN
10Ω
12582-002
VS
R1
Figure 1. Basic Overvoltage Protection Circuit
Both the maximum rated voltage and the maximum input
current tolerated by a protection circuit vary from device to
device. As a general rule, limit the current passing through the
internal differential protection diodes to 3 mA. Given this value,
calculate the values of R1 and R2 using Equation 1.
For example, when using the Digi-Key B0520LW-7-F Schottky
diode, which can handle up to 500 mA of forward current, the
value of R decreases to 20 Ω.
Rev. 0 | Page 1 of 3
AN-1318
Application Note
In addition to protection against overvoltage, R1 and R2 can
also be used to form an electromagnetic interference (EMI)
filter by adding capacitors, as shown in Figure 3. This
configuration helps the circuit reject any high frequency
interference from external sources such as mobile
communications, electric motors, and utility power lines.
Both the AD8210 and the AD8418 are evaluated to measure the
impact of the additional series resistors on the gain error, CMRR,
and offset voltage parameters of the devices.
Gain Error
The gain error of an amplifier is usually specified in the corresponding data sheet. Table 1 shows the calculated additional gain
error and the actual gain error of the AD8210.
+5V
R1
10Ω
C1
V1
VREF1
C3
R2
The AD8418 is tested with and without the protection circuit.
Table 2 shows the calculated additional gain error and the actual
gain error of the amplifier.
VS
OUT
D1
C2
Common-Mode Rejection Ratio
VREF2
D2
GND
10Ω
12582-003
VCM
Figure 3. Overvoltage Protection Circuit with EMI Filters
There are two types of bandwidths to consider for this type of EMI
filter circuit—differential and common-mode. These bandwidths
are determined using Equation 3 and Equation 4, respectively.
Differential Filter Bandwidth (−3 dB) =
1
C1 × C2
2π × (R1 + R2 ) × 
+ C3 
 C1 + C2

(3)
Because current sense amplifiers are usually exposed to environments with high CMV, CMRR is one of the most important
specifications. CMRR assesses the ability of a device to reject
high CMVs and attain optimal accuracy and performance. It refers
to a measure of change in output voltage when equal voltage is
applied at the two input terminals of the amplifier. CMRR is
defined as a ratio of the differential gain to the common-mode
gain and is usually specified in decibels.
Use Equation 5 and Equation 6 to find the CMRR values for
both amplifiers.
CMRR =
Common-Mode Filter Bandwidth (−3 dB) =
1
2π × R1× C1
 20∆VCM 

CMRR = 20 log 
(4)
 ∆VOUT 


TRADE-OFFS IN SYSTEM PERFORMANCE
Adding series resistors to the input of the amplifier can degrade
certain performance parameters. In some amplifiers, R1 and R2
appear in series with internal precision resistors. In other amplifiers, offset currents work with the resistors to create offset
voltages. The parameters most likely to be affected are gain error,
common-mode rejection ratio (CMRR), and offset voltage.
The test setup used for evaluating gain error, CMRR, and offset
voltage is shown in Figure 4. This setup uses the Agilent E3631A
power supply for providing the 5 V single-supply to the device,
the Yokogawa GS200 precision dc source for the differential
input voltage signal, the HAMEG HMP4030 for setting the CMV,
and the Agilent 3458A precision multimeter for measuring the
output voltage of the current sense amplifiers.
AGILENT E3631A +5V
POWER SUPPLY
R1
HAMEG
HMP4030
The results indicate that the effect of the additional external
series resistors on CMRR performance impacts the AD8418 but
does not significantly affect the AD8210.
AGILENT 3458A METER
VREF1
OUT
R2
10Ω
D1
D2
(6)
The CMRR measurement results for the AD8210 and the AD8418
current sense amplifiers are shown in Table 3 and Table 4,
respectively.
VS
10Ω
(5)
where:
ADM is the differential gain of the AD8210 and the AD8418 (ADM =
20).
ACM is the common-mode gain, ΔVOUT/ΔVCM.
VREF2
GND
12582-004
YOKOGAWA
GS200
PRECISION
DC SOURCE
20 × ∆VCM
ADM
=
∆VOUT
ACM
Figure 4. Test Setup for Evaluating the Gain Error, CMRR, and Offset Voltage
Rev. 0 | Page 2 of 3
Application Note
AN-1318
Table 1. AD8210 Gain Error
R1 (Ω)
0
10.2
R2 (Ω)
0
10.2
Additional Gain Error (%)
0
0.497
Actual Gain (V/V)
19.9781
19.88059
Actual Gain Error (%)
−0.1095
−0.59705
Additional Gain Error (%)
0
0.013
Actual Gain (V/V)
19.99815
19.9955
Actual Gain Error (%)
−0.00925
−0.0225
Table 2. AD8418 Gain Error
R1 (Ω)
0
10.2
R2 (Ω)
0
10.2
Table 3. AD8210 CMRR Performance at a Gain of 20
R1 (Ω)
0
10.2
R2 (Ω)
0
10.2
CMV = 0 V and 4 V (dB)
−92.77
−94.37
CMV = 4 V and 6 V (dB)
−104.96
−107.99
CMV = 4 V and 65 V (dB)
−121.49
−121.86
CMV = 6 V and 65 V (dB)
−123.35
−123.10
Table 4. AD8418 CMRR Performance at a Gain of 20
R1 (Ω)
0
10.2
R2 (Ω)
0
10.2
CMV = 0 V and 35 V (dB)
−127.72
−88.89
CMV = 35 V and 70 V (dB)
−123.72
−104.35
CMV = 0 V and 70 V (dB)
−138.39
−93.05
Table 5. AD8210 Additional Offset Voltage Due to Input Offset Current and External Impedances
R1 (Ω)
0
10.2
R2 (Ω)
0
10.2
VOUT (mV)
5.598
5.938
Additional Offset Voltage (RTI) (μV)
17
17
Table 6. AD8418 Additional Offset Voltage Due to Input Offset Current and External Impedances
R1 (Ω)
0
10.2
R2 (Ω)
0
10.2
VOUT (mV)
−0.91
26.09
Additional Offset Voltage (RTI) (mV)
1.3
1.3
Offset Voltage
When bias currents pass through the external resistors, they
produce a voltage in series with the intrinsic offset voltage of
the device. To compute this additional offset voltage, multiply
the input offset current (IOS), the difference between the two
input bias currents, by the external impedance present on the
input pins, as shown in Equation 7.
Offset Voltage = IOS × R
(7)
where:
IOS is the input offset current.
R is the additional external impedance.
The increase in offset voltage based on the actual measurements
from both the AD8210 and the AD8418 current sense amplifiers
are shown in Table 5 and Table 6, respectively.
The results show that the increase in offset voltage in the AD8418
is larger than the increase in offset voltage in the AD8210. This
is caused by the considerably high input offset current of the
AD8418, which is around 100 μA. Any additional impedances
present on the input pins, together with the input offset current,
reflect as added offset voltage. Therefore, it is recommended to
use smaller values for the series resistors of the AD8418 to
minimize the effect on offset voltage.
CONCLUSION
Implementing additional series resistors on the input pins is the
simplest way to protect a current sense amplifier against overvoltage. The circuit gives the user extra headroom for the allowable
input voltage but at the cost of extra components. The amount
of impact on performance such as gain error, CMRR, and offset
voltage is measurable and largely related to the magnitude of the
total external resistors and the type of current sense amplifier used.
For more information on overvoltage protection for robust
amplifiers, see the Analog Dialogue article “Robust Amplifiers
Provide Integrated Overvoltage Protection.”
©2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
AN12582-0-3/15(0)
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