PIC18F87J93 FAMILY PIC18F87J93 Family Silicon Errata and Data Sheet Clarification The PIC18F87J93 family devices that you have received conform functionally to the current Device Data Sheet (DS39948A) and its “parent” data sheet (“PIC18F87J90 Family Data Sheet”, DS39933), except for the anomalies described in this document. The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs listed in Table 1. The silicon issues are summarized in Table 2. The errata described in this document will be addressed in future revisions of the PIC18F87J93 family silicon. Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated in the last column of Table 2 apply to the current silicon revision (A1). Data Sheet clarifications and corrections start on page 5, following the discussion of silicon issues. The silicon revision level can be identified using the current version of MPLAB® IDE and Microchip’s programmers, debuggers and emulation tools, which are available at the Microchip corporate web site (www.microchip.com). TABLE 1: For example, to identify the silicon revision level using MPLAB IDE in conjunction with MPLAB ICD 2 or PICkit™ 3: 1. Using the appropriate interface, connect the device to the MPLAB ICD 2 programmer/ debugger or PICkit™ 3. From the main menu in MPLAB IDE, select Configure>Select Device, and then select the target part number in the dialog box. Select the MPLAB hardware tool (Debugger>Select Tool). Perform a “Connect” operation to the device (Debugger>Connect). Depending on the development tool used, the part number and Device Revision ID value appear in the Output window. 2. 3. 4. Note: If you are unable to extract the silicon revision level, please contact your local Microchip sales office for assistance. The DEVID:REVID values for the various PIC18F87J93 family silicon revisions are shown in Table 1. SILICON DEVREV VALUES Part Number Revision ID for Silicon Revision(2) Device ID(1) A1 PIC18F66J93 0101 0000 010 PIC18F67J93 0101 0000 011 PIC18F86J93 0101 0000 110 PIC18F87J93 0101 0000 111 Note 1: 2: 0 0001 The Device IDs (DEVID and REVID) are located at the last two implemented addresses of configuration memory space. They are shown in hexadecimal in the format “DEVID:REVID”. Refer to the “PIC18F6XJXX/8XJXX Family Flash Microcontroller Programming Specification” (DS39644) for detailed information on Device and Revision IDs for your specific device. © 2009 Microchip Technology Inc. DS80476A-page 1 PIC18F87J93 FAMILY TABLE 2: SILICON ISSUE SUMMARY Module Feature Item Number Affected Revisions(1) Issue Summary A1 MSSP I2C™ Slave 1. If the SSPBUF register is not read within a window after the SSPIF interrupt, the module may not receive the correct data. X EUSART Enable/ Disable 2. If interrupts are enabled, disabling and re-enabling the module requires a 2 TCY delay. X RTCC INTRC clock 3. The INTRC clock is not automatically enabled when it is selected. X 4. If a Stop condition occurs in the middle of an address or data reception, there will be issues with the SCL clock stream and RCEN bit. X MSSP Note 1: 2 I C™ Mode Only those issues indicated in the last column apply to the current silicon revision. DS80476A-page 2 © 2009 Microchip Technology Inc. PIC18F87J93 FAMILY Silicon Errata Issues Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated by the shaded column in the following tables apply to the current silicon revision (A1). 2. Module: Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) In rare situations when interrupts are enabled, unexpected results may occur if: • The EUSART is disabled (SPEN bit (RCSTAx<7>) = 0) • The EUSART is re-enabled (RCSTAx<7> = 1) • A two-cycle instruction is executed 1. Module: MSSP (I2C™ Slave) In extremely rare cases when configured for I2C™ slave reception, the MSSP module may not receive the correct data. This occurs only if the Serial Receive/Transmit Buffer register (SSPBUF) is not read within a window after the SSPIF interrupt (PIR1<3>) has occurred. Work around Add a 2 TCY delay after re-enabling the EUSART. 1. Disable receive interrupts (RCxIE bit (PIE1<5>) = 0). 2. Disable the EUSART (RCSTAx<7> = 0). 3. Re-enable the EUSART (RCSTAx<7> = 1). 4. Re-enable receive interrupts (PIE1<5> = 1). Work around The issue can be resolved in either of these ways: (This is the first TCY delay.) • Prior to the I2C slave reception, enable the clock stretching feature. This is done by (SSPCON2<0>). setting the SEN 5. Execute a NOP instruction. bit (This is the second TCY delay.) Affected Silicon Revisions • Each time the SSPIF is set, read the SSPBUF before the first rising clock edge of the next byte being received. A1 X Affected Silicon Revisions A1 3. Module: Real-Time Clock and Calendar (RTCC) X The INTRC is not automatically enabled as the clock source for the RTCC module when the INTRC clock is selected (CONFIG3L<1> = 0) and the RTCC module is enabled (RTCCFG<7> = 1). Work around In order to enable the INTRC, at least one of the following has to be enabled: 1. 2. 3. Watchdog Timer Enable bit (WDTEN, CONFIG1L<0>). Two-Speed Start-up Enable bit (IESO, CONFIG2L<7>). Fail-Safe Clock Monitor Enable bit (FCMEN, CONFIG2L<6>). Affected Silicon Revisions A1 X © 2009 Microchip Technology Inc. DS80476A-page 3 PIC18F87J93 FAMILY 4. Module: MSSP (I2C™ Mode) In Master I2C Receive mode, if a Stop condition occurs in the middle of an address or data reception, the SCL clock stream will continue endlessly and the RCEN bit of the SSPCON2 register will remain set improperly. When a Start condition occurs after the improper Stop condition, nine additional clocks will be generated followed by the RCEN bit going low. Work around Use low-impedance pull-ups on the SDA line to reduce the possibility of noise glitches that may trigger an improper Stop event. Use a time-out event timer to detect the unexpected Stop condition and subsequently stuck RCEN bit. Clear the stuck RCEN bit by clearing SSPEN bit of SSPCON1. Affected Silicon Revisions A1 X DS80476A-page 4 © 2009 Microchip Technology Inc. PIC18F87J93 FAMILY Data Sheet Clarifications The following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS39948A). For corrections and clarifications for the “parent” data sheet, see the silicon errata and data sheet clarification document for the PIC18F87J90 family. Note: Corrections are shown in bold. Where possible, the original bold text formatting has been removed for clarity. None. © 2009 Microchip Technology Inc. DS80476A-page 5 PIC18F87J93 FAMILY APPENDIX A: DOCUMENT REVISION HISTORY Rev A Document (6/2009) Initial release of this document. Silicon issues 1 (MSSP – I2C Slave), 2 (EUSART), 3 (RTCC) and 4 (MSSP – I2C Mode). No data sheet clarifications. DS80476A-page 6 © 2009 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, nanoWatt XLP, Omniscient Code Generation, PICC, PICC-18, PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2009, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2009 Microchip Technology Inc. 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