Application Notes

AN10803
Triac dimmable CFL application using the
UBA2028/UBA2014/UBA2027x
Rev. 2 — 27 February 2012
Application note
Document information
Info
Content
Keywords
UBA2028, UBA2014, UBA2027x, dimmable, CFL, Triac, dimmer, charge
pump
Abstract
This application note describes how to design a dimmable CFL using the
UBA2028, UBA2014 or UBA2027x.
AN10803
NXP Semiconductors
Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
Revision history
Rev
Date
Description
v.2
20120227
second issue
•
Modifications:
v.1
20091009
Text and drawings updated throughout entire data sheet.
first issue
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
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1. Introduction
WARNING
Lethal voltage and fire ignition hazard
The non-insulated high voltages that are present when operating this product, constitute a
risk of electric shock, personal injury, death and/or ignition of fire.
This product is intended for evaluation purposes only. It shall be operated in a designated test
area by personnel qualified according to local requirements and labor laws to work with
non-insulated mains voltages and high-voltage circuits. This product shall never be operated
unattended.
This application note describes how to design a dimmable Compact Fluorescent Lamp
(CFL) circuit with the UBA2028, UBA2014 or the new UBA2027x series. The differences
between the versions are the ones that have integrated MOSFETs and controller versions
that use external MOSFETs. The versions with internal MOSFETs can drive burners to
18 W. Use the versions with external MOSFETs for larger burners. The control parts of the
different versions are identical, so the same calculation tools can be used.
Remark: Unless otherwise stated all voltages are AC.
The design of a Triac dimmable CFL is a complicated task. Interaction between the
dimmer and CFL, tolerances, aging of components and, last but not least the circuit must
not be expensive affects the dimming behavior. Most components serve multiple
purposes, so it is not always possible to choose the optimum value for each purpose.
There is no guarantee that the designed circuit works with all dimmers, because it is not
known in advance which dimmer type the CFL is connected to.
2. Triac dimmers
Virtually all domestic wall dimmers are phase cut dimmers. This means that the supply
voltage to the lamp is reduced with cutting the phase see Figure 1. In practice, this
condition is implemented by placing a switch. An example is a Triac in one of the supply
lines that is not conducting during a certain part or angle (see  Figure 1) of the mains
period. Effectively, this reduces the RMS voltage supplied to the lamp.
Vmax
φ
φ
019aab989
Fig 1.
AN10803
Application note
Phase cut sine wave
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Phase cut dimming with a Triac works very well for dimming incandescent lamps.
However, dimming CFL lamps with this principle is more complicated due to the
interaction between the dimmer and the CFL. It is important to understand how a wall
dimmer works before designing a dimmable CFL lamp. Figure 2 shows the circuit diagram
of a basic wall dimmer with Triac.
incandescent
lamp
470 kΩ
L
2.7 kΩ
diac
K2
triac
230 V AC
K1
100 nF
N
019aab960
Fig 2.
Basic 230 V dimmer
The capacitor is charged via the combination of a fixed and a variable resistor. The
dimming angle is set with the variable resistor. When the resistance is low, the capacitor is
quickly charged until the breakover voltage of the Diac. The Triac is then triggered and
immediately a current starts to flow from k1 to k2. This current continues to flow until the
Triac blocks when the current drops below the minimum hold current IH. As the
incandescent lamp is a resistive load, this occurs at the zero crossing of the mains input.
The Triac is a bidirectional device that works in two quadrants (see Figure 3), so the same
process is repeated during the negative half cycle.
I
latching current lL
breakover
voltage
minimum holding
current lH
gate triggering range
-V
V
minimum holding
current lH
breakover
voltage
latching current lL
-I
Fig 3.
AN10803
Application note
019aab982
Typical Triac VI characteristic curves
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
Normal operation of the dimmer requires the presence of a conducting or charging path
for Cdim when the Triac in the dimmer is not conducting. It requires a low ohmic load for
sustainable conduction of the Triac when the Triac is conducting. The incandescent light
bulb see Figure 2 provides all of this. The situation is different when a CFL or other load
that contains a bridge rectifier is connected. It depends on the moment of switch-on to
determine if current flows through the Triac. This is only the case when the (momentary)
input voltage is higher than the DC bus voltage. See Figure 5.
DIMMER
CFL
470 kΩ
2.7 kΩ
VBUS
Cdim
L
100 nF
load
Cbus
N
019aab961
Fig 4.
Basic dimmer with CFL
The Triac switches off when the current drops below the hold current IH. Here it is not the
moment at which the input voltage crosses zero, but the moment where the momentary
input voltage drops below the DC bus voltage. In practice, this moment is soon after the
Triac is switched on.
Most of the time, the bridge diodes are not conducting, so there is no conductive path to
charge the capacitor in the dimmer. This is fine when the dimmer phase cut is set to a very
small angle and Cdim charges enough to trigger the Triac within the period that the mains
is higher than the bus voltage. However, when the phase cut is set to a larger angle the
charge of Cdim is not completed in a single half cycle and triggering of the Triac is at
irregular intervals as shown in Figure 5.
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
VBUS
VMAINS
time too short
to charge Cdim
ITRIAC
Triac triggered
VCdim
019aab974
Fig 5.
Input voltage and current when large dimmer phase cut is set
The result is that the Triac is triggered at irregular moments resulting in the input voltage
of the CFL is irregular. The dimming level of the lamp is retrieved from the input voltage,
so an irregular input voltage results in an irregular dimming level or lamp flicker.
The latch current threshold of the Triac must be exceeded before the gate trigger current
is removed. The current through the Triac must be maintained above the Hold current
threshold IH, until the next zero crossing of the mains voltage to ensure a smooth
operation of the dimmer. A hold current of 15 mA to 20 mA is sufficient for most dimmers.
A simple solution that generates the hold current, is to place a resistance across the input.
However, the hold current must also flow at low input voltages, so the resistance must be
very low resulting in huge losses. For that reason, a current source behavior is required.
This can be realized with a Power Factor Corrector (PFC). It can either be a boost
converter or a charge pump-based PFC. In the latter solution, a capacitor is used as an
energy storage element to draw current from the mains at low voltages. The practical
implementation consists of two diodes and a capacitor and is discussed in detail in
Section 3.3. This application note addresses the charge pump solution because it is the
most cost effective solution.
The charge pump circuit enables a conductive path as long as the lamp is on. However, if
the phase cut angle is set too large, the supplied voltage becomes too low for the circuit to
maintain the lamp current and the lamp turns off. Now there is no conductive path any
more through the CFL to charge Cbus in Figure 4. In practice, there is some leakage
through the filter components in the dimmer, so after some time the Triac is fired. Then it
depends on the potentiometer setting in the dimmer if the CFL starts, or begins in a flash
mode. This start-up behavior heavily depends on the design of the dimmer.
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
3. Designing the application
3.1 Block diagram
Figure 6 shows the block diagram of the dimmable CFL with charge pump. The phase cut
mains voltage is supplied to the CFL. The input voltage is rectified and supplied to the
inverter, and also used for detecting the phase cut adjustment of the dimmer. This is done
by measuring the average input voltage and supplying it to the control input of the inverter
control IC. That is, the CSP pin of the UBA2014 or UBA2028 and the DCI pin of the
UBA2027x. The dimmer phase cut detection must be non-linear. That is, the lamp must be
dimmed to 10 % before the bus voltage becomes too low and the inverter switches off due
to low supply voltage.
voltage source charge pump
CFL
INVERTER
mains
DIMMER
FILTER
DIMMER
PHASE CUT
DETECTOR
019aab963
Fig 6.
Block diagram of the charge pump CFL dimmer
In practice, the lamp must already be dimmed to 10 % at 120 degrees phase cut and
preferably maintain the lowest dim level to 130 degrees. Beyond that value, the lamp is
off, but the inverter is still switching and providing a charge pump current. Without the
charge pump current, the CFL input is high (ohmic), and the input voltage is no longer a
reliable representation of the dimmer position.
3.2 Resonant tank
Once the gas in the CFL tube is ionized however, its impedance becomes negative. This
means that the more current is flowing through the tube, the more conductive it becomes
The increased current increases the degree of ionization of the gas. Therefore, add some
form of current limiter to the lamp to prevent the current increasing to a level where the
tube is destroyed.
An inductor is placed in series with the tube therefore, the tube is supplied with a current,
rather than with a voltage. A capacitor is placed in parallel to the tube that creates a
resonant circuit or resonant tank in combination with the series inductor to ignite the tube.
Before ignition, the lamp impedance is almost infinite, so the quality factor of the resonant
tank is high. At start-up and before lamp ignition the switching frequency is above the
resonance frequency and goes down in frequency until the tube ignites.
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
019aaa341
3
Vlamp / Vhb
(V)
2
(1)
(1)
1
(2)
0
0
20
40
60
80
f (kHz)
Fig 7.
Transfer of resonant tank versus frequency before and after ignition
For the calculation of the resonant tank, the first harmonic approach is used. This
approach works well, especially near the resonant frequency. Equation 1 shows the RMS
value of the first harmonic of the half-bridge voltage.
2
1 4 V BUS
V I  RMS  = ------- --- ------------ = ------- V BUS
2


2
(1)
The input parameters for the first estimation of the resonant tank are as follows:
•
•
•
•
•
Nominal lamp current
Nominal lamp voltage
Nominal operating frequency
Minimum bus voltage
The phase angle  between the input voltage and current of the resonant tank
VLR
LR
VI
1 ILamp
VI
CR
REQ
VLamp
2
ICR
II
ILamp
VLamp
019aab980
Fig 8.
Schematic resonant tank and vector diagram
An equivalent resistor (REQ) is calculated from point 1 and 2. Equivalent resistance is only
valid at nominal lamp power. The operating frequency (fnom) at nominal lamp power, is set
between 40 kHz and 50 kHz.
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It is important to guarantee Zero Voltage Switching (ZVS) of the half-bridge stage to have
low losses in the switching devices in the half-bridge driving the resonant tank. Therefore
the resonant tank must have an inductive behavior, so the input current must lag the input
voltage. The larger the phase angle between the input current and voltage, the easier it is
to maintain ZVS. However, when the phase angle is made too large, the losses become
potentially high. In general a value between 30 and 45 degrees is chosen.
The voltage transfer of the resonant tank is:
V lamp
1
----------------- = -------------------------------------------------------------------------L
2
V I  RMS 
 1 –  nom LC  + j   nom ----------

R EQ
with
 nom = 2f nom
(2)
The tangent of the phase angle  between the input voltage and current of the resonant
tank, is as calculated in Equation 3:
2
L –
tan  =  nom ---------  nom R EQ C +  nom R EQ LC
R EQ
(3)
When these two equations are combined, the capacitance value can be calculated using
Equation 4:
2
2
2
2
– V I  RMS  + V lamp + V lamp tan 
C = --------------------------------------------------------------------------------------V I  RMS  R EQ  nom
(4)
The value of the inductor is as calculated in Equation 5:
tan  +  nom R EQ C
L = -------------------------------------------------- nom
2
3
------------ +  nom R EQ C
R EQ
(5)
Now the inductor and capacitor values are fixed and the dimming behavior can be
determined.
The control loop of the inverter works by setting a reference value for the lamp current. It
adapts the half-bridge frequency until the desired lamp current is reached. Because of the
negative impedance of a fluorescent lamp, the lamp voltage decreases when the lamp
current increases. The exact relation between lamp current and lamp power depends on
the lamp type. The lamp type must be known to calculate the relation between lamp
power and frequency. The relation between lamp power and operating frequency is given
in Equation 6:
V la I la
AN10803
Application note
V la 
V la  2
------- 1 +   ------C
 I la  
I la 
= ------------------------------------------------------------------------------------------------------V la 2
V la 2 2
V la 2 
3
 ------ + L –   ------ C +  L  ------ C
 I la 
 I la 
 I la  

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Solving Equation 6 yields:
1
2
2 2
3
2
2
4 4
2 2
2 2
f = ------------------------------ 2LCV la – L I la + – 4L CI la V la + L I la + 4L C V la V I
2 2LCV la
(7)
With this equation, the power can be plotted versus frequency. See Section 5.
3.3 Charge pump circuit
The charge pump circuit is used in many applications to improve the power factor of the
CFL. In this application, it is also used to draw hold current through the Triac to keep the
Triac on, following ignition.
In an ordinary rectifier with an inverter, current is only drawn from the mains at around the
maximum input voltage. Figure 9 shows an inverter with a voltage source charge pump.
Adding two Hi-Speed DX and DY diodes and a capacitor CX, makes it possible to draw
current from the mains during the whole cycle. The CFL inverter with charge pump power
feedback (see Figure 9) is replaced by its equivalent circuit (see Figure 10). A voltage
source represents the lamp voltage, the rectified mains voltage and the voltage across the
bus electrolytic capacitor.
DX
DY
CX
VMAINS
LR
CDC
CBUS
VI
CR
VBUS
lamp
019aab964
Fig 9.
CFL inverter with charge pump power feedback
The lamp voltage or equally the voltage across CR (see Figure 9) can also be considered
a high-frequency voltage source. Therefore Vla is equal to the lamp voltage and Cx can be
connected to this point.
The capacitance Cx is charged from VI via Dx and is discharged to VBUS via DY. A charge
package is “pumped” from VI to VBUS in each inverter switching cycle of Vla. VI is the
rectified mains voltage that has a ripple that is twice the mains frequency.
The parameter of interest is the average current during one inverter switching cycle (II(ave))
that is drawn from the mains. In Ref. 1, it is shown that this current is calculated with the
following equation:
I I  ave  = C x f s  V I + 2V lamp – V BUS 
(8)
Where:
• fs is the inverter switching frequency
• Vlamp is the amplitude of the lamp voltage
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Equation 8 shows that the input current is following the input voltage when the
peak-to-peak lamp voltage (= 2 Vlamp) is equal to the bus voltage. The power factor is
equal to 1 in this situation (unity power factor condition).
DY
II DX
CX
Vi
Vla
VB
Req
019aab966
Fig 10. Equivalent circuit of a voltage source charge pump
When Cbus Figure 9 is directly charged from the mains, both diodes Dx and DY are
conducting and Cx is then directly in parallel with CR. Therefore by connecting Cx to the
resonant tank, Cx highly modulates it during a switching cycle. The total capacitance that
is in parallel to the lamp is given in Equation 9.
 V I + 2V lamp – V BUS 
C EQ = C R + C X ---------------------------------------------------2V lamp
(9)
Equation 9 reduces to Equation 10 when 2 Vlamp = VBUS:
VI
C EQ = C R + C X -----------V BUS
(10)
The use of a voltage source charge pump circuit has some drawbacks:
Unity power factor is only obtained when Vbus = 2 Vlamp. However, this can only be fulfilled
when the lamp is operating at a constant level and is not dimmed. When the lamp is
dimmed, the frequency goes up and the tube voltage rises because of negative
incremental impedance of the tube. The unity power factor condition is not fulfilled any
more. The voltage across the tube is not only much higher when the lamp is dimmed, but
also when the lamp is in the preheat or ignition phase.
Both are considered as low-power situations and cause the charge pump to absorb a lot
more energy from the mains than the load consumes. This extra energy is stored in the
buffer capacitor Cbus. It causes the bus voltage to exceed 800 V which is much higher
than the voltage rating of the bus capacitor and driver IC.
Another drawback is the modulating effect of Cx on the resonant tank. This causes the
crest factor of the lamp to become as high as 2.6, reducing lamp life and increasing the
possibility of visible lamp flicker. A crest factor of 1.7 is preferred.
A way to reduce these problems is to place an extra capacitor across DY. This capacitor
improves the crest factor to a value of 1.6. It reduces bus voltage stress by 60 % while still
providing a cost effective way to produce the necessary hold current for a dimmable CFL
application.
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This all comes at a price of 1.6 times higher current stress on the half-bridge switches so
this technique is most suited for the drivers with external output devices. See Ref. 3 for
more information on the voltage source charge pump with improved crest factor
(VSCP with ICF).
CY
DY
II DX
CX
Vla
Vi
VB
aaa-002499
Fig 11. VSCP with ICF
Another voltage source charge pump which can be considered is the voltage source
charge pump with low-frequency second resonance (VSCP with LFSR). This topology
uses more components and two inductors. However, it has a good power factor and a low
bus voltage stress over the full dimming range:
DX
DY
LR2
VMAINS
CX
CDC
DR1
LR1
CBUS
VI
CR
lamp
Cp
VBUS
DR2
aaa-002500
Fig 12. VSCP with LFSR
3.4 Voltage doubler and charge pump for 120 V input
When the mains voltage is 120 V, then the bus voltage is too low to supply the lamp. For
that reason, a voltage doubler is used instead of a full bridge rectifier. Figure 13 shows the
voltage doubler circuit. CH is charged during the positive half-cycle and during the
negative half-cycle CL is charged. If there is no load, the bus voltage becomes equal to
the mains peak-to-peak voltage.
CH
VMAINS
VBUS
CL
019aab984
Fig 13. Voltage doubler circuit
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The electrolytic capacitors in this circuit have a double capacitance and half the voltage
with reference to the 230 V circuit. Figure 14 shows the voltage doubler combined with the
charge pump circuit. A symmetrical voltage source charge pump replaces both rectifier
diodes. The two top left diodes charge energy into CH at the positive half cycle of the
mains. The two left bottom diodes charge energy into CL during the negative half cycle of
the mains (see Figure 14). Instead of using two high-voltage charge pump capacitors
driving each charge pump from the resonant tank, a single high-voltage charge pump
capacitor and an AC coupling capacitor between the two charge pumps are used.
Because only one set of diodes is conducting during each half mains cycle, the energy
stored in Cp is automatically stored to either CH or CL only, depending on the mains
polarity.
A coupling capacitor of 100 nF is more than sufficient to have a neglecting influence
compared to the value of Cp. By using only a single capacitor CY a charge pump with
improved crest factor is created.
CX
CY
CH
CAC
VMAINS
VBUS
CL
019aab983
Fig 14. Voltage doubler with charge pump circuit
3.5 Current feedback control loop
With the UBA2014 or the UBA2028, it is easy to control the lamp current as a controller is
implemented in the IC.
VBUS
UBA2014
UBA2028
UBA2027x
VCONTROL
DCI
VBUS
VCONTROL
CSP
VCO
DCI
CDC LR
CSN
lamp
CSW
CR
OTA
VCO
CDC LR
lamp
CSI
VSENSE
RSENSE
CR
VSENSE
RSENSE
019aab967
Fig 15. Current feedback control loop
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The lamp current is measured across a sense resistor. The UBA2014 and UBA2028 are
single-sided rectified externally. The UBA2027x family is double-sided rectified internally.
The measured value is compared with a control voltage that is applied to the CSP pin. The
control loop changes the half-bridge frequency until the measured voltage is equal to the
control voltage, so the RMS lamp current can be calculated with:
For UBA2014 and UBA2028:
 V control
I lamp  RMS  = ------- -----------------2 R SENSE
(11)
Due to UBA2027x families' overpower protection, the maximum RMS lamp current is
limited to:
1
I lamp  RMS  = -------------R sense
(12)
In the Triac dimmable CFL application, the control voltage is derived from the average
mains voltage in the dimmer position detector.
3.6 Dimmer phase cut detector
The control voltage for the current feedback control loop is derived in the dimmer phase
cut detector. The dimmer phase cut detector is based on average voltage detection of the
phase cut mains voltage and converted to a lower voltage average reference voltage. The
average reference voltage is supplied to the CSP pin in case of UBA20214/UBA2028 and
the DCI pin in case of the UBA2027x family.
Ideally, the lamp lumen is linear with the position of the dimmer control. Figure 6. The
human eye is more sensitive to small light changes at low lumen level, than to large light
changes at high lumen levels. The lamp current has a direct linear relation to the lamp
lumen output. When the phase cut dimming angle is detected by using an average voltage
detection, the result is that the average control voltage curve follows a cosine function.
The cosine slope has a small level change at the high lumen levels and a large change at
mid to low lumens.
Typically the UBA2014 and UBA2028 have a linear control voltage to lamp current
transfer (see Figure 16 left image). The response to a dimmer is observed as less natural
because the dimmer must be set halfway to notice response in the lumen output of the
lamp. Also, the lower dim levels are more difficult to control. A way to overcome this
problem is using extra diodes in the lamp current sense which helps at the lower dim rage.
However, a better solution is to make the control voltage to lamp current transfer function
non-linear.
This is what has been implemented in the UBA2027x family, its transfer function is shown
on the right of Figure 16. It is called the natural dimming transfer function and makes
better use of the control rage of the dimmer.
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light
output
light
output
max.
max.
phase cut
angle
min.
phase cut
angle
min.
max.
max.
019aab968
Fig 16. Dimming curve UBA2028 versus UBA2027
Figure 17 shows the phase cut angle detection for a double sided rectified mains voltage,
typically used in 230 V applications and 120 V applications that sweep up the lamp
voltage in the resonant tank.
470 kΩ
470 kΩ
100 kΩ
BAS20
100 kΩ
CSP/DCI
33 kΩ
1.0 μF
39 kΩ
470 nF
019aab965
Fig 17. Dimmer phase cut detector circuit for rectified mains supply
Figure 18 is a typical circuit that is used for single side rectified 120 V voltage doubler
applications.
VDC
CB1
33 nF
220 kΩ
220 kΩ
39 kΩ
VMAINS
100 kΩ
BAS20
100 kΩ
CSP/DCI
CB2
0
VMAINS + VDC / 2
100 kΩ
100 kΩ
1.0 μF
39 kΩ
470 nF
BAS20
019aab975
Fig 18. Input voltage measurement in voltage doubler
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3.7 Supply of the IC and ACM for UBA2028 and UBA2014
Before start-up the supply electrolytic capacitor is charged via the start-up resistor to the
DC bus voltage. The IC starts when the supply voltage exceeds VDD(start). Then the
half-bridge starts to switch and the IC is supplied via the dV/dt capacitor that is connected
to the half-bridge. The supply current of the IC and the charge required to drive larger
MOSFETs determine the value of this capacitor. The IC needs more supply current which
requires a larger dV/dt capacitor.
On the other hand, if the dV/dt capacitor is too large, the half-bridge can be hard switching
at the higher frequencies. In most cases, a value of 470 pF is a good compromise
between these two mechanisms. A larger CdV/dt also has a positive influence on the EMI
as it slows down the rise and fall times of the half-bridge switching pulses. A small
capacitor is placed in parallel with the 12 V Zener diode, so it does not overload if CdV/dt is
larger than required to supply energy to the IC. This capacitor also determines at which
bus voltage level the IC stops oscillating. This to create a flicker free operation of the lamp
by using the hysteresis on the VDD pin of the IC.
A Zener diode clamps the voltage, which is supplied to the supply electrolytic capacitor via
a diode. This must be a diode with a fast recovery.
VBUS
GH
SH
TH
RSTARTUP
resonant tank
and lamp
CdVdt
GL
VDD
TL
Coff
12 V
RPCS
RACM
ACM
PCS
019aab970
Fig 19. IC supply circuit
The UBA2014 and UBA2028 have an adaptive non-overlap function and a capacitive
mode detection that measure the charging current of the dV/dt capacitor by measuring the
voltage across RACM. This voltage is supplied to the capacitive mode detection input. For
more information on this function, consult the respective data sheet.
3.8 Preheating
Before ignition, the tube resistance is infinite. However, the resonance inductor has two
auxiliary windings that are used for heating the filaments, so the quality factor of the
resonant tank is high, but not infinite. The half-bridge frequency starts at fmax and is swept
down until the voltage on the PCS/SLS pin reaches the VPH level of 0.6 V. The frequency
sweep stops. The current in the resonant tank is kept constant for the duration of the
preheat time, which is defined with the value of the preheat capacitor connected to the
CT/CP pin.
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NXP Semiconductors
Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
freq
(kHz)
fmax
fprh
fnom
fmin
t (ms)
tpreheat
019aab969
Fig 20. Frequency versus time during start-up
During the preheat time, the current is controlled by regulating the half-bridge frequency
so that the voltage on the PCS/SLS pin stays constant. This means that the half-bridge
current is kept constant. The value of this current can be adapted by changing the vale of
the PCS/SLS resistor. Take care that the tube voltage does not become too high during
preheat time. Generally, it must be less than half the ignition voltage. Tube voltage that is
too high can cause an early uncontrolled ignition in the preheat phase.
10000
Vlamp(off)
V
1000
lgnition
Vlamp(on)
100
10
150
mA
Ilamp
100
50
0
30
40
50
60
70
80
90
100
110 120 130
kHz
019aab981
Fig 21. Transfer of the resonant tank
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
After preheating, the frequency sweeps down and during this part of the sweep the
voltage across the lamp rises further and the lamp ignites. The UBA2014 and UBA2028
always sweep down to fmin. The UBA2027 detects a lamp current and stops the sweep
and immediately goes to fnom (see Figure 20). The tube is now a resistive element in
parallel to the capacitor in the resonant tank. This changes the quality factor of the
resonant tank. Figure 21 shows this situation (blue line (Vlamp(on))). After the frequency
reaches fmin or the current in the tube has been detected, the lamp current control loop
takes over the tube current control.
When inductive preheat is used (the only option for the UBA2027), the resonance inductor
is in fact a three winding coupled inductor. A series capacitor can be used for tuning the
preheat current into constant power to the filament during preheat. A resistor and a
capacitor in parallel to the resonance inductor can represent the preheat circuit. The
coupling between the windings is assumed to be perfect.
Itot
CFIL
3
La
1
2
Lr
La
Vin
Cr
RFIL
4
5
6
Ifp
Ifp = 2 ×
CF = 2 ×
La
Lr
La
Lr
× IFIL
× CFIL
Lr
CFIL
RF =
1 Lr
×
× RFIL
2 La
RFIL
Cr
019aab979
Fig 22. Preheat circuit
The equation of interest is the relation between the half-bridge current (Itot) and the
preheat current (Ifil), because the value of Itot during preheat is fixed with the value of the
PCS/SLS resistor. The resulting value of Ifil can be calculated with Equation 13:
1 Lr
1 Lr
--- -----i fp
--- -----jL r
I fil
2 La
2 La
------ = -------------- = ----------------------------------------I tot
I tot
1
jL r + ----------- + R f
jC f
(13)
Equation 13 leads to:
4
4
2
 Lr Cf
I fil
1
- ----------------------------------------------------------------------------------------------------------- = -2
2
2
4
2 2 2
2
2
I tot
L a  L r C f  + R f C r  – 2L r C r  + 1 
(14)
This equation does not contain Cr.
The total current that is drawn from the half-bridge is:
2
3
Cr Cf Rf  + j  Lr Cr Cf  – Cr  
I tot = --------------------------------------------------------------------------------------------------------------------V
I
2
2
3
Lr Cr  + Lr Cf  – 1 + j  Lr Cr Rf Cf  – Rf Cf  
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
The resistance of the filament is not constant. During preheating, the resistance of the
filament becomes ideally 4.75 times higher than the cold resistance. Changing the value
of the resistance in the equations above shows that the filament current is almost
independent of the filament resistance. However, the filament current strongly depends on
the frequency, and the voltage across the inductor is almost a square wave. This means
that the preheat current contains numerous higher harmonics that are present in the
half-bridge voltage. High dV/dt gives a high preheat current. So if the bridge is hard
switching, then there is a large preheat current flowing through the filaments. It is more
practical to simulate the preheat circuit in spice than to calculate it in a spreadsheet
application. A simulation also shows the switching behavior of the half-bridge.
During dimming, the lamp current decreases and subsequently the current through the
filaments also decreases. The result is that the filaments become colder and the emission
of electrons becomes more difficult. For that reason additional heating of the filaments is
required, which the auxiliary windings provide. The way of connecting the auxiliary
windings to the lamp is important: depending on the connection the additional current is
added or subtracted from the lamp current that also flows through the filaments (see
Ref. 2.). This mechanism can be used to adapt the heating current to the specification of
the lamp.
3.9 Input filtering
The half-bridge, and to a larger extent the charge pump, are drawing a high frequency
current from the mains. Filter out the HF current because it causes EMI problems.
Figure 23 shows a basic input filter. The inductor is blocking the high frequent current the
charge pump circuit is drawing. The capacitor is providing a low ohmic path for this
current.
II (t)
L
VI (t)
R
C
ICP
019aab962
Fig 23. Basic input filter
The damping of the HF components is calculated using Equation 16
II   
1
Damping = 20 log ---------------- = 20 log -------------------------------------------------------2
2
2
I CP   
 1 +  LC  +  RC 
(16)
Assuming that:
• L = 10 mH
• C = 47 nF
• R = 10 
For 50 Hz, the damping is 0 dB, for 50 kHz the damping is 66 dB.
For CFL lamps that are not placed behind a dimmer, this circuit works well. However due
to the voltage steps in the phase cut input voltage, there is ringing of the input current.
When the input current drops below the hold current during this ringing (or even crosses
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
zero), then the Triac is turned off. After some time, the Triac is triggered again and
switches off again. This process repeats until the load current is so large that there is no
more zero crossing of the mains current. This phenomenon is called multiple triggering or
firing and it is shown in Figure 24
VMAINS
100 V/div
RMS
122.293 V
IMAINS
0.5 A/div
RMS
245.947 V
5 ms/div
019aab978
Fig 24. Mains voltage and mains current with multiple firing of the Triac
The mains current when a voltage step Vstep is applied to the system is calculated as
shown in Equation 17: and Equation 18
V step
i  t  = -------------- e
 res L
R
– --------2
2L
sin  t  + I CP I
(17)
with
 res =
2
 1
R 
 ------- – --------2-
 LC 4L 
(18)
If the charge pump circuit current (ICP) rises very quickly after the voltage step and ICP is
larger than the negative amplitude of the ringing, there is no zero crossing and hence no
multiple firing.
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NXP Semiconductors
Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
I
(mA)
ICP
IRING
3T/4
0
t (ms)
T/4
019aab971
Fig 25. Input current ringing
Example:
•
•
•
•
•
•
•
•
Vstep = 40 V
L = 10 mH
C = 47 nF
R = 10 
res = 46126
fres = 7.3 kHz
T = 136 s
3T/4 = 102 s
The peak current at 3T/4 is: 40  2.16  10 3  0.95 = 82 mA.
In order to prevent ringing, the charge pump must switch on immediately and draw a
current larger than 82 mA after 102 m. If the charge pump circuit does not rise fast
enough, some other measures can be taken to reduce multiple firing. One solution is to
place an RC combination can be placed across the input. In that way, a current is added
to II (see Figure 26).
L
II (t)
R
RI
VI (t)
RDC
C
ICP
CI
019aab972
Fig 26. Input filter with AC load
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NXP Semiconductors
Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
The drawback of the circuit in Figure 26 is that the filter capacitor CI is very large, as it
must be a high-voltage type. The resistor is large too because it must handle a power of
1 W. Furthermore, it adds some reactive power slightly decreasing the power factor.
LFILTER
VMAINS
CFILTER
CChargepump
019aab973
Fig 27. Input filter placed after rectifier bridge creates the Constant Input Current (CIC)
topology
In Figure 27, resistor RDC is in parallel to the filter capacitor. This resistor can be added to
provide a DC path for charging the capacitor or supplying current to electronics inside a
dimmer that fires the Triac.
4. Circuit diagrams
The next three paragraphs show the circuit diagrams for the dimmable CFL applications
for 230 V and 120 V mains voltage. These circuit diagrams were tested with one burner
type and with different dimmers. So with a different burner or specific dimmers some
components have to be adapted. In most cases, it means modifying the resonant tank and
the charge pump capacitor. Section 5 shows a calculation example for the resonant tank.
In this example, the lamp voltage is assumed to be constant during dimming. Take the
lamp characteristics into account when more accurate results are required.
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
4.1 Circuit diagram for the UBA2027 application
D5
D7
D6
FS
C3
CCB
CB
C9
L2
C4
R5
GHS
C6
R1
D1
L1
C20
C1
C16
HBO
D2
CFL
C10
C2
C19
R11
UBA20270
GLS
D4
D8
C7
R2
CI
VDD
D9
C11
D3
CCP
CP
R6
MDL RMDL
C15
TR1
SLS
C5
C12
D11
C14
RREF RREF
C8
R9
C17
RSLS
R3
CSI
R7
RCSI
CCF
DCI
R10
D10
R4
CF
C13
R8
C18
PGND SGND
001aam672
Fig 28. UBA2027 circuit diagram
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NXP Semiconductors
AN10803
Application note
4.2 Circuit diagram 230 V input for the UBA2014 application
C12
3.3 nF
1000 V
230 V AC
50 Hz
L_L
L2
10 mH
R1 fusistor
4.7 Ω
1W
R3
560 Ω
C1
220 nF
250 V
L_N
D1
1N4007
D2
1N4007
D5
D6
1N4937
1N4937
C9
100 nF
400 V
R30
220 kΩ
R31
220 kΩ
C3
22 nF
400 V
R2
100 kΩ
C3
22 nF
400 V
L1
1.5 mH
C20
D4
1N4007
D3
1N4007
R20
T1
3N60
220 nF
1 kΩ
C21
C21
220 nF
VDD
CT
CSW
10 nF
C23
100 pF
CF
R21
33 kΩ
IREF
VREF
CS+
R41
220 kΩ
CSD40
C31
2.2 μF
7
1
9
FVDD
L10
10 GH
2
11
3
6
UBA2014
4
8
14
12
15
13
16
5
D30
1N4148
C25
100 nF
SH
GL
T2
3N60
PCS
C32
470 pF
400 V
C33
1 nF
3 mH
C11
L10A
L10B
20 μH
20 μH
C14
22 nF
68 nF
C10
1.5 nF
1000 V
21 W
D31
12 V
ACM
LVS
GND
R27
1Ω
R34
2.7 Ω
D41
D51
R51
C40
4.7 μF
4.3 V
R42
12 kΩ
C15
22 nF
CFL
1N4148
R43
47 kΩ
C41
4.7 μF
1 kΩ
C51
1 nF
R50
33 Ω
C52 1N4935 D50
1 μF
1N4935
019aab959
Fig 29. 230 V circuit diagram
AN10803
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
Rev. 2 — 27 February 2012
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R40
220 kΩ
C30
100 nF
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AN10803
Application note
4.3 Circuit diagram 120 V input for the UBA2014 application
C12
120 V AC
60 Hz
D2
1N4937
L_L
R1 fusistor
4.7 Ω
1W
R3
560 Ω
L_N
C1
220 nF
250 V
3.3 nF
1000 V
R2
100 kΩ
C2
47 nF
400 V
D3
1N4937
R31
220 kΩ
C3
100 nF
400 V
C7
47 μF
400 V
L1
10 mH
C8
47 μF
400 V
D4
1N4937
C30
100 nF
C20
R20
1 kΩ
VDD
C21
CT
220 nF
C23
CF
100 pF
R21
IREF
33 kΩ
R40
68 kΩ
VREF
CS+
R41
68 kΩ
D43
1N4148
D40
D41
4.3 V
1N4148
R42
22 kΩ
R44
CS-
R45
33 kΩ
33 kΩ
R43
22 kΩ
C41
4.7 μF
7
1
9
FVDD
11
3
6
UBA2014
4
8
14
12
15
13
16
5
D30
1N4148
L10
10 GH
2
T1
3N60
C25
100 nF
SH
GL
T2
3N60
PCS
C32
470 pF
400 V
C33
1 nF
3 mH
C11
68 nF
L10A
L10B
20 μH
20 μH
C14
22 nF
C10
1.5 nF
1000 V
21 W
D31
12 V
ACM
LVS
GND
R27
1Ω
R34
2.7 Ω
D51
R51
C42
4.7 μF
C15
22 nF
CFL
1 kΩ
C51
1 nF
R50
33 Ω
C52 1N4935 D50
1 μF
1N4935
019aab958
Fig 30. 120 V circuit diagram
AN10803
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© NXP B.V. 2012. All rights reserved.
Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
Rev. 2 — 27 February 2012
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CSW
10 nF
C45
100 nF
400 V
C31
2.2 μF
220 nF
C21
C40
100 nF
C9
100 nF
400 V
R30
220 kΩ
D1
1N4937
AN10803
NXP Semiconductors
Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
5. Resonant tank calculation example
Typical lamp power versus frequency calculations as used in a mathematical design
application are as follows:
Input data:
Vbus = 300, fop = 45  103, Ilamp_nom = 140  10-3, Vlamp_nom = 130,  = 35
1 4 V bus
V 1_RMS = ------- --- ---------2  2
(19)

V1_RMS = 135.047,  = --------- ,  = 0.611 , op = 2 fop, op = 2.827  105
180
V lamp_nom
Plamp = Ilamp_nom Vlamp_nom, Plamp = 18.2, R eq = ----------------------- , Req = 928.571
I lamp_nom
2
2
2
2
– V 1_RMS + V lamp_nom + V lamp_nom tan  
C = --------------------------------------------------------------------------------------------------------------------- , C = 2.351  10-9
V 1_RMS R eq  op
tan    +  op R eq C
L = ---------------------------------------------- , L = 3.133  10-3,
 op
2
3
--------- +  op R eq C
R eq
1 1
f res = ------ ------2 LC
, fres = 58.64  103
The lamp voltage is assumed to be constant: Vla = 130, Ila = 0.001, 0.011. 0.3
1
f  I la  = ------------------------------------2 2  L C V la
2
2
2
3
2
2
4
4
2
2
2
2 L C V la – L I la + – 4 L C I la V la + L I la + 4 L C V la V l_RMS
2
P la  I la  = V la I la
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Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
019aab977
25
P1a
(W)
20
P1a I1a
15
10
5
0
40
50
60
70
80
90
100
f I1a (kHz)
Fig 31. Lamp power versus frequency graph
6. Abbreviations
Table 1.
Abbreviations
Acronym
Description
CFL
Compact Fluorescent Lamp
CMP
Capacitive Mode Protection
EMI
ElectroMagnetic Interference
MDL
Minimum Dimming Level
PFC
Power Factor Correction
RMS
Root Mean Square
ZVS
Zero Voltage Switching
7. References
AN10803
Application note
[1]
Charge Pump Power-Factor-Correction Dimming Electronic Ballast Jinrong Qian, Fred C.
Lee, Tokushi Yamauchi. IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL.14, NO.
3, MAY 1999
[2]
Standardized data for dimming of fluorescent lamps L.H. Goud, J.W.F. Dorleijn IEEE-IAS
Conference 2002
[3]
Application note: AN10962
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8. Legal information
8.1
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
8.2
Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
AN10803
Application note
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express, implied
or statutory, including but not limited to the implied warranties of
non-infringement, merchantability and fitness for a particular purpose. The
entire risk as to the quality, or arising out of the use or performance, of this
product remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be liable
to customer for any special, indirect, consequential, punitive or incidental
damages (including without limitation damages for loss of business, business
interruption, loss of use, loss of data or information, and the like) arising out
the use of or inability to use the product, whether or not based on tort
(including negligence), strict liability, breach of contract, breach of warranty or
any other theory, even if advised of the possibility of such damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer based on
reasonable reliance up to the greater of the amount actually paid by customer
for the product or five dollars (US$5.00). The foregoing limitations, exclusions
and disclaimers shall apply to the maximum extent permitted by applicable
law, even if any remedy fails of its essential purpose.
8.3
Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 February 2012
© NXP B.V. 2012. All rights reserved.
28 of 30
AN10803
NXP Semiconductors
Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
9. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Fig 10.
Fig 11.
Fig 12.
Fig 13.
Fig 14.
Fig 15.
Fig 16.
Fig 17.
Fig 18.
Fig 19.
Fig 20.
Fig 21.
Fig 22.
Fig 23.
Fig 24.
Fig 25.
Fig 26.
Fig 27.
Fig 28.
Fig 29.
Fig 30.
Fig 31.
Phase cut sine wave . . . . . . . . . . . . . . . . . . . . . . .3
Basic 230 V dimmer. . . . . . . . . . . . . . . . . . . . . . . .4
Typical Triac VI characteristic curves. . . . . . . . . . .4
Basic dimmer with CFL . . . . . . . . . . . . . . . . . . . . .5
Input voltage and current when large dimmer
phase cut is set . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Block diagram of the charge pump CFL dimmer . .7
Transfer of resonant tank versus frequency
before and after ignition . . . . . . . . . . . . . . . . . . . . .8
Schematic resonant tank and vector diagram . . . .8
CFL inverter with charge pump power feedback .10
Equivalent circuit of a voltage source charge
pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
VSCP with ICF . . . . . . . . . . . . . . . . . . . . . . . . . . .12
VSCP with LFSR . . . . . . . . . . . . . . . . . . . . . . . . .12
Voltage doubler circuit . . . . . . . . . . . . . . . . . . . . .12
Voltage doubler with charge pump circuit . . . . . .13
Current feedback control loop . . . . . . . . . . . . . . .13
Dimming curve UBA2028 versus UBA2027. . . . .15
Dimmer phase cut detector circuit for rectified
mains supply . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Input voltage measurement in voltage doubler . .15
IC supply circuit . . . . . . . . . . . . . . . . . . . . . . . . . .16
Frequency versus time during start-up . . . . . . . .17
Transfer of the resonant tank. . . . . . . . . . . . . . . .17
Preheat circuit . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Basic input filter . . . . . . . . . . . . . . . . . . . . . . . . . .19
Mains voltage and mains current with multiple firing
of the Triac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Input current ringing . . . . . . . . . . . . . . . . . . . . . . .21
Input filter with AC load . . . . . . . . . . . . . . . . . . . .21
Input filter placed after rectifier bridge creates
the Constant Input Current (CIC) topology . . . . .22
UBA2027 circuit diagram . . . . . . . . . . . . . . . . . . .23
230 V circuit diagram . . . . . . . . . . . . . . . . . . . . . .24
120 V circuit diagram . . . . . . . . . . . . . . . . . . . . . .25
Lamp power versus frequency graph. . . . . . . . . .27
AN10803
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 February 2012
© NXP B.V. 2012. All rights reserved.
29 of 30
AN10803
NXP Semiconductors
Triac dimmable CFL using UBA2028/UBA2014/UBA2027x
10. Contents
1
2
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
4.1
4.2
4.3
5
6
7
8
8.1
8.2
8.3
9
10
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Triac dimmers . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Designing the application . . . . . . . . . . . . . . . . . 7
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Resonant tank. . . . . . . . . . . . . . . . . . . . . . . . . . 7
Charge pump circuit . . . . . . . . . . . . . . . . . . . . 10
Voltage doubler and charge pump for 120 V
input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Current feedback control loop . . . . . . . . . . . . 13
Dimmer phase cut detector . . . . . . . . . . . . . . 14
Supply of the IC and ACM for UBA2028 and
UBA2014 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Preheating . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input filtering . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Circuit diagrams . . . . . . . . . . . . . . . . . . . . . . . 22
Circuit diagram for the UBA2027 application . 23
Circuit diagram 230 V input for the UBA2014
application . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Circuit diagram 120 V input for the UBA2014
application . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Resonant tank calculation example . . . . . . . . 26
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 27
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Legal information. . . . . . . . . . . . . . . . . . . . . . . 28
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 27 February 2012
Document identifier: AN10803
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