APPLICATION NOTE DC Motor Control in High Temperature Environment ATA6824/ATMEGA88 Introduction The purpose of this document is to explain Atmel®’s High Temperature H-bridge Motor Control System. The demand for driver solutions in “under-the-hood” environments is rapidly increasing, and in particular, the use of applications such as turbo chargers, EGR, or AGR calls for new solutions. Figure 1. Atmel ATA6824 and Atmel ATmega88 9102C-AUTO-07/15 1. H-bridge Motor Control System Figure 1-1. Fully Integrated H-bridge Motor Control Application VBAT 3.3V/5V VCC Regulator VBAT AVR ATmega88 VCC PCINT Interrupt Pins DG1 DG2 DG3 PWM Timer PWM VMODE VINT VG CPLO CPHI VRES PBAT H2 3.3V/5V VCC Regulator 13V Regulator Supervisor: Short Circuit Open Load Over Temperature Under Voltage CP Gate Driver High Side 2 ATA6824 S2 H1 Gate Driver High Side 1 S1 M Logic Control Gate Driver Low Side 1 DIR L1 I/Os WD L2 /RESET UART Input Capture RX SIO WD Timer CC Timer Gate Driver Low Side 2 TX SIO RWD CC GND PGND ADC + Analog Comparator + SIO The system consists of two integrated circuits: the Atmel® microcontroller ATmega88 and the Atmel H-bridge DC Motor Driver ATA6824. The Atmel ATA6824 features gate drivers to drive H-bridge FETs, voltage regulator, watchdog, and serial IO interface. An integrated charge pump controls the NMOS FETs for low-side and high-side switches. In addition, the charge pump voltage is capable of providing a low-drop inverse voltage protection. Therefore, only a NMOS FET in the source drain direction is necessary. The Atmel ATA6824 switches the outputs off in the event of short circuits, voltage failures, and overtemperature. Temperature prewarning and charge pump failures are also indicated. The application circuit includes a current shunt, which can react at different current levels. The current signal is prepared for the microcontroller by an amplifier. The Atmel ATmega88 generates the PWM speed signal to run various movement profiles as required for the load. 1.1 Cooling Area Design The Atmel driver IC ATA6824 is housed in a QFN package. QFN packages are particularly suitable for power applications because of the exposed die pad. To make use of this advantage, the heat slug must be completely soldered to the PCB. To reduce thermal resistance, vias etched down to the soldering layer are required. An adequate ground plane must be placed on the soldering layer to eliminate the thermal energy. A via diameter of 0.3mm to 0.4mm with a spacing of 1mm to 1.5mm has proven to be most suitable. Care should be taken of the copper area's planarity to avoid, in particular, any solder bumps arising at the thermal vias. 2 ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 2. High Ambient Temperature The application is designed for high temperature environments. The Atmel ATmega88 and the Atmel driver ATA6824 are qualified up to an ambient temperature of 150°C. Under thermal overload conditions, the Atmel ATA6824 switches off. If the temperature exceeds the prewarning threshold, the microcontroller can reduce the output power. Capacitance material on X8R quality is necessary to ensure high ambient temperatures. Mounted connectors, a switch, and a potentiometer on the board, enable prototyping; however, these components are not qualified for use under high temperatures. The board can be integrated into high-temperature environments using wires. 3. The Application Board The application board is run-capable when connected to nominal 12V at the battery connector (see Figure 3-1 on page 4). The board can be connected to the automotive environment over an SIO bus. A mounted switch (DIR) for run/stop, clockwise, and counterclockwise movement and a potentiometer (SPEED) for variable speed (PWM) input are available on the application board to enable stand-alone prototyping. An optional feedback loop from the DC motor to the Atmel ATmega88 can be established using Hall sensor(s). The two Hall inputs can be linked to the connector HALL as well as the 5V supply for the Hall sensors. There is also an on-board shunt current sensor to detect over-currents (using Atmel ATmega88’s analog comparator) and to measure motor current. 3.1 On Board Features The application board provides the following features: ● Atmel ATmega88 QFN32 ● ● MCU Atmel ATA6824 QFN ● 5V/3.3V voltage regulator (fixed on-board to 5V) ● Low drop voltage protection management ● H-bridge driver with diagnostics ● Serial link transceiver to connect board to external environment ● Watchdog ● On-Off-On switch ● Potentiometer ● System clock ● ● Power H-bridge (4 power FET) ● ● ● ● Note: Standalone speed variation command (PWM ratio) MCU internal RC oscillator Human interface ● ● Stand-alone commands interface: Run/stop, clockwise, and counterclockwise Diagnostics signaling/latching through LED and unlatching through push button Connectors ● Power supply (battery voltage) and SIO ● DC motor connector ● Hall sensor inputs and supply (2 filtered inputs and 5V regulated supply voltage) ● SP/debugWire connector, for on-chip in-situ programming (ISP) and for on-chip debugging using JTAG ICE supported by AVR Studio® interface(1) Dimensions: 45mm 90mm 1. The Atmel ATmega88 is supported by AVR Studio, version 4.12 or higher. For up-to-date information on this and other AVR® tool products, please consult our web site. The newest version of AVR Studio, AVR tools, and user guide can be found in the AVR section of the Atmel web site, http://www.atmel.com ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 3 Figure 3-1. Application Board Top View, and Connector Usage VCC 5V JP1 MISO SCK NRES 1 3 5 2 4 6 MOSI ISP MK2 Header GND Vbat SIO PGND Speed CCW Stop CW 4 ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 Motor Out 1 Motor Out 2 4. Software Description All code is implemented in C language. Source code can be compiled using IAR® EWAVR 4.20A as well as AVR-GCC (WinAVR-20060421 with AVR Studio). HTML documentation is included in the package. Use the High_temp_brushed_DC.html file in the root directory to start viewing the documentation. 4.1 Motor Management ● ● ● 4.2 Motor stopped ● PWM ratio is set to zero ● Command switch inputs are monitored to start motor or keep it stopped. Motor running ● Atmel® ATA6824 DIR pin is set according to command direction. PWM ratio is refreshed constantly according to speed of the potentiometer ADC input. ● Command switch inputs are monitored to stop motor or keep it stopped. Degraded “mode”: ● Atmel ATA6824 detects a short circuit: H-bridge short-circuited and FET is switched off until next PWM rising edge. This default is reported to software through a diagnostic feature: an interrupt occurs on DG1 MCU input pin, which internally latches a failure. Apart from switching on the DG1 LED, no action is taken by the software in response to this event. In a customer application, this should be managed, eventually by the interrupt subroutine, especially in case of a 100% PWM ratio where no rising edge appears at the Atmel ATA6824 PWM input to make a retry. Care should be taken in motor transient state (e.g. motor start-up). An accelerating curve is preferable from 0% to 100% PWM ratio transition, which may be mistaken for a short-circuit condition. Without management, in the worst case scenario, the motor will not start as the outputs are switched off, and short circuit will be shown on DG1 pin. ● Atmel ATA6824 detects an over-temperature warning: an interrupt occurs on the MCU. This diagnostic doesn’t need to be software latched as it remains high until the temperature decreases. The application software toggles an LED. ● Atmel ATA6824 detects an under-voltage, an over-voltage, or a charge pump failure. Then, an interrupt occurs on DG2 MCU input PIN. This diagnostic is latched by software and an LED is switched on. ● An overcurrent is detected by the analog comparator. An interrupt is generated. The output PWM is then disabled until the current decreases bellow the over-current limit. Resources Table 4-1. Code, Data, and CPU Resources (without Compiler Optimizations) Compiler/Resources Code Size (Flash) Data Size (Ram) CPU Load IAR EWAVR 4.20A 1 180 bytes 335 bytes All routines are constantly executed in main loop AVR-GCC 1724 bytes 15 bytes The following MCU peripherals are used: ● Timer 0 ● PWM generation through output compare 0B (OC0B pin) ● ADC channels 0, 6, and 7 ● Pin change interrupts ● Resp. current, battery supply voltage and desired speed (potentiometer) value acquisitions. ● DG1, DG2 and DG3 diagnostic pins interrupts ● Optional hall sensors ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 5 ● Analog comparator ● ● I/O ● ● LEDs, switch and push-button operations, watchdog trigger, motor direction command Additional (not managed by this stand-alone software) ● 4.3 Generates over-current interrupts UART for SIO implementation (communication through high-voltage serial interface). Caution about Atmel ATmega88 Start-up Time (Fuse Configuration) ATA6824 uses a windowed watchdog, which can reset the Atmel® ATmega88 using the reset pin. ● Atmel ATmega88 is configured by default (fuse configuration) with a start-up time of 65ms after a power-on reset. With tolerances, this value can increase up to 69ms. ● Atmel ATA6824 waits for a watchdog trigger within 68ms after the reset signal has been released. Such an additional 65ms delay is unnecessary and could cause the application not to start. Atmel ATA6824 ensures an adequate VCC through its power-on delay. Atmel ATmega88 default fuse configuration should be over-written with a smaller start-up time. The start-up time can be set to 4.1ms or 0ms. The start-up settings in the fuse configuration can be changed by setting the SUTx and CKSELx fuse bits. Further details about fuses can be found in the Atmel ATmega88 datasheet and in the AVR Studio Help: AVR Tools user’s guide. Figure 4-1. Atmel ATmega88 Fuse Configuration Editing in AVR Studio 6 ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 4.4 Diagrams Figure 4-2. Flowchart for Analog Comparator (Over-current) ISR Over-current ISR (Analog Comparator ISR) Y N Re-enable Output PWM Disable Output PWM Current Over Limit? Clear Over-current Report Report Over Current Latch Over Current Figure 4-3. Flowchart for Optional Hall Sensors ISR Pin Change Interrupt 0 (Hall Sensor ISR) Optional Code Can Be Put in it Figure 4-4. Flowchart for Diagnostic Interrupt Pins Pin Change Interrupt 1 (Diagnostic 1, 2 and 3 ISR Y DG1 set? Latch DG1 Failure N Y DG2 set? Latch DG2 Failure N Y DG3 set? Report DG3 Warning N Clear DG3 Warning ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 7 Figure 4-5. Main Loop Flowchart Main Loop (Background) Initialize I/O, ATA6824 WD, ADC, Hall Sensors ISR, Diagnostic ISR, Timer0-PWM ADC Scheduler Time Base Management Watchdog Refresh Task Motor Management Diagnostic Display on LED 4.5 Modules void ADC_Init(); (void) Sets up ADC to acquire desired speed from potentiometer. void Timer0_start(void) Configures timer 1 for PWM on Output compare 0 B pin. void AN_compare_init(void) Configures Analog comparator to detect over-currents by interrupts. void Hall_sensors_ISR_init(void) Sets up pin change interrupts on hall sensors inputs. void Diag_inputs_ISR_init(void) Sets up interrupts on Diagnostic pins. void ADC_task(void) Schedules ADC acquisitions: desired speed, Vbat, and Motor current. It is called in background (main loop). unsigned int adc_get_speed(void) Returns last acquired desired speed from potentiometer. unsigned int adc_get_current(void) Returns last acquired motor current. unsigned int adc_get_V_bat(void) Returns last acquired supply voltage measurement. void manage_time_base(void) Manages a general purpose time base by monitoring Timer0 overflows (used by watchdog refresh routine, LED toggling…). void refresh_ATA6824_watchdog(void) Refreshes ATA6824 according to hardware fixed period and software time base. It is called in background (main loop). void clear_faults(void) Clears software latched faults (from diagnostics pins) only when they have disappeared. TIMER0_SET_OC0B_PWM (val) This macro changes PWM ratio. DISABLE_OCB0() This macro disables PWM output by changing pin multiplexing back to general I/O configuration. RE_ENABLE_OCB0() This macro enables PWM output by giving pin control to Output compare 0 B (Timer 0 PWM output). 8 ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 GND 100kΩ Speed Set MISO SCK NRES 2 4 6 1 3 5 JP1 MOSI VCC/ 5V GND ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 C33 VCC/ 5V Q2 BC817-40 6μH L1 R1 10kΩ Over Current Compare AGND R35 120kΩ R14 120kΩ 2.5V PB7(TOSC2/XTAL2/PCINT7) PB6(TOSC1/XTAL1/PCINT6) VCC GND VCC GND PD4(T0/XCK/PCINT20) NRES R8 470kΩ PD3(INT1/OC2B/PCINT19) VCC/ 5V 8 7 100nF AGND Hall1_S Hall2_S C27 100nF 6 5 4 3 2 SWITCH_CW VCC/ 5V 1 SWITCH_CCW RELEASE BP ISP GND MK2 Header GND RELEASE GND SWITCH_CW SWITCH_CCW GND PGND 10kΩ R9 D3 BAS16 PWR LED CMS Green R3 330Ω VCC/ 5V SIO PGND ON/OFF/ON Switch Right Angle DIR SPEED VCC/ 5V GND TP1 Bat and SIO 2 1 3 10kΩ R11 WD U1 ATmega88 C19 4 3 2 1 SIO WD_TRIG VSHUNT Speed_Set 23 22 17 18 19 20 GND DG3_Fault DG2_Fault DG1_Fault R34 330Ω R37 330Ω R36 330Ω DG3 DG2 DG1 PGND VCC/ 5V H-bridge Driver Voltage Regulator Watchdog U1 ATA6824 C10 AGND LED CMS Red LED CMS Red LED CMS Red VCC/ 5V AGND 1nF C31 VSHUNT 100nF R5 47kΩ AGND C8 100nF VCC/ 5V AGND 100nF C4 R2 120kΩ Vbat C32 Mot Side2 HSideCmd Mot Side1 19 18 17 1 V- V+ - 4 U3 OPA333 3 AGND 2 5 VCC/ 5V + R25 470kΩ 10Ω R22 R21 470kΩ 10Ω R18 R33 249kΩ 100pF C30 10nF C29 1nF C15 R32 10kΩ GND 4.7nF C23 R16 4.7Ω C16 C26 R30 SHUNT 5mΩ R28 4.7Ω 10nF C28 Q6 SUD50N04 10nF C22 Q4 SUD50N04 GND 100nF C20 VCC/ 5V R10 47kΩ R4 10kΩ Mot_Side2 1nF Mot_Side2 4.7nF PGND R27 4.7Ω 4.7nF C25 4.7nF C24 R17 4.7Ω Pbat MOT_CW LED CMS Yellow LED CMS Blue MOT_CW Mot_Side1 R29 10kΩ 1kΩ R15 Q5 SUD50N04 10nF C21 Hall2_S Hall1_S R7 47kΩ Optional Hall Sensors Motor Rotating Direction Q3 SUD50N04 Mot_Side1 VAmpl = 2.5V AGND LSide1Cmd 249kΩ R24 HSide2Cmd 20 C18 220nF HSide1Cmd VRES PGND 470nF C13 PGND GND 21 22 23 24 Pbat C5 2.2μF Pbat VCC/ 5V C3 100nF 50V Shunt of 5mΩ --> Gain = 25 Defect > 20A VShunt = 100mV 100nF 2.2kΩ R31 AGND D2 S1 H1 S2 H2 VRES CPHI CPLO VG LSide2Cmd LSide1Cmd Supply Voltage Measurement AGND OR: Net Tie SCK Vbat_Meas RELEASE_BP 21 31 VBat_Meas SIO GND WD RESET 24 PGND 8 7 6 CC RWD VINT VMODE PGND C1 10μF 50V H-Bridge Diagnostic Display PB5(SCK/PCINT5) AVCC ADC6 AREF GND ADC7 PC0(ADC0/PCINT8) PC1(ADC1/PCINT9) GND C2 100nF 50V WD_RESET 5 OR: Net Tie 330pF 10kΩ R13 51kΩ R12 C17 GF1G 220nF 100μF/ 50V PGND WD_RESET VRES C14 470nF Pbat + C6 Pbat 32 D1 Mot_PWM 11 Q1 SUD50N04 30 VBAT PWM 12 Vbat WD_TRIG 32 9 Mot_PWM 29 VCC NC Low Drop Reverse Voltage Protection SIO_TXD 31 10 V_Protect Mot_Dir 28 PGND RX SIO_RXD 13 NC 9 TX VBATSW SIO_TX 27 L1 14 Diag3 DG3 15 Diag2 DIR 10 Mot_Dir 26 L2 DG2 25 PVBAT DG1 16 Diag3 Vbat SIO_RXD 30 PD1(TXD/PCINT17) PD2(INT0/PCINT18) PD5(T1/OC0B/PCINT21) 11 VSHUNT PD7(AIN1/PCINT23) 12 DG3_Fault PB0(ICP1/CLKO/PCINT0) 13 DG2_Fault PB1(OC1A/PCINT1) 14 DG1_Fault PB2(OC1B/SS/PCINT2) 15 MOSI PD6(AIN0/OC0A/PCINT22) 29 PD0(RXD/PCINT16) Diag3 PC6(RESET/PCINT14) Diag2 28 PC5(ADC5/SCL/PCINT13) Diag1 27 PC4(ADC4/SDA/PCINT12) 26 PC3(ADC3/PCINT11) PB3(MOSI/OC2A1/PCINT3) 25 PC2(ADC2/PCINT10) PB4(MISO/PCINT4) 16 MISO BZX84-C5V1 R26 470kΩ 10Ω R23 R20 470kΩ 10Ω R19 Mot_Side2 Mot_Side1 GND R6 10kΩ VCC/ 5V HALL LSide2Cmd HSide2Cmd MOT 2 1 MPT4 4 3 2 1 5. Application Board Full Description Figure 5-1. BLDC Application Board Schematic 9 Figure 5-2. BLDC Application Board Top View and Component Placement Figure 5-3. BLDC Application Board Bottom View 10 ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 6. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. History 9102C-AUTO-07/15 Put document in the latest template ATA6824/ATmega88 [APPLICATION NOTE] 9102C–AUTO–07/15 11 XXXXXX Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2015 Atmel Corporation. / Rev.: 9102C–AUTO–07/15 Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, AVR®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. Other terms and product names may be trademarks of others. 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