AD8698:  Dual Precision, Rail-to-Rail Output Operational Amplifier Data Sheet (Rev. 0) PDF

Dual Precision, Rail-to-Rail Output
Operational Amplifier
AD8698
FEATURES
CONNECTION DIAGRAMS
OUT A 1
–IN A 2
+IN A 3
AD8698
8-Lead MSOP
(RM-8)
8
V+
7
OUT B
6 –IN B
TOP VIEW
V– 4 (Not to Scale) 5 +IN B
OUT A 1
–IN A 2
+IN A 3
AD8698
8
V+
7
OUT B
6 –IN B
TOP VIEW
V– 4 (Not to Scale) 5 +IN B
04807-0-070
8-Lead SOIC
(R-8)
04807-0-069
Low offset voltage: 100 µV max
Low offset voltage drift: 2 µV/°C max
Low input bias current: 700 pA max
Low noise: 8 nV/√Hz
High common-mode rejection: 118 dB min
Wide operating temperature: −40°C to +85°C
No phase reversal
Figure 1.
APPLICATIONS
Photodiode amplifier
Sensors and controls
Multipole filters
Integrator
GENERAL DESCRIPTION
The AD8698 is a high precision, rail-to-rail output, low noise,
low input bias current operational amplifier. Offset voltage is a
respectable 100 µV max and drift over temperature is below
2 µV/°C, eliminating the need for manual offset trimming. The
AD8698 is ideal for high impedance sensors, minimizing offset
errors due to input bias and offset currents.
The rail-to-rail output maximizes dynamic range in a variety of
applications, such as photodiode amplifiers, DAC I/V
amplifiers, filters, and ADC input amplifiers.
The AD8698 dual amplifiers are offered in 8-lead MSOP and
narrow 8-lead SOIC packages. The MSOP version is available
in tape and reel only.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
© 2004 Analog Devices, Inc. All rights reserved.
AD8698
TABLE OF CONTENTS
Specifications .................................................................................... 3
Instrumentation Amplifier ....................................................... 15
Absolute Maximum Ratings ........................................................... 5
Composite Amplifier ................................................................. 15
Thermal Resistance ...................................................................... 5
Low Noise Applications ............................................................ 16
ESD Caution.................................................................................. 5
Driving ADCs ............................................................................. 16
Typical Performance Characteristics............................................. 6
Using the AD8698 in Active Filter Designs ........................... 16
Applications .................................................................................... 14
Outline Dimensions....................................................................... 17
Input Overvoltage Protection................................................... 14
Ordering Guide .......................................................................... 17
Driving Capacitive Loads .......................................................... 14
REVISION HISTORY
4/04—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
AD8698
SPECIFICATIONS
VS = ±15 V, VCM = 0 V (@TA = 25oC, unless otherwise noted.)
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
20
100
300
µV
µV
INPUT CHARACTERISTICS
Offset Voltage
VOS
Offset Voltage Drift
Input Bias Current
∆VOS/∆T
IB
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance
IVR
CMRR
AVO
CDIFF
CCM
−40°C < TA < +85°C
−40°C < TA < +85°C
0.6
−40°C < TA < +85°C
OUTPUT CHARACTERISTICS
Output Voltage Swing
(Ref. to GND)
(Ref. to GND)
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current
Supply Voltage
DYNAMIC PERFORMANCE
Slew Rate
132
1450
6.5
4.6
VOH
IL = 1 mA, −40°C < TA < +85°C
14.85
14.93
V
IL = 5 mA, −40°C < TA < +85°C
14.6
14.8
V
VOL
IL = 1 mA, −40°C < TA < +85°C
−14.93
−14.6
V
VOL
IL = 5 mA, −40°C < TA < +85°C
−14.82
−14.5
V
PSRR
ISY
±2.5 V < VS < ±15 V
VO = 0 V
VS
−40°C < TA < +85°C
−40°C < TA < +85°C
3.2
3.8
±15
dB
mA
mA
V
SR
RL = 2 kΩ
GBP
Phase Margin
ØO
Input Voltage Noise Density
RL = 2 kΩ, VO = ±13.5 V
−13.5V
118
900
µV/°C
pA
pA
pA
pA
V
dB
V/mV
pF
pF
VOH
Gain Bandwidth Product
NOISE PERFORMANCE
Input Noise Voltage
−40°C < TA < +85°C
−40°C < TA < +85°C
VCM = ±13.5 V
2
700
1500
700
1500
13.5
114
132
2.8
±2.5
0.4
V/µs
1
MHz
60
Degrees
en p-p
0.1 Hz < f < 10 Hz
0.6
µV p-p
en
f = 10 Hz
15
nV/√Hz
Input Voltage Noise Density
en
f = 1 kHz
8
nV/√Hz
Current Noise Density
in
f = 1 kHz
0.2
pA/√Hz
Rev. 0 | Page 3 of 20
AD8698
VS = ±2.5 V, VCM = 0 V (@TA = 25oC, unless otherwise noted.)
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
20
100
µV
INPUT CHARACTERISTICS
Offset Voltage
VOS
Offset Voltage Drift
Input Bias Current
∆VOS/∆T
IB
Input Offset Current
IOS
−40°C < TA < +85°C
300
µV
−40°C < TA < +85°C
2
µV/°C
700
1500
700
1500
+1.5
120
1200
6.4
4.6
pA
pA
pA
pA
V
dB
V/mV
pF
pF
2.44
2.29
V
V
−40°C < TA < +85°C
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Input Capacitance
OUTPUT CHARACTERISTICS
Output Voltage Swing
(Ref. to GND)
(Ref. to GND)
IVR
CMRR
AVO
CDIFF
CCM
VOH
VOH
−40°C < TA < +85°C
−40°C < TA < +85°C
VCM = ±13.5 V
RL = 2 kΩ, VO = ±13.5 V
−1.5
105
600
IL = 1 mA, −40°C < TA < +85°C
IL = 5 mA, −40°C < TA < +85°C
2.35
2.1
VOL
IL = 1 mA, −40°C < TA < +85°C
−2.43
−2.2
V
VOL
IL = 5 mA, TA = 25°C
−2.15
−1.9
V
IL= 5mA, −40°C<TA<+85°C
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current
Supply Voltage
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Input Noise Voltage
PSRR
ISY
±2.5 V < VS < ±15 V
VO = 0 V
Vs
−40°C < TA < +85°C
−40°C < TA < +85°C
SR
GBP
RL = 2 kΩ
Øo
−1.6
114
132
2.3
±2.5
2.8
3.3
±15
dB
mA
mA
V
0.4
1
V/µs
MHz
60
Degrees
en p-p
0.1 Hz < f < 10Hz
0.6
µV p-p
Input Voltage Noise Density
en
f = 10 Hz
15
nV/√Hz
Input Voltage Noise Density
en
f =1 kHz
8
nV/√Hz
Current Noise Density
in
f = 1 kHz
0.2
pA/√Hz
Rev. 0 | Page 4 of 20
AD8698
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 3.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration
to Gnd
Storage Temperature Range
R, RM Packages
Operating Temperature Range
Junction Temperature Range
R, RM Packages
Lead Temperature Range
(Soldering, 60 Sec)
θJA is specified for the worst-case conditions, i.e., θJA is specified
for devices soldered in circuit boards for surface-mount
packages.
Rating
±15 V
±VS
±VS
Indefinite
Table 4. Thermal Resistance
Package Type
−65°C to +150°C
MSOP-8 (RM)
SOIC-8 (R)
−40°C to +85°C
−65°C to +150°C
θJA
210
158
+300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 1000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 20
θJC
45
43
Unit
°C/W
°C/W
AD8698
TYPICAL PERFORMANCE CHARACTERISTICS
225
100
80
VS = ±15V
80
180
60
135
40
90
20
45
0
0
50
40
30
20
–45
–20
10
0.2
0.4
0.6
0.8
1.0
1.2
TCVOS (µV/°C)
–40
10k
100k
–90
10M
1M
FREQUENCY (Hz)
Figure 2. Input Offset Voltage Drift Distribution
Figure 5. Open-Loop Gain and Phase vs. Frequency
80
50
VS = ±15V
VS = ±15V
40
AV = 100
60
CLOSED-LOOP GAIN (dB)
NUMBER OF AMPLIFIERS
70
50
40
30
20
20
AV = 10
10
0
AV = 1
–10
10
–60
–40
–20
0
20
40
60
80
100
VOS (µV)
–20
04807-0-058
0
–100 –80
30
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 3. Offset Voltage Distribution
04807-0-009
0
04807-0-034
0
04807-0-001
60
GAIN (dB)
NUMBER OF AMPLIFIERS
70
PHASE MARGIN (Degrees)
VS = ±15V
Figure 6. Closed-Loop Gain vs. Frequency
60
70
VS = ±15V
VS = ±15V
OUTPUT IMPEDANCE (Ω)
50
40
30
20
45
30
AV = 100
AV = 10
15
0
–400 –320 –240 –160 –80
0
80
160
240
IB (pA)
320
400
Figure 4. Input Bias Distribution
0
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 7. Output Impedance vs. Frequency
Rev. 0 | Page 6 of 20
1M
04807-0-007
AV = 1
10
04807-0-060
NUMBER OF AMPLIFIERS
60
AD8698
VOLTAGE (1V/DIV)
VOLTAGE (mV)
VS = ±15V
VIN = 4V p-p
CL = 1nF
0
VIN
–200
15
VOLTAGE (V)
VOUT
04807-0-037
TIME (100µs/DIV)
04807-0-041
VS = ±15V
VIN = 200mV p-p
AV = –100
0
TIME (10µs/DIV)
Figure 8. Large Signal Transient Response
Figure 11. Positive Overvoltage Recovery
VOLTAGE (100mV/DIV)
VOLTAGE (mV)
VS = ±15V
VIN = 200mV p-p
CL = 1nF
VS = ±15V
VIN = 200mV
AV = –100
200
VIN
0
VOLTAGE (V)
0
–15
TIME (100µs/DIV)
TIME (400µs/DIV)
Figure 9. Small Signal Transient Response
Figure 12. Negative Overvoltage Recovery
50
120
VS = ±15V
VIN = 200mV
AV = 1
VS = ±15V
100
80
CMRR (dB)
30
20
60
40
10
0
500
1000
1500
2000
2500
CAPACITIVE LOAD (pF)
3000
Figure 10. Overshoot vs. Load Capacitance
0
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 13. CMRR vs. Frequency
Rev. 0 | Page 7 of 20
10M
04807-0-003
0
20
04807-0-013
OVERSHOOT (%)
04807-0-040
04807-0-044
VOUT
AD8698
100
100
VS = ±15V
CURRENT NOISE DENSITY (nV/√Hz)
VS = ±15V
60
+PSRR
–PSRR
40
0
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
1
0.1
0.1
04807-0-005
20
10
1
10
100
1k
FREQUENCY (Hz)
04807-0-033
80
Figure 17. Current Noise Density vs. Frequency
Figure 14. PSRR vs. Frequency
20
–ISC
VS = ±15V
SHORT-CIRCUIT CURRENT (mA)
10
0
–10
–20
+ISC
–40
–60
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 18. Short-Circuit Current vs. Temperature
Figure 15. Input Voltage Noise
14.96
100
VS = ±15V
VS = ±15V
IL = 1mA
14.95
OUTPUT SWING (V)
14.94
10
14.93
14.92
VOH
14.91
14.90
14.89
1
0.1
1
10
100
FREQUENCY (Hz)
1k
14.87
–60
Figure 16. Voltage Noise Density vs. Frequency
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
Figure 19. Output Swing vs. Temperature
Rev. 0 | Page 8 of 20
100
04807-0-019
–VOL
14.88
04807-0-032
VOLTAGE NOISE DENSITY (nV/√Hz)
–40
04807-0-030
–30
04807-0-035
VOLTAGE (200nV/DIV)
TIME (1s/DIV)
VS = ±15V
AD8698
140
14.90
VS = ±15V
IL = 5mA
VS = ±15V
138
14.80
PSRR (dB)
VOH
14.75
136
134
14.70
–VOL
14.60
–60
–40
–20
0
20
40
60
132
80
100
TEMPERATURE (°C)
130
–60
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 20. Output Voltage Swing vs. Temperature
04807-0-029
14.65
04807-0-020
OUTPUT VOLTAGE SWING (V)
14.85
Figure 23. PSRR vs. Temperature
30
100
VS = ±15V
VS = ±15V
∆ INPUT BIAS CURRENT (pA)
∆ OFFSET VOLTAGE (µV)
20
10
0
–10
50
0
–50
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
–100
–60
04807-0-023
–40
–20
0
20
40
60
Figure 21. ∆ Offset Voltage vs. Temperature
6
VS = ±15V
VS = ±15V
150
5
∆ OUTPUT SWING (V)
145
140
135
130
VOL
4
3
2
1
125
–40
–20
0
20
40
60
TEMPERATURE (°C)
80
100
04807-0-027
CMRR (dB)
100
Figure 24. ∆ Input Bias Current vs. Temperature
155
120
–60
80
TEMPERATURE (°C)
0
VOH
0
5
10
15
20
LOAD CURRENT (mA)
Figure 25. ∆ Output Voltage Swing from Rails vs. Load Current
Figure 22. CMRR vs. Temperature
Rev. 0 | Page 9 of 20
04807-0-015
–30
–60
04807-0-025
–20
AD8698
3.5
225
100
2.5
2.0
80
180
60
135
40
90
20
45
0
0
–45
–20
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
–40
10k
04807-0-017
1.5
–60
100k
–90
10M
1M
FREQUENCY (Hz)
Figure 26. Supply Current vs. Temperature
04807-0-002
GAIN (dB)
SUPPLY CURRENT (mA)
3.0
PHASE MARGIN (Degrees)
VS = ±2.5V
VS = ±15V
Figure 29. Open-Loop Gain and Phase vs. Frequency
60
0
VS = ±15V
VS = ±2.5V
OUTPUT IMPEDANCE (Ω)
–40
–60
–80
–100
45
30
AV = 10
AV = 100
15
AV = 1
–120
10k
100k
1M
10M
FREQUENCY (Hz)
0
10
04807-0-010
–140
1k
100
1k
10k
100k
FREQUENCY (Hz)
Figure 27. Channel Separation
1M
04807-0-008
CHANNEL SEPARATION (dB)
–20
Figure 30. Output Impedance vs. Frequency
70
VS = ±2.5V
VS = ±2.5V
VIN = 2V p-p
CL = 1nF
VOLTAGE (500mV/DIV)
50
40
30
20
0
0
–100 –80
–60
–40
–20
0
20
40
60
80
VOS (µV)
100
Figure 28. Offset Voltage Distribution
TIME (100µs/DIV)
Figure 31. Large Signal Transient Response
Rev. 0 | Page 10 of 20
04807-0-038
10
04807-0-059
NUMBER OF AMPLIFIERS
60
VOLTAGE (mV)
AD8698
VOLTAGE (100mV/DIV)
VS = ±2.5V
VIN = 200mV p-p
CL = 1nF
VS = ±2.5V
VIN = 200mV p-p
AV = –100
200
VIN
0
VOLTAGE (V)
0
–2.5
TIME (100µs/DIV)
TIME (4µs/DIV)
Figure 32. Small Signal Transient Response
Figure 35. Negative Overvoltage Recovery
50
120
VS = ±2.5V
VIN = 200mV
AV = 1
40
VS = ±2.5V
100
80
30
CMRR (dB)
20
60
40
10
0
500
1000
1500
2000
2500
CAPACITIVE LOAD (pF)
3000
0
04807-0-014
0
20
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 33. Overshoot vs. Load Capacitance
04807-0-004
OVERSHOOT (%)
04807-0-042
04807-0-045
VOUT
Figure 36. CMRR vs. Frequency
VS = ±2.5V
0
80
VIN
PSRR (dB)
–200
VOUT
0
+PSRR
–PSRR
40
20
VS = ±2.5V
VIN = 200mV p-p
AV = –100
TIME (4µs/DIV)
04807-0-043
VOLTAGE (V)
2.5
60
0
10
100
1k
10k
FREQUENCY (Hz)
Figure 37. PSRR vs. Frequency
Figure 34. Positive Overvoltage Recovery
Rev. 0 | Page 11 of 20
100k
1M
04807-0-006
VOLTAGE (mV)
100
AD8698
20
30
VS = ±2.5V
VS = ±2.5V
20
∆ OFFSET VOLTAGE (µV)
10
0
–10
+ISC
–20
0
–10
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
–30
–60
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
04807-0-024
–30
–60
10
–20
04807-0-031
SHORT-CIRCUIT CURRENT (mA)
–ISC
Figure 41. ∆ Offset Voltage vs. Temperature
Figure 38. Short-Circuit Current vs. Temperature
134
2.46
VS = ±2.5V
IL = 1mA
2.45
VS = ±2.5V
2.43
CMRR (dB)
OUTPUT VOLTAGE (V)
132
2.44
VOH
2.42
2.41
130
128
–VOL
2.40
126
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
124
–60
04807-0-021
–40
–20
0
20
40
60
Figure 39. Output Swing vs. Temperature
–20
VS = ±2.5V
IL = 5mA
VS = ±2.5V
∆ INPUT OFFSET CURRENT (pA)
2.3
VOH
2.1
–VOL
1.9
1.7
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
100
04807-0-022
OUTPUT VOLTAGE SWING (V)
100
Figure 42. CMRR vs. Temperature
2.5
1.5
–60
80
TEMPERATURE (°C)
–30
–40
–50
–60
–70
–80
–60
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
Figure 43. ∆ Input Bias Current vs. Temperature
Figure 40. Output Voltage Swing vs. Temperature
Rev. 0 | Page 12 of 20
100
04807-0-026
2.38
–60
04807-0-028
2.39
AD8698
3.0
2500
VS = ±2.5V
2.5
SUPPLY CURRENT (mA)
1500
VOL
1000
VOH
2.0
1.5
1.0
500
5
10
15
20
LOAD CURRENT (mA)
0
0
5
10
15
20
25
Figure 44. ∆ Output Voltage Swing from Rails vs. Load Current
0
VS = ±2.5V
VS = ±2.5V
–20
CHANNEL SEPARATION (dB)
2.5
SUPPLY CURRENT (mA)
35
Figure 47. Supply Current vs. Supply Voltage
3.0
2.0
1.5
1.0
0.5
–40
–60
–80
–100
–120
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
100
04807-0-018
0
–60
30
SUPPLY VOLTAGE (V)
04807-0-012
0
04807-0-016
0
0.5
–140
1k
Figure 45. Supply Current vs. Temperature
100k
1M
FREQUENCY (Hz)
Figure 48. Channel Separation
04807-0-039
VOLTAGE (2V/DIV)
VS = ±5V
VIN = 11.4V p-p
TIME (400µs/DIV)
10k
Figure 46. No Phase Reversal
Rev. 0 | Page 13 of 20
10M
04807-0-011
∆ OUTPUT SWING (mV)
2000
AD8698
APPLICATIONS
The AD8698 has internal protective circuitry which allows
voltages at either input to exceed the supply voltage. However,
if voltages applied at either input exceed the supply voltage by
more than 2 V, it is recommended to use a resistor in series
with the inputs to limit the input current and prevent damaging
the device.
VOLTAGE (100mV/DIV)
INPUT OVERVOLTAGE PROTECTION
VS = ±15V
CL = 68nF
RS = 30Ω
CS = 5nF
AV = 1
VIN − VS
≤ 5 mA
RS + 500
04807-0-061
The value of the resistor can be calculated from the following
formula:
TIME (10µs/DIV)
Figure 50. Compensated Capacitive Load Drive with Snubber
DRIVING CAPACITIVE LOADS
The snubber network consists of a simple RC network
whose values are determined empirically.
V–
V+
RS
+
–
CS
400mV
CL
04807-0-063
The AD8698 is stable even when driving heavy capacitive
loads in any configuration. Although the AD8698 will safely
drive capacitive loads well over 10 nF, it is recommended to
use external compensation should the amplifier be subjected
to driving a load exceeding 50 nF. This is particularly
important in positive unity gain configurations, the worst
case for stability. Figure 49 shows the output of the AD8698
with a 68 nF load in response to a 400 mV signal at its
positive input; the overshoot is less than 25% without any
external compensation. Using a simple “snubber” network
reduces the overshoot to less than 10% as shown in
Figure 50.
Figure 51. Snubber Network
Table 5 provides a few starting values for optimum
compensation.
Table 5. Compensation Values
VS = ±15V
CL = 68nF
AV = 1
CL (nF)
VOLTAGE (100mV/DIV)
47
68
100
RS (Ω)
20
30
50
CS (nF)
7
5
3
TIME (10µs/DIV)
04807-0-057.
The use of the snubber network does not recover the loss of
bandwidth incurred by the load capacitance. The AD8698
maintains a unity gain bandwidth of 1 MHz with load
capacitances of up to 1 nF.
Figure 49. Heavy Capacitive Load Drive without Compensation
Rev. 0 | Page 14 of 20
AD8698
10M
R1
1kΩ
V+
R2
10kΩ
V–
1/2 AD8698
1M
R3
9kΩ
R4
2kΩ
100k
V+
V–
R5
10kΩ
10k
OP184
R3
9kΩ
1k
1
10
100
LOAD CAPACITANCE (nF)
04807-0-062
V–
Figure 52. Unity Gain Bandwidth vs. Load Capacitance
V+
V2
R1
9.8kΩ
1/2 AD8698
R7
400Ω
04807-0-064
UNITY GAIN BANDWIDTH (MHz)
V1
Figure 53. Three Op Amp In-Amp
COMPOSITE AMPLIFIER
Figure 52 shows the unity gain bandwidth as a function of load
capacitance.
INSTRUMENTATION AMPLIFIER
Instrumentation amplifiers are used in applications requiring
precision, accuracy, and high CMRR. One popular application
is signal conditioning in process control, test automation, and
measurement instrumentation, where the amplifier is used to
amplify small signals.
The triple op amp implementation uses the AD8698 at the
front end with the OP184 for optimum accuracy.
The circuit in Figure 53 enjoys a high overall gain, excellent dc
performance, high CMRR, as well as the benefit of an output
that swings to the supplies.
The CMRR of the in-amp will be limited by the choice of
resistor tolerance. R5 is an optional potentiometer that can be
used to calibrate the circuit for maximum gain. R7 can be
trimmed for optimum CMRR.
The dc accuracy of the AD8698 and the ac performance of the
OP184 are combined in the circuit shown in Figure 54. The
composite amplifier provides a higher bandwidth, a lower offset
voltage, and a higher loop, thereby reducing the gain error
substantially.
The circuit shown exhibits a total output rms noise of less than
500 µV, corresponding to less than 3 mV of peak-to-peak noise
over approximately a 3 MHz bandwidth. Cf is used to minimize
peaking.
The circuit has an inverting gain of 10. In applications with
higher closed-loop gains, Cf is necessary to maintain a
sufficient phase margin and ensure stability. This results in a
narrower closed-loop bandwidth.
R2
10kΩ
R1
1kΩ
Cf
20pF
VIN
V–
The output voltage is given by:
V+
V–
OP184
2R3 ⎞⎛ R 2 ⎞
VO =VIN ⎛⎜1 +
⎟⎜
⎟
R 4 ⎠⎝ R1 ⎠
⎝
1/2 AD8698
04807-0-065
V+
Figure 54. Composite Amplifier Circuit
Rev. 0 | Page 15 of 20
AD8698
LOW NOISE APPLICATIONS
In some applications, it is critical to minimize the noise, and
although the AD8698 has a low noise of typically 8 nV/√Hz at
1 kHz, paralleling the two amplifiers within the same package
reduces the total noise referred to the input to approximately
5.5 nV/√Hz. This simple technique is depicted in Figure 55.
V+
R3
100Ω
R2
10kΩ
In the high-pass filter of Figure 56, the damping factor Q is set
to 1/√2 for a maximally flat response (Butterworth).
The gain is unity and the bandwidth is 10 kHz with the values
shown.
VOUT
C1
1nF
V–
R5
100Ω
R4
10kΩ
R1
11kΩ
C2
1nF
04807-0-066
V+
R3
1kΩ
VIN
V+
V–
R2
22kΩ
04807-0-067
V–
R1
1kΩ
An example of an active filter is the Sallen Key. This topology
gives the user the flexibility of implementing a low-pass or a
high-pass filter by simply interchanging the resistors and the
capacitors.
Figure 55. Paralleling Amplifiers
DRIVING ADCs
Figure 56. Two Pole High-Pass Filter
The AD8698 can drive extremely heavy capacitive loads
without any compensation. Sometimes capacitors are placed at
the output of the amplifier to absorb transient currents while
the op amp is interfaced with the ADC. Most op amps need a
small resistor with the output to isolate the load capacitance.
R1
11kΩ
C1
2nF
VIN
R2
11kΩ
V+
This results in a loss of bandwidth and slows the amplifier
down substantially. However, the AD8698 maintains a unity
gain bandwidth of 1 MHz with loads of up to 1 nF, as shown in
Figure 52.
C2
1nF
V–
04807-0-068
VIN
If a higher gain is desired, the corner frequency should be
chosen accordingly. For example, if the amplifier is configured
with a gain of 10, the corner frequency of the filter should not
be more than 10 kHz.
Figure 57. Two Pole Low-Pass Filter
USING THE AD8698 IN ACTIVE FILTER DESIGNS
The AD8698 is recommended for unity gain filter designs with
a corner frequency of up to 100 kHz, one tenth of the op amp’s
unity gain bandwidth.
The circuit of Figure 57 has a bandwidth of 10 kHz and a
maximally flat response. In this case, the damping factor is
controlled by the ratio of the capacitors and the gain is unity.
Rev. 0 | Page 16 of 20
AD8698
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
5
4.00 (0.1574)
3.80 (0.1497) 1
6.20 (0.2440)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.50 (0.0196)
× 45°
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
0.51 (0.0201)
COPLANARITY
SEATING 0.31 (0.0122)
0.10
PLANE
8°
0.25 (0.0098) 0° 1.27 (0.0500)
0.40 (0.0157)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 58. 8-Lead Small Outline IC [SOIC] (R-8)—Dimensions shown in millimeters
3.00
BSC
8
5
4.90
BSC
3.00
BSC
4
PIN 1
0.65 BSC
1.10 MAX
0.15
0.00
0.38
0.22
COPLANARITY
0.10
0.23
0.08
8°
0°
0.80
0.60
0.40
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 59. 8-Lead Small Outline IC [SOIC] (RM-8)—Dimensions shown in millimeters
ORDERING GUIDE
Model
AD8698ARM-R2
AD8698ARM-REEL
AD8698AR
AD8698AR-REEL
AD8698AR-REEL7
Temperature Package
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
Package Description
MSOP
MSOP
SOIC
SOIC
SOIC
Rev. 0 | Page 17 of 20
Package Option
RM-8
RM-8
R-8
R-8
R-8
Branding
A02
A02
AD8698
NOTES
Rev. 0 | Page 18 of 20
AD8698
NOTES
Rev. 0 | Page 19 of 20
AD8698
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D04807-0-4/04(0)
Rev. 0 | Page 20 of 20
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