a Very Low Noise Quad Operational Amplifier OP470 FEATURES Very Low-Noise, 5 nV/÷Hz @ 1 kHz Max Excellent Input Offset Voltage, 0.4 mV Max Low Offset Voltage Drift, 2 V/C Max Very High Gain, 1000 V/mV Min Outstanding CMR, 110 dB Min Slew Rate, 2 V/s Typ Gain-Bandwidth Product, 6 MHz Typ Industry Standard Quad Pinouts Available in Die Form PIN CONNECTIONS 14-Lead Hermetic DIP (Y-Suffix) 14-Lead Plastic DIP (P-Suffix) GENERAL DESCRIPTION The OP470 is a high-performance monolithic quad operational amplifier with exceptionally low voltage noise, 5 nV/÷Hz at 1 kHz max, offering comparable performance to ADI’s industry standard OP27. The OP470 features an input offset voltage below 0.4 mV, excellent for a quad op amp, and an offset drift under 2 mV/∞C, guaranteed over the full military temperature range. Open loop gain of the OP470 is over 1,000,000 into a 10 kW load ensuring excellent gain accuracy and linearity, even in high gain applications. Input bias current is under 25 nA, which reduces errors due to signal source resistance. The OP470’s CMR of over 110 dB and PSRR of less than 1.8 mV/V significantly reduce errors due to ground noise and power supply fluctuations. Power consumption of the quad OP470 is half that of four OP27s, a significant advantage for power conscious applications. The OP470 is unity-gain stable with a gain bandwidth product of 6 MHz and a slew rate of 2 V/ms. 16-Lead SOIC Package (S-Suffix) OUT A 1 16 OUT D –IN A 2 15 –IN D +IN A 3 14 +IN D OUT A 1 14 OUT D –IN A 2 13 –IN D V+ 4 +IN A 3 12 +IN D +IN B 5 12 +IN C V+ 4 11 V– –IN B 6 11 –IN C +IN B 5 –IN B 6 OUT B 7 OP470 10 +IN C OUT B 7 9 –IN C NC 8 8 OUT C OP470 13 V– 10 OUT C 9 NC NC = NO CONNECT The OP470 offers excellent amplifier matching which is important for applications such as multiple gain blocks, low noise instrumentation amplifiers, quad buffers, and low noise active filters. The OP470 conforms to the industry standard 14-lead DIP pinout. It is pin compatible with the LM148/149, HA4741, HA5104, and RM4156 quad op amps and can be used to upgrade systems using these devices. For higher speed applications, the OP471, with a slew rate of 8 V/ms, is recommended. SIMPLIFIED SCHEMATIC V+ BIAS –IN +IN V– REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2002 OP470–SPECIFICATIONS ELECTRICAL CHARACTERISTICS (at V = 15 V, T = 25C, unless otherwise noted.) S Parameter Symbol Conditions INPUT OFFSET VOLTAGE VOS INPUT OFFSET CURRENT IOS INPUT BIAS CURRENT A OP470A/E OP470F OP470G Min Typ Max Min Typ Max Min Typ Max Unit 0.1 0.4 0.2 0.8 0.4 1.0 mV VCM = 0 V 3 10 6 20 12 30 nA IB VCM = 0 V 6 25 15 50 25 60 nA INPUT NOISE VOLTAGE enp-p 0.1 Hz to 10 Hz (Note 1) 80 200 80 200 80 200 nV p-p INPUT NOISE Voltage Density en fO = 10 Hz fO = 100 Hz fO = 1 kHz (Note 2) 3.8 3.3 3.2 6.5 5.5 5.0 3.8 3.3 3.2 6.5 5.5 5.0 3.8 3.3 3.2 6.5 5.5 5.0 nV÷Hz INPUT NOISE Current Density in fO = 10 Hz fO = 100 Hz fO = 1 kHz 1.7 0.7 0.4 LARGE-SIGNAL Voltage Gain AVO V = ± 10 V RL = 10 kW RL = 2 kW 1000 2300 500 1200 800 1700 400 900 800 1700 400 900 V/mV INPUT VOLTAGE RANGE IVR (Note 3) ± 11 ± 12 ± 11 ± 12 ± 11 ± 12 V OUTPUT VOLTAGE SWING VO RL ≥ 2 kW ± 12 ± 13 ± 12 ± 13 ± 12 ± 13 V COMMON-MODE REJECTION CMR VCM = ± 11 V 110 125 100 120 100 120 dB POWER SUPPLY REJECTION RATIO PSRR VS = ± 4.5 V to ± 18 V SLEW RATE SR SUPPLY CURRENT (All Amplifiers) ISY No Load 9 GAIN BANDWIDTH PRODUCT GBW AV = 10 6 CHANNEL SEPARATION CS VO = 20 V p-p fO = 10 Hz (Note 1) INPUT CAPACITANCE CIN 2 2 2 pF RIN 0.4 0.4 0.4 MW INPUT RESISTANCE Common-Mode RINCM 11 11 11 GW SETTLING TIME tS 5.5 6.0 5.5 6.0 5.5 6.0 ms INPUT RESISTANCE Differential-Mode 1.7 0.7 0.4 0.56 1.8 1.4 125 AV = 1 to 0.1% to 0.01 % 2 155 1.0 1.4 11 1.7 07 0.4 5.6 2 9 6 125 155 1.0 1.4 11 pA÷Hz 5.6 2 9 6 125 155 mV/V V/ms 11 mA MHz dB NOTES 1 Guaranteed but not 100% tested 2 Sample tested 3 Guaranteed by CMR test –2– REV. B OP470 (at VS = 15 V, –55C £ TA £ 125C for OP470A, unless otherwise noted.) ELECTRICAL CHARACTERISTICS OP470A Parameter Symbol INPUT OFFSET VOLTAGE Conditions Min Typ Max Unit VOS 0.14 0.6 mV AVERAGE INPUT Offset Voltage Drift TCVOS 0.4 2 mV/∞C INPUT OFFSET CURRENT IOS VCM = 0 V 5 20 nA INPUT BIAS CURRENT IB VCM = 0 V 15 20 nA LARGE-SIGNAL Voltage Gain AVO VO = ± 10 V RL = 10 kW RL = 2 kW INPUT VOLTAGE RANGE* IVR OUTPUT VOLTAGE SWING VO COMMON-MODE REJECTION 750 400 1600 800 V/mV ± 11 ± 12 V RL ≥ 2 kW ± 12 ± 13 V CMR VCM = ± 11 V 100 120 dB POWER SUPPLY REJECTION RATIO PSRR VS = ± 4.5 V to ± 18 V SUPPLY CURRENT (All Amplifiers) ISY No Load *Guaranteed — 1.0 5.6 mV/V 9.2 11 mA by CMR test ELECTRICAL CHARACTERISTICS (at VS = 15 V, –25C £ TA £ 85C for OP470E/OP470EF, –40C £ TA £ 85C for OP470G, unless otherwise noted.) OP470E OP470F OP470G Min Typ Max Min Typ Max Min Typ Max Parameter Symbol Conditions INPUT OFFSET VOLTAGE VOS 0.12 0.5 0.24 1.0 0.5 AVERAGE INPUT Offset Voltage Drift TCVOS 0.4 2 0.6 4 2 INPUT OFFSET CURRENT IOS VCM = 0 V 4 20 7 40 20 50 nA INPUT BIAS CURRENT IB VCM = 0 V 11 50 20 70 40 75 nA LARGE-SIGNAL Voltage Gain AVO VO = ± 10 V RL = 10 kW RL = 2 kW INPUT VOLTAGE RANGE* IVR OUTPUT VOLTAGE SWING VO COMMON-MODE REJECTION 1.5 Unit mV mV/∞C 800 400 1800 900 600 1400 300 700 600 1500 300 800 V/mV ± 11 ± 12 ± 11 ± 12 ± 11 ± 12 V RL ≥ 2 kW ± 12 ± 13 ± 12 ± 13 ± 12 ± 13 V CMR VCM = ± 11 V 100 120 90 90 dB POWER SUPPLY REJECTION RATIO PSRR VS = ± 4.5 V to ± 18 V SUPPLY CURRENT (All Amplifiers) ISY No Load *Guaranteed REV. B — 0.7 5.6 9.2 11 by CMR test –3– — 115 1.8 10 9.2 11 — 110 1.8 10 mV/V 9.3 11 mA OP470–SPECIFICATIONS WAFER TEST LIMITS (at V = 15 V, 25C, unless otherwise noted.) S OP470GBC Parameter Symbol INPUT OFFSET VOLTAGE VOS INPUT OFFSET CURRENT IOS INPUT BIAS CURRENT Conditions Limit Unit 0.8 mV Max VCM = 0 V 20 nA Max IB VCM = 0 V 50 nA Min LARGE-SIGNAL Voltage Gain AVO VO = ± 10 V RL = 10 kW RL = 2 kW 800 400 V/mV Min INPUT VOLTAGE RANGE* IVR ± 11 V Min OUTPUT VOLTAGE SWING VO RL ≥ 2 kW ± 12 V Min COMMON-MODE REJECTION CMR VCM = ± 11 V 100 dB POWER SUPPLY REJECTION RATIO PSRR VS = ± 4.5 V to ± 18 V 5.6 mV/V Max SUPPLY CURRENT (All Amplifiers) ISY No Load 11 mA Max NOTE *Guaranteed by CMR test Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing. –4– REV. B OP470 ABSOLUTE MAXIMUM RATINGS 1 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . ± 1.0 V Differential Input Current2 . . . . . . . . . . . . . . . . . . . . ± 25 mA Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage Output Short-Circuit Duration . . . . . . . . . . . . . . . Continuous Storage Temperature Range P, Y Package . . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300∞C Junction Temperature (Tj) . . . . . . . . . . . . . –65∞C to +150∞C Operating Temperature Range OP470A . . . . . . . . . . . . . . . . . . . . . . . . . –55∞C to +125∞C OP470E, OP470F . . . . . . . . . . . . . . . . . . . –25∞C to +85∞C OP470G . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C JC Unit 14-Lead Hermetic DIP(Y) 94 10 ∞C/W 14-Lead Plastic DIP(P) 76 33 ∞C/W 16-Lead SOIC (S) 88 23 ∞C/W NOTES 1 Absolute Maximum Ratings apply to both DICE and packaged parts, unless otherwise noted. 2 The OP470’s inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise performance. If differential voltage exceeds ± 1.0 V, the input current should be limited to ± 25 mA. 3 JA is specified for worst case mounting conditions, i.e., JA is specified for device in socket for TO, CerDIP, PDIP, packages; JA is specified for device soldered to printed circuit board for SOIC packages. ORDERING GUIDE +IN B Package Options TA = 25∞C VOS max (V) 400 400 400 800 1000 1000 Cerdip 14-Pin Plastic Operating Temperature Range OP470GP OP470GS MIL MIL IND IND XIND XIND OP470AY* OP470EY OP470FY* JA3 Package Type V+ +IN A –IN B –IN A OUT B OUT A OUT C OUT D –IN D *Not for new design; obsolete April 2002. For military processed devices, please refer to the standard Microcircuit Drawing (SMD) available at www.dscc.dla.mil/programs/milspec/default.asp SMD Part Number ADI Equivalent 59628856501CA 596288565012A 596288565013A* OP470AYMDA OP470ARCMDA OP470ATCMDA –IN C +IN C V– +IN D DIE SIZE 0.163 0.106 INCH, 17,278 SQ. mm (4.14 2.69 mm, 11.14 SQ. mm) Figure 1. Dice Characteristics *Not for new designs; obsolete April 2002. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP470 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. B –5– WARNING! ESD SENSITIVE DEVICE 5 5 4 3 I/F CORNER = 5Hz 4 AT 1kHz 3 2 1 10 100 FREQUENCY – Hz 1k 10 TA = 25C VS = 15V 10 0% 2 4 6 TIME – Secs 20 15 TPC 2. Voltage Noise Density vs. Supply Voltage 8 10 TPC 3. 0.1 Hz to 10 Hz Noise 140 TA = 25C VS = 15V 10 INPUT OFFSET VOLTAGE – V VS = 15V 1.0 I/F CORNER = 200Hz 0.1 10 90 SUPPLY VOLTAGE – V TPC 1. Voltage Noise Density vs. Frequency 10.0 100 0 5 0 100 1k FREQUENCY – Hz TPC 4. Current Noise Density vs. Frequency 120 100 80 60 40 20 0 –75 –50 10k CHANGE IN OFFSET VOLTAGE – V 1 CURRENT NOISE – pA/ Hz AT 10Hz –25 0 25 50 75 TEMPERATURE – C 100 TPC 5. Input Offset Voltage vs. Temperature 20 INPUT OFFSET CURRENT – nA 9 15 10 5 8 7 6 5 4 3 2 1 0 1 2 3 TIME – Mins 4 5 TPC 6. Warm-Up Offset Voltage Drift 10 VS = 15V VCM = 0V TA = 25C VS = 15V 9 0 125 9 VS = 15V VCM = 0V TA = 25C VS = 15V 8 INPUT BIAS CURRENT – nA 2 1s 5mV 1 INPUT BIAS CURRENT – nA TA = 25C TA = 25C VS = 15V NOISE VOLTAGE – 100nV/DIV 10 9 8 7 6 VOLTAGE NOISE – nV/ Hz VOLTAGE NOISE – nV/ Hz OP470 –Typical Performance Characteristics 7 6 5 4 3 2 8 7 6 5 1 0 –75 –50 –25 0 25 50 75 TEMPERATURE – C TPC 7. Input Bias Current vs. Temperature 100 125 0 –75 –50 –25 0 25 50 75 TEMPERSTURE – C 100 125 TPC 8. Input Offset Current vs. Temperature –6– 4 –12.5 –7.5 –2.5 2.5 7.5 COMMON-MODE VOLTAGE – V 12.5 TPC 9. Input Bias Current vs. Common-Mode Voltage REV. B OP470 100 CMR – dB 90 80 70 60 50 40 30 TA = +25C 8 TOTAL SUPPLY CURRENT – mA TOTAL SUPPLY CURRENT – mA 110 10 10 TA = 25C VS = 15V TA = +125C TA = –55C 6 4 20 100 1k 10k FREQUENCY – Hz 100k 2 1M OPEN-LOOP GAIN – dB PSR – dB –PSR 60 50 +PSR 40 30 10 100 90 80 70 60 50 40 30 100 1k 10k 100k 1M 10M 100M –25 5 160 0 180 25 50 75 100 125 40 20 0 10k 100k 1M FREQUENCY – Hz 10M TPC 15. Closed-Loop Gain vs. Frequency 8 80 VS = 15V TA = 25C RL = 10k OPEN-LOOP GAIN – V/mV 140 0 60 –20 1k 5000 100 120 PHASE MARGIN = 58 10 TPC 14. Open-Loop Gain vs. Frequency GAIN GAIN – dB 3 FREQUENCY – Hz PHASE SHIFT – Degrees TA = 25C VS = 15V 15 10 4 TA = 25C VS = 15V 1 80 25 20 5 TPC 12. Total Supply Current vs. Supply Voltage 110 100 1k 10k 100k 1M 10M 100M FREQUENCY – Hz TPC 13. PSR vs. Frequency PHASE 6 TEMPERSTURE – C 20 10 0 20 10 0 1 7 80 140 130 120 110 100 70 8 2 –75 –50 20 TPC 11. Total Supply Current vs. Supply Voltage TA = 25C 90 80 15 VS = 15V SUPPLY VOLTAGE – V TPC 10. CMR vs. Frequency 140 130 120 10 5 0 CLOSED-LOOP GAIN – dB 10 1 4000 PHASE MARGIN – Degrees 10 9 3000 2000 1000 GBW 70 60 50 6 4 2 200 –5 –10 1 220 2 3 4 5 6 7 8 9 10 FREQUENCY – MHz TPC 16. Open-Loop Gain, Phase Shift vs. Frequency REV. B 0 0 5 10 15 20 SUPPLY VOLTAGE – V 25 TPC 17. Open-Loop Gain vs. Supply Voltage –7– 40 –75 –50 –25 0 0 25 50 75 100 125 150 TEMPERATURE – C TPC 18. Gain-Bandwidth Product, Phase Margin vs. Temperature GAIN-BANDWIDTH PRODUCT – MHz 130 120 OP470 20 TA = 25C VS = 15V THD = 1% 16 20 16 12 8 12 NEGATIVE SWING 10 8 6 4 60 40 20 2 10k 100k 1M FREQUENCY – Hz 0 100 10M TPC 19. Maximum Output Swing vs. Frequency 1k LOAD RESISTANCE – 0 10k TPC 20. Maximum Output Voltage vs. Load Resistance 360 2.5 –SR 2.0 +SR AV = 100 60 CHANNEL SEPARATION – dB 120 3.0 1.5 150 140 130 120 110 100 90 80 70 AV = 1 0 100 1k 10k 100k 1M FREQUENCY – Hz 1000 TA = 25C VS = 15V VO = 20V p-p TO 10kHz 160 3.5 180 200 400 600 800 CAPACITIVE LOAD – pF 170 VS = 15V 240 0 TPC 21. Small-Signal Overshoot vs. Capacitive Load 4.0 TA = 25C VS = 15V SLEW RATE – V/s 300 TA = 25C VS = 15V VIN = 100mV AV = 1 80 POSITIVE SWING 14 4 0 1k OUTPUT IMPEDANCE – 100 TA = 25C VS = 15V OVERSHOOT – % 24 18 MAXIMUM OUTPUT – V PEAK-TO-PEAK AMPLITUDE – V 28 60 10M 100M 1.0 0 25 50 75 –75 –50 –25 TEMPERATURE – C 100 125 TPC 23. Slew Rate vs. Temperature TPC 22. Output Impedance vs. Frequency 50 10 100 1k 10k 100k FREQUENCY – Hz 1M 10M TPC 24. Channel Separation vs. Frequency 1 DISTORTION – % TA = 25C VS = 15V VO = 10V p-p RL = 2k TA = 25C VS = 15V AV = 1 100 90 TA = 25C VS = 15V AV = 1 100 90 0.1 0.01 AV = –10 100 1k FREQUENCY – Hz 10 0% 20µs 5V AV = 1 0.001 10 10 0% 50mV 0.2µs 10k TPC 25. Total Harmonic Distortion vs. Frequency TPC 26. Large-Signal Transient Response –8– TPC 27. Small-Signal Transient Response REV. B OP470 The total noise is referred to the input and at the output would be amplified by the circuit gain. Figure 4 shows the relationship between total noise at 1 kHz and source resistance. For RS < 1 kW the total noise is dominated by the voltage noise of the OP470. As RS rises above 1 kW, total noise increases and is dominated by resistor noise rather than by voltage or current noise of the OP470. When RS exceeds 20 kW, current noise of the OP470 becomes the major contributor to total noise. 5k 500 1/4 OP470 V1 20V p-p 50k 50 1/4 OP470 Figure 5 also shows the relationship between total noise and source resistance, but at 10 Hz. Total noise increases more quickly than shown in Figure 4 because current noise is inversely proportional to the square root of frequency. In Figure 5, current noise of the OP470 dominates the total noise when RS > 5 kW. V2 CHANNEL SEPARATION = 20 LOG V1 V2/1000 Figure 2. Channel Separation Test Circuit From Figures 4 and 5 it can be seen that to reduce total noise, source resistance must be kept to a minimum. In applications with a high source resistance, the OP400, with lower current noise than the OP470, will provide lower total noise. +18V 2 +1V 3 100 6 4 1 A 5 +1V 11 B 7 9 –1V TOTAL NOISE – nV/ Hz –18V 13 C 10 8 12 –1V D 14 OP11 10 OP400 OP471 OP470 RESISTOR NOISE ONLY Figure 3. Burn-In Circuit 1 100 The OP470 is a very low-noise quad op amp, exhibiting a typical voltage noise of only 3.2 nV÷Hz @ 1 kHz. The exceptionally low-noise characteristics of the OP470 are in part achieved by operating the input transistors at high collector currents since the voltage noise is inversely proportional to the square root of the collector current. Current noise, however, is directly proportional to the square root of the collector current. As a result, the outstanding voltage noise performance of the OP470 is gained at the expense of current noise performance, which is typical for low noise amplifiers. OP11 OP400 10 OP471 OP470 RESISTOR NOISE ONLY TOTAL NOISE AND SOURCE RESISTANCE The total noise of an op amp can be calculated by: En = (en ) + (in RS ) + (et ) 2 1 100 2 where: 1k 10k RS – SOURCE RESISTANCE – 100k Figure 5. Total Noise vs. Source Resistance (Including Resistor Noise) at 10 Hz En = total input referred noise en = up amp voltage noise in = op amp current noise et = source resistance thermal noise RS = source resistance REV. B 100k 100 To obtain the best noise performance in a circuit, it is vital to understand the relationship between voltage noise (en), current noise (in), and resistor noise (et). 2 1k 10k RS – SOURCE RESISTANCE – Figure 4. Total Noise vs. Source Resistance (Including Resistor Noise) at 1 kHz TOTAL NOISE – nV/ Hz APPLICATIONS INFORMATION Voltage and Current Noise –9– OP470 Figure 6 shows peak-to-peak noise versus source resistance over the 0.1 Hz to 10 Hz range. Once again, at low values of RS, the voltage noise of the OP470 is the major contributor to peak-to-peak noise with current noise the major contributor as RS increases. The crossover point between the OP470 and the OP400 for peak-to-peak noise is at RS = 17 kW. Source Device Impedance Strain gage <500 W Typically used in low frequency applications. The OP471 is a higher speed version of the OP470, with a slew rate of 8 V/ms. Noise of the OP471 is only slightly higher than the OP470. Like the OP470, the OP471 is unity-gain stable. Magnetic tapehead <1500 W Low IB very important to reduce self-magnetization problems when direct coupling is used. OP470 IB can be neglected. Magnetic phonograph cartridges <1500 W Similar need for low IB in direct coupled applications. OP470 will not introduce any selfmagnetization problem. PEAK-TO-PEAK NOISE – nV/ Hz 1000 OP11 OP400 OP471 Table I. Linear variable <1500 W differential transformer 100 OP470 Comments Used in rugged servo-feedback applications. Bandwidth of interest is 400 Hz to 5 kHz. For further information regarding noise calculations, see “Minimization of Noise in Op Amp Applications,” Application Note AN-15. RESISTOR NOISE ONLY NOISE MEASUREMENTS— PEAK-TO-PEAK VOLTAGE NOISE 10 100 1k 10k RS – SOURCE RESISTANCE – 100k Figure 6. Peak-To-Peak Noise (0.1 Hz to 10 Hz) vs. Source Resistance (Includes Resistor Noise) For reference, typical source resistances of some signal sources are listed in Table I. The circuit of Figure 7 is a test setup for measuring peak-to-peak voltage noise. To measure the 200 nV peak-to-peak noise specification of the OP470 in the 0.1 Hz to 10 Hz range, the following precautions must be observed: 1. The device must be warmed up for at least five minutes. As shown in the warm-up drift curve, the offset voltage typically changes 5 mV due to increasing chip temperature after power-up. In the 10-second measurement interval, these temperature-induced effects can exceed tens of nanovolts. 2. For similar reasons, the device must be well-shielded from air currents. Shielding also minimizes thermocouple effects. 3. Sudden motion in the vicinity of the device can also “feedthrough” to increase the observed noise. R3 1.24k R1 5 R2 5 C1 2F OP470 DUT OP27E R5 909 R4 200 C4 0.22F R6 600k D1 1N4148 D2 OP15E 1N4148 R9 306k R8 10k R10 65.4k R11 65.4k C3 0.22F R14 4.99k OP15E R13 5.9k C2 0.032F eOUT C5 1F R12 10k GAIN = 50,000 VS = 5V Figure 7. Peak-To-Peak Voltage Noise Test Circuit (0.1 Hz to 10 Hz) –10– REV. B OP470 4. The test time to measure 0.1 Hz to 10 Hz noise should not exceed 10 seconds. As shown in the noise-tester frequency-response curve of Figure 8, the 0.1 Hz corner is defined by only one pole. The test time of 10 seconds acts as an additional pole to eliminate noise contribution from the frequency band below 0.1 Hz. The OP470 is a monolithic device with four identical amplifiers. The noise voltage density of each individual amplifier will match, giving: eOUT = 101 5. A noise-voltage-density test is recommended when measuring noise on a large number of units. A 10 Hz noise voltage-density measurement will correlate well with a 0.1 Hz to 10 Hz peak-to-peak noise reading, since both results are determined by the white noise and the location of the 1/f corner frequency. Ê ˆ 4en 2 = 101 (2en ) Ë ¯ NOISE MEASUREMENT—CURRENT NOISE DENSITY The test circuit shown in Figure 10 can be used to measure current noise density. The formula relating the voltage output to current noise density is: 6. Power should be supplied to the test circuit by well bypassed low noise supplies, e.g. batteries. These will minimize output noise introduced via the amplifier supply pins. 2 in = 100 ( Ê nOUT ˆ Á ˜ - 40nV / Ë G ¯ ) 2 Hz RS where: GAIN – dB 80 G = gain of 10000 RS = 100 kW source resistance 60 R3 1.24k R1 5 40 R2 100k OP470 DUT 20 en OUT TO SPECTRUM ANALYZER OP27E 0 0.01 R5 8.06k 0.1 1 FREQUENCY – Hz 10 100 R4 200 Figure 8. 0.1 Hz to 10 Hz Peak-to-Peak Voltage Noise Test Circuit Frequency Response GAIN = 50,000 VS = 5V Figure 10. Current Noise Density Test Circuit NOISE MEASUREMENT—NOISE VOLTAGE DENSITY The circuit of Figure 9 shows a quick and reliable method of measuring the noise voltage density of quad op amps. Each individual amplifier is series-connected and is in unity-gain, save the final amplifier which is in a noninverting gain of 101. Since the ac noise voltages of each amplifier are uncorrelated, they add in rms fashion to yield: eOUT = 101 Ê ˆ e 2 + enB 2 + enC 2 + enD 2 Ë nA ¯ R1 100 1/4 OP470 1/4 OP470 1/4 OP470 R2 10k 1/4 OP470 eOUT TO SPECTRUM ANALYZER eOUT (nV Hz) = 101(2en) VS = 15V Figure 9. Noise Voltage Density Test Circuit REV. B –11– OP470 R1 CAPACITIVE LOAD DRIVING AND POWER SUPPLY CONSIDERATIONS The OP470 is unity-gain stable and is capable of driving large capacitive loads without oscillating. Nonetheless, good supply bypassing is highly recommended. Proper supply bypassing reduces problems caused by supply line noise and improves the capacitive load driving capability of the OP470. OP470 2V/s In the standard feedback amplifier, the op amp’s output resistance combines with the load capacitance to form a low pass filter that adds phase shift in the feedback network and reduces stability. A simple circuit to eliminate this effect is shown in Figure 11. The added components, C1 and R3, decouple the amplifier from the load capacitance and provide additional stability. The values of C1 and R3 shown in Figure 11 are for a load capacitance of up to 1000 pF when used with the OP470. V+ C2 10F + R2 VIN R1 OP470 100* *SEE TEXT R3 50 C4 10F + APPLICATIONS Low Noise Amplifier A simple method of reducing amplifier noise by paralleling amplifiers is shown in Figure 13. Amplifier noise, depicted in Figure 14, is around 2 nV/÷Hz @ 1 kHz (R.T.I.). Gain for each paralleled amplifier and the entire circuit is 1000. The 200 W resistors limit circulating currents and provide an effective output resistance of 50 W. The amplifier is stable with a 10 nF capacitive load and can supply up to 30 mA of output drive. VOUT CL 1000pF C5 0.1F * During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input, and a current, limited only by the output short-circuit protection, will be drawn by the signal generator. With Rf £ 500 W, the output is capable of handling the current requirements (IL < 20 mA at 10 V); the amplifier will stay in its active mode and a smooth transition will occur. When Rf > 3 kW, a pole created by Rf and the amplifier’s input capacitance (2 pF) creates additional phase shift and reduces phase margin. A small capacitor (20 pF to 50 pF) in parallel with Rf helps eliminate this problem. C3 0.1F C1 1000pF Figure 12. Pulsed Operation V– PLACE SUPPLY DECOUPLING CAPACITORS AT OP470 +15V VIN Figure 11. Driving Large Capacitive Loads In applications where the OP470’s inverting or noninverting inputs are driven by a low source impedance (under 100 W) or connected to ground, if V+ is applied before V–, or when V is disconnected, excessive parasitic currents will flow. Most applications use dual tracking supplies and with the device supply pins properly bypassed, power-up will not present a problem. A source resistance of at least 100 W in series with all inputs (Figure 11) will limit the parasitic currents to a safe level if V– is disconnected. It should be noted that any source resistance, even 100 W, adds noise to the circuit. Where noise is required to be kept at a minimum, a germanium or Schottky diode can be used to clamp the V- pin and eliminate the parasitic current flow instead of using series limiting resistors. For most applications, only one diode clamp is required per board or system. R1 50 –15V R4 50 R3 200 1/4 OP470E R2 50k R6 200 1/4 OP470E R5 50k R7 50 R9 200 1/4 OP470E R8 50k UNITY-GAIN BUFFER APPLICATIONS When Rf £ 100 W and the input is driven with a fast, large signal pulse(> 1 V), the output waveform will look as shown in Figure 12. VOUT = 1000VIN R10 50 R12 200 1/4 OP470E R11 50k Figure 13. Low Noise Amplifier –12– REV. B NOISE DENSITY – 0.58nV/ Hz/DIV REFERRED TO INPUT OP470 100 100 90 A OUT 10 A OUT 90 10 0% 0% 5V 5V 1ms Figure 16. Digital Panning Control Output Figure 14. Noise Density of Low Noise Amplifier, G = 1000 DIGITAL PANNING CONTROL Figure 15 uses a DAC-8408, quad 8-bit DAC to pan a signal between two channels. The complementary DAC current outputs two of the DAC-8408’s four DACs drive current-to-voltage converters built from a single quad OP470. The amplifiers have complementary outputs with the amplitudes dependent upon the digital code applied to the DAC. Figure 16 shows the complementary outputs for a 1 kHz input signal and digital ramp applied to the DAC data inputs. Distortion of the digital panning control is less than 0.01%. Gain error due to the mismatching between the internal DAC ladder resistors and the current-to-voltage feedback resistors is eliminated by using feedback resistors internal to the DAC. Of the four DACs available in the DAC-8408, only two DACs, A and C, actually pass a signal. DACs B and D are used to provide the additional feedback resistors needed in the circuit. If the VREFB and VREFD inputs remain unconnected, the current-to-voltage converters using RFBB and RFBD are unaffected by digital data reaching DACs B and D. 5V DAC-8408GP VDD RFBA 20pF VREFA SIDE A IN DAC A +15V IOUT1A 1/4 OP470E IOUT2A/2B DAC B A OUT –15V IOUT1B 20pF 1/4 OP470E A OUT 1/4 OP470E B OUT 1/4 OP470E B OUT RFBB RFBC VREFC SIDE B IN DAC C 20pF IOUT1C DAC DATA BUS PINS 9 (LSB) – 16 (MSB) IOUT2C/2D 5V 1k A/B 1k DAC D IOUT1D R/W 20pF DS1 RFBD DAC SELECT DS2 DGND Figure 15. Digital Panning Control Circuit REV. B –13– OP470 SQUELCH AMPLIFIER FIVE-BAND LOW-NOISE STEREO GRAPHIC EQUALIZER The circuit of Figure 17 is a simple squelch amplifier that uses a FET switch to cut off the output when the input signal falls below a preset limit. The graphic equalizer circuit shown in Figure 18 provides 15 dB of boost or cut over a 5-band range. Signal-to-noise ratio over a 20 kHz bandwidth is better than 100 dB referred to a 3 V rms input. Larger inductors can be replaced by active inductors but this reduces the signal-to-noise ratio. The input signal is sampled by a peak detector with a time constant set by C1 and R6. When the output of the peak detector (Vp), falls below the threshold voltage, (VTH), set by R8, the comparator formed by op amp C switches from V– to V+. This drives the gate of the N-channel FET high, turning it ON, reducing the gain of the inverting amplifier formed by op amp A to zero. C1 0.47F VIN R3 680 D2 1N4148 R5 100k C2 6.8F + 1/4 OP470E L1 1H R4 1k R14 100 VOUT R13 3.3k 60Hz TANTALUM 2N5434 R5 680 R2 10k VIN R2 3.3k 1/4 OP470E R1 47k R7 680 VOUT – –5VIN 1/4 OP470E B R4 1k 200Hz C4 0.22F + L3 1H R4 1k 800Hz TANTALUM R4 10k R3 2k L2 1H TANTALUM R1 2k 1/4 OP470E A C3 1F + R9 680 C5 0.047F + L4 1H R4 1k 3kHz TANTALUM D1 1N4148 C1 1F C6 R11 680 0.022F + 1/4 OP470E C R6 1M R7 10k V+ R4 1k 10kHz TANTALUM R4 10M = 1 SECOND L5 1H Figure 18. Five-Band Low Noise Graphic Equalizer C2 10F + R6 10k Figure 17. Squelch Amplifier –14– REV. B OP470 OUTLINE DIMENSIONS 14-Lead Ceramic Dip-Glass Hermetic Seal [CERDIP] 14-Lead Plastic Dual-in-Line Package [PDIP] (Q-14) (N-14) Dimensions shown in inches and (millimeters) 0.005 (0.13) MIN 14 0.685 (17.40) 0.665 (16.89) 0.645 (16.38) 0.098 (2.49) MAX 8 PIN 1 1 7 0.310 (7.87) 0.220 (5.59) 0.320 (8.13) 0.290 (7.37) 0.100 (2.54) BSC 0.785 (19.94) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) Dimensions shown in inches and (millimeters) 14 8 1 7 0.295 (7.49) 0.285 (7.24) 0.275 (6.99) 0.100 (2.54) BSC 0.060 (1.52) 0.015 (0.38) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) MIN 0.150 (3.81) MIN 0.070 (1.78) SEATING 15 PLANE 0 0.030 (0.76) 0.180 (4.57) MAX 0.015 (0.38) 0.008 (0.20) 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 0.022 (0.56) 0.060 (1.52) 0.018 (0.46) 0.050 (1.27) 0.014 (0.36) 0.045 (1.14) SEATING PLANE 0.150 (3.81) 0.135 (3.43) 0.120 (3.05) 0.015 (0.38) 0.010 (0.25) 0.008 (0.20) COMPLIANT TO JEDEC STANDARDS MO-095-AB CONTROLLING DIMENSIONS ARE IN INCH; MILLIMETERS DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 16-Lead Standard Small Outline Package [SOIC] Wide Body (RW-16) Dimensions shown in millimeters and (inches) 10.50 (0.4134) 10.10 (0.3976) 9 16 7.60 (0.2992) 7.40 (0.2913) 10.65 (0.4193) 10.00 (0.3937) 8 1 1.27 (0.0500) BSC 2.65 (0.1043) 2.35 (0.0925) 0.75 (0.0295) 45 0.25 (0.0098) 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 0.51 (0.0201) 0.33 (0.0130) SEATING PLANE 0.32 (0.0126) 0.23 (0.0091) 8 0 1.27 (0.0500) 0.40 (0.0157) COMPLIANT TO JEDEC STANDARDS MS-013AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN REV. B –15– ADV611/ADV612 Revision History Location Page 10/02—Data Sheet changed from REV. A to REV. B. Edits to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4/02—Data Sheet changed from REV. 0 to REV. A. 28-Lead LCC (RC-Suffix) deleted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 C00305–0–10/02(B) Edits to 16-Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 28-Lead LCC (TC-Suffix) deleted . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 PRINTED IN U.S.A. Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 –16– REV. B