AD822-EP Data Sheet

Single-Supply, Rail-to-Rail
Low Power FET-Input Op Amp
AD822-EP
Supports defense and aerospace applications (AQEC
standard)
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Photodiode preamps
Active filters
12-bit to 14-bit data acquisition systems
Low power references and regulators
8 V+
OUT1 1
–IN1 2
7 OUT2
+IN1 3
6 –IN2
V– 4
AD822-EP
5 +IN2
Figure 1. 8-Lead SOIC_N (R Suffix)
GENERAL DESCRIPTION
The AD822-EP is a dual precision, low power FET input op
amp that can operate from a single supply of 5 V to 30 V or dual
supplies of ±2.5 V to ±15 V. It has true single-supply capability
with an input voltage range extending below the negative rail,
allowing the AD822 to accommodate input signals below
ground in the single-supply mode. Output voltage swing
extends to within 10 mV of each rail, providing the maximum
output dynamic range.
100
10
1
10
100
1k
FREQUENCY (Hz)
10k
09208-002
ENHANCED PRODUCT FEATURES
CONNECTION DIAGRAM
INPUT VOLTAGE NOISE (nV/√Hz)
True single-supply operation
Input voltage range extends below ground
Output swings rail-to-rail
Single-supply capability from 5 V to 30 V
Dual-supply capability from ±2.5 V to ±15 V
High load drive
Capacitive load drive of 350 pF, G = +1
Minimum output current of 15 mA
Excellent ac performance for low power
800 μA maximum quiescent current per amplifier
Unity-gain bandwidth: 1.8 MHz
Slew rate of 3 V/μs
Good dc performance
800 μV maximum input offset voltage
2 μV/°C typical offset voltage drift
25 pA maximum input bias current
Low noise
13 nV/√Hz @ 10 kHz
No phase inversion
09208-001
FEATURES
Figure 2. Input Voltage Noise vs. Frequency
Offset voltage of 800 μV maximum, offset voltage drift of 2 μV/°C,
input bias currents below 25 pA, and low input voltage noise
provide dc precision with source impedances up to a gigaohm.
The 1.8 MHz unity-gain bandwidth, –93 dB THD at 10 kHz,
and 3 V/μs slew rate are provided with a low supply current of
800 μA per amplifier.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
AD822-EP
TABLE OF CONTENTS
Features .............................................................................................. 1 Absolute Maximum Ratings ......................................................... 10 Enhanced Product Features ............................................................ 1 Thermal Resistance .................................................................... 10 Applications....................................................................................... 1 ESD Caution................................................................................ 10 Connection Diagram ....................................................................... 1 Typical Performance Characteristics ........................................... 11 General Description ......................................................................... 1 Outline Dimensions ....................................................................... 18 Revision History ............................................................................... 2 Ordering Guide .......................................................................... 18 Specifications..................................................................................... 4 REVISION HISTORY
6/10—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
AD822-EP
The AD822-EP drives up to 350 pF of direct capacitive load as a
follower and provides a minimum output current of 15 mA.
This allows the amplifier to handle a wide range of load conditions.
Its combination of ac and dc performance, plus the outstanding
load drive capability, results in an exceptionally versatile amplifier
for the single-supply user.
1V
100
5V
90
VOUT
10
0V
(GND)
Rev. 0 | Page 3 of 20
.... .... .... .... .... .... .... .... .... ....
1V
Figure 3. Gain-of-2 Amplifier; VS = 5 V, 0 V,
VIN = 2.5 V Sine Centered at 1.25 V, RL = 100 Ω
09208-003
0%
Full details about this enhanced product are available in the
AD822 data sheet, which should be consulted in conjunction
with this data sheet.
20µs
.
The AD822-EP operates over the military temperature range of
−55°C to +125°C.
The AD822-EP is offered in an 8-lead SOIC_N package.
1V
.... .... .... .... .... .... .... .... .... ....
AD822-EP
SPECIFICATIONS
VS = 0 V, 5 V @ TA = 25°C, VCM = 0 V, VOUT = 0.2 V, unless otherwise noted.
Table 1.
Parameter
DC PERFORMANCE
Initial Offset
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
At TMAX
Input Offset Current
At TMAX
Open-Loop Gain
Test Conditions/Comments
VOUT = 0.2 V to 4 V
RL = 100 kΩ
RL = 10 kΩ
TMIN to TMAX
RL = 1 kΩ
T Grade
Typ
0.1
0.5
2
2
0.5
2
0.5
VCM = 0 V to 4 V
TMIN to TMAX
TMIN to TMAX
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
f = 0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
Harmonic Distortion
f = 10 kHz
DYNAMIC PERFORMANCE
Unity-Gain Frequency
Full Power Response
Slew Rate
Settling Time
To 0.1%
To 0.01%
MATCHING CHARACTERISTICS
Initial Offset
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
Crosstalk @ f = 1 kHz
Crosstalk @ f = 100 kHz
Min
500
400
80
80
15
10
Max
Unit
0.8
1.2
mV
mV
μV/°C
pA
nA
pA
nA
25
6
20
1000
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
150
30
2
25
21
16
13
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
18
0.8
fA p-p
fA/√Hz
−93
dB
VOUT p-p = 4.5 V
1.8
210
3
MHz
kHz
V/μs
VOUT = 0.2 V to 4.5 V
VOUT = 0.2 V to 4.5 V
1.4
1.8
μs
μs
RL = 10 kΩ to 2.5 V
VOUT = 0.25 V to 4.75 V
1.0
1.6
3
20
RL = 5 kΩ
RL = 5 kΩ
Rev. 0 | Page 4 of 20
−130
−93
mV
mV
μV/°C
pA
dB
dB
AD822-EP
Parameter
INPUT CHARACTERISTICS
Input Voltage Range 1 , TMIN to TMAX
Common-Mode Rejection Ratio (CMRR)
TMIN to TMAX
Input Impedance
Differential
Common Mode
OUTPUT CHARACTERISTICS
Output Saturation Voltage 2
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL – VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
Capacitive Load Drive
POWER SUPPLY
Quiescent Current, TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
Test Conditions/Comments
Min
VCM = 0 V to 2 V
VCM = 0 V to 2 V
−0.2
66
66
T Grade
Typ
Max
Unit
+4
80
V
dB
dB
1013||0.5
1013||2.8
Ω||pF
Ω||pF
ISINK = 20 μA
5
ISOURCE = 20 μA
10
ISINK = 2 mA
40
ISOURCE = 2 mA
80
ISINK = 15 mA
300
ISOURCE = 15 mA
800
7
10
14
20
55
80
110
160
500
1000
1500
1900
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
1.6
mA
dB
dB
15
12
350
V+ = 5 V to 15 V
1
66
66
1.24
80
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (V+ − 1 V) to V+. Common-mode error
voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply.
2
VOL − VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC − VOH is defined as the difference
between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. 0 | Page 5 of 20
AD822-EP
VS = ±5 V @ TA = 25°C, VCM = 0 V, VOUT = 0 V, unless otherwise noted.
Table 2.
Parameter
DC PERFORMANCE
Initial Offset
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
At TMAX
Input Offset Current
At TMAX
Open-Loop Gain
Test Conditions/Comments
VOUT = −4 V to +4 V
RL = 100 kΩ
RL = 10 kΩ
TMIN to TMAX
RL = 1 kΩ
T Grade
Typ
0.1
0.5
2
2
0.5
2
0.5
VCM = −5 V to +4 V
TMIN to TMAX
TMIN to TMAX
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
f = 0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
Harmonic Distortion
f = 10 kHz
DYNAMIC PERFORMANCE
Unity-Gain Frequency
Full Power Response
Slew Rate
Settling Time
to 0.1%
to 0.01%
MATCHING CHARACTERISTICS
Initial Offset
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
Crosstalk @ f = 1 kHz
Crosstalk @ f = 100 kHz
INPUT CHARACTERISTICS
Input Voltage Range 1 , TMIN to TMAX
Common-Mode Rejection Ratio (CMRR)
TMIN to TMAX
Input Impedance
Differential
Common Mode
Min
400
400
80
80
20
10
Max
Unit
0.8
1.5
mV
mV
μV/°C
pA
nA
pA
nA
25
6
20
1000
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
150
30
2
25
21
16
13
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
18
0.8
fA p-p
fA/√Hz
−93
dB
VOUT p-p = 9 V
1.9
105
3
MHz
kHz
V/μs
VOUT = 0 V to ±4.5 V
VOUT = 0 V to ±4.5 V
1.4
1.8
μs
μs
RL = 10 kΩ
VOUT = ±4.5 V
1.0
3
3
25
RL = 5 kΩ
RL = 5 kΩ
VCM = −5 V to +2 V
VCM = −5 V to +2 V
Rev. 0 | Page 6 of 20
−130
−93
−5.2
66
66
+4
mV
mV
μV/°C
pA
dB
dB
80
V
dB
dB
1013||0.5
1013||2.8
Ω||pF
Ω||pF
AD822-EP
Parameter
OUTPUT CHARACTERISTICS
Output Saturation Voltage 2
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
Capacitive Load Drive
POWER SUPPLY
Quiescent Current, TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
1
2
Test Conditions/Comments
Min
T Grade
Typ
ISINK = 20 μA
5
ISOURCE = 20 μA
10
ISINK = 2 mA
40
ISOURCE = 2 mA
80
ISINK = 15 mA
300
ISOURCE = 15 mA
800
Max
Unit
7
10
14
20
55
80
110
160
500
1000
1500
1900
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
1.6
mA
dB
dB
15
12
350
VSY = ±5 V to ±15 V
66
66
1.3
80
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (V+ − 1 V) to V+. Common-mode error
voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply.
VOL − VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC − VOH is defined as the difference
between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. 0 | Page 7 of 20
AD822-EP
VS = ±15 V @ TA = 25°C, VCM = 0 V, VOUT = 0 V, unless otherwise noted.
Table 3.
Parameter
DC PERFORMANCE
Initial Offset
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
At TMAX
Input Offset Current
At TMAX
Open-Loop Gain
Test Conditions/Comments
VOUT = −10 V to +10 V
RL = 100 kΩ
RL = 10 kΩ
TMIN to TMAX
RL = 1 kΩ
T Grade
Typ
0.4
0.5
2
2
40
0.5
2
0.5
VCM = 0 V
VCM = −10 V
VCM = 0 V
TMIN to TMAX
TMIN to TMAX
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
f = 0.1 Hz to 10 Hz
f = 10 Hz
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
Harmonic Distortion
f = 10 kHz
DYNAMIC PERFORMANCE
Unity-Gain Frequency
Full Power Response
Slew Rate
Settling Time
to 0.1%
to 0.01%
MATCHING CHARACTERISTICS
Initial Offset
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
Crosstalk @ f = 1 kHz
Crosstalk @ f = 100 kHz
INPUT CHARACTERISTICS
Input Voltage Range 1 , TMIN to TMAX
Common-Mode Rejection Ratio (CMRR)
TMIN to TMAX
Input Impedance
Differential
Common Mode
Min
500
500
100
100
30
20
Max
Unit
2
3
mV
mV
μV/°C
pA
pA
nA
pA
nA
25
6
20
2000
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
500
45
2
25
21
16
13
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
18
0.8
fA p-p
fA/√Hz
−85
dB
VOUT p-p = 20 V
1.9
45
3
MHz
kHz
V/μs
VOUT = 0 V to ±10 V
VOUT = 0 V to ±10 V
4.1
4.5
μs
μs
RL = 10 kΩ
VOUT = ±10 V
3
4
3
25
RL = 5 kΩ
RL = 5 kΩ
VCM = −15 V to +12 V
VCM = −15 V to +12 V
Rev. 0 | Page 8 of 20
−130
−93
−15.2
70
70
+14
mV
mV
μV/°C
pA
dB
dB
80
V
dB
dB
1013||0.5
1013||2.8
Ω||pF
Ω||pF
AD822-EP
Parameter
OUTPUT CHARACTERISTICS
Output Saturation Voltage 2
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
Capacitive Load Drive
POWER SUPPLY
Quiescent Current, TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
1
2
Test Conditions/Comments
Min
T Grade
Typ
ISINK = 20 μA
5
ISOURCE = 20 μA
10
ISINK = 2 mA
40
ISOURCE = 2 mA
80
ISINK = 15 mA
300
ISOURCE = 15 mA
800
Max
Unit
7
10
14
20
55
80
110
160
500
1000
1500
1900
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
1.8
mA
dB
dB
20
15
350
VSY = ±5 V to ±15 V
70
70
1.4
80
This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (V+ − 1 V) to V+. Common-mode error
voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply.
VOL − VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC − VOH is defined as the difference
between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. 0 | Page 9 of 20
AD822-EP
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 4.
Parameter
Supply Voltage
Internal Power Dissipation
8-Lead SOIC_N (R)
Input Voltage
Output Short-Circuit Duration
Differential Input Voltage
Storage Temperature Range (R)
Operating Temperature Range
Maximum Junction Temperature
Lead Temperature
(Soldering, 60 sec)
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Rating
±18 V
Table 5. Thermal Resistance
Observe Maximum
Junction Temperature
((V+) + 0.2 V) to
((V−) − 20 V)
Indefinite
±30 V
–65°C to +150°C
−55°C to +125°C
150°C
260°C
Package Type
8-lead SOIC_N (R)
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 10 of 20
θJA
160
θJC
43
Unit
°C/W
AD822-EP
TYPICAL PERFORMANCE CHARACTERISTICS
70
5
VS = 0V, 5V
INPUT BIAS CURRENT (pA)
NUMBER OF UNITS
60
50
40
30
20
0
VS = 0V, +5V AND ±5V
VS = ±5V
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
OFFSET VOLTAGE (mV)
0.3
0.4
0.5
–5
–5
09208-004
0
–0.5
Figure 4. Typical Distribution of Offset Voltage (390 Units)
–3
–2
–1
0
1
2
COMMON-MODE VOLTAGE (V)
4
3
5
Figure 7. Input Bias Current vs. Common-Mode Voltage; VS = 5 V, 0 V, and
VS = ±5 V
16
1k
VS = ±5V
VS = ±15V
INPUT BIAS CURRENT (pA)
14
12
10
% IN BIN
–4
09208-007
10
8
6
4
100
10
1
–8
–6
–4
–2
0
2
4
6
OFFSET VOLTAGE DRIFT (µV/°C)
8
10
0.1
–16
09208-005
0
–12 –10
Figure 5. Typical Distribution of Offset Voltage Drift (100 Units)
–8
–4
0
4
8
COMMON-MODE VOLTAGE (V)
–12
12
16
09208-008
2
Figure 8. Input Bias Current vs. Common-Mode Voltage; VS = ±15 V
50
100k
45
10k
INPUT BIAS CURRENT (pA)
35
30
25
20
15
10
1k
100
10
1
0
0
1
2
3
4
5
6
7
INPUT BIAS CURRENT (pA)
8
9
10
Figure 6. Typical Distribution of Input Bias Current (213 Units)
0.1
20
40
60
80
100
TEMPERATURE (°C)
120
140
Figure 9. Input Bias Current vs. Temperature; VS = 5 V, VCM = 0 V
Rev. 0 | Page 11 of 20
09208-009
5
09208-006
NUMBER OF UNITS
40
AD822-EP
40
INPUT ERROR VOLTAGE (µV)
OPEN-LOOP GAIN (V/V)
10M
VS = ±15V
1M
VS = 0V, +5V
VS = 0V, +3V
100k
RL = 20kΩ
20
POS RAIL
RL = 2kΩ
NEG RAIL
POS RAIL
0
POS
RAIL
–20
NEG RAIL
RL = 100kΩ
100k
NEG RAIL
–40
60
120
180
240
OUTPUT VOLTAGE FROM SUPPLY RAILS (mV)
300
Figure 13. Input Error Voltage with Output Voltage Within 300 mV of Either
Supply Rail for Various Resistive Loads; VS = ±5 V
Figure 10. Open-Loop Gain vs. Load Resistance
10M
INPUT VOLTAGE NOISE (nV/√Hz)
1k
RL = 100kΩ
OPEN-LOOP GAIN (V/V)
0
09208-013
1k
10k
LOAD RESISTANCE (Ω)
09208-010
10k
100
VS = ±15V
1M
VS = 0V, +5V
VS = ±15V
RL = 10kΩ
VS = 0V, +5V
100k
VS = ±15V
RL = 600Ω
100
10
–20
0
20
40
60
80
TEMPERATURE (°C)
100
120
140
1
1
1k
10k
Figure 14. Input Voltage Noise vs. Frequency
Figure 11. Open-Loop Gain vs. Temperature
300
–40
–50
200
RL = 10kΩ
ACL = –1
–60
100
RL = 10kΩ
RL = 100kΩ
THD (dB)
INPUT ERROR VOLTAGE (V)
100
FREQUENCY (Hz)
10
09208-014
–40
09208-011
VS = 0V, +5V
10k
–60
0
–70
VS = 0V, +3V; VOUT = 2.5V p-p
–80
VS = ±15V; VOUT = 20V p-p
–100
–90
RL = 600Ω
–200
VS = ±5V; VOUT = 9V p-p
–100
–8
–4
0
4
OUTPUT VOLTAGE (V)
8
12
16
Figure 12. Input Error Voltage vs. Output Voltage for Resistive Loads
–110
100
1k
10k
FREQUENCY (Hz)
100k
Figure 15. Total Harmonic Distortion (THD) vs. Frequency
Rev. 0 | Page 12 of 20
09208-015
–12
09208-012
VS = 0V, +5V; VOUT = 4.5V p-p
–300
–16
AD822-EP
100
100
80
80
90
GAIN
40
40
20
20
PHASE MARGIN (Degrees)
60
60
0
0
RL = 2kΩ
CL = 100pF
60
50
40
30
20
10
1k
100
10k
100k
FREQUENCY (Hz)
–20
10M
1M
0
10
Figure 16. Open-Loop Gain and Phase Margin vs. Frequency
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 19. Common-Mode Rejection vs. Frequency
1k
5
COMMON-MODE ERROR VOLTAGE (mV)
ACL = +1
VS = ±15V
100
OUTPUT IMPEDANCE (Ω)
VS = 0V, +5V
VS = 0V, +3V
09208-019
–20
10
VS = ±15V
70
09208-016
OPEN-LOOP GAIN (dB)
PHASE
COMMON-MODE REJECTION (dB)
80
10
1
0.1
NEGATIVE
RAIL
4
POSITIVE
RAIL
3
+25°C
2
+125°C
–55°C
1
–55°C
10k
100k
FREQUENCY (Hz)
1k
1M
10M
0
–1
3
Figure 20. Absolute Common-Mode Error vs. Common-Mode Voltage from
Supply Rails (VS − VCM)
Figure 17. Output Impedance vs. Frequency
1000
8
OUTPUT SATURATION VOLTAGE (mV)
12
1%
4
0.01%
ERROR
0.1%
0
0.01%
–4
1%
–8
–16
0
1
2
3
SETTLING TIME (µs)
4
5
09208-018
–12
Figure 18. Output Swing and Error vs. Settling Time
100
VS – VOH
VOL – VS
10
0
0.001
0.01
0.1
1
LOAD CURRENT (mA)
10
Figure 21. Output Saturation Voltage vs. Load Current
Rev. 0 | Page 13 of 20
100
09208-021
16
OUTPUT SWING FROM 0 TO ±VOLTS
0
1
2
COMMON-MODE VOLTAGE FROM SUPP LY RAILS (V)
09208-020
0.01
100
09208-017
+125°C
AD822-EP
100
90
POWER SUPPLY REJECTION (dB)
ISOURCE = 10mA
ISINK = 10mA
100
ISOURCE = 1mA
ISINK = 1mA
10
ISOURCE = 10µA
ISINK = 10µA
80
70
+PSRR
60
50
40
–PSRR
30
20
1
–60
–40
–20
0
60
20
40
80
TEMPERATURE (°C)
100
120
140
0
10
100
10k
100k
FREQUENCY (Hz)
1M
10M
Figure 25. Power Supply Rejection vs. Frequency
Figure 22. Output Saturation Voltage vs. Temperature
30
80
70
VS = ±15V
RL = 2kΩ
25
VS = ±15V
60
50
OUTPUT VOLTAGE (V)
SHORT-CIRCUIT CURRENT LIMIT (mA)
1k
09208-025
10
09208-022
OUTPUT SATURATION VOLTAGE (mV)
1000
–OUT
VS = ±15V
40
VS = 0V, +5V
30
+
VS = 0V, +3V
–
–
20
VS = 0V, +5V
10
+
+
VS = 0V, +3V
20
15
10
5
VS = 0V, +5V
–20
0
20
40
60
80
TEMPERATURE (°C)
100
120
140
Figure 23. Short-Circuit Current Limit vs. Temperature
T = +125°C
1400
T = –55°C
1000
800
600
400
200
4
8
12
16
20
24
28
TOTAL SUPPLY VOLTAGE (V)
32
36
09208-024
QUIESCENT CURRENT (µA)
T = +25°C
1200
0
100k
1M
FREQUENCY (Hz)
Figure 26. Large Signal Frequency Response
1600
0
0
10k
Figure 24. Quiescent Current vs. Supply Voltage vs. Temperature
Rev. 0 | Page 14 of 20
10M
09208-026
–40
09208-023
VS = 0V, +3V
0
–60
AD822-EP
–70
5V
5µs
–80
100
90
CROSSTALK (dB)
–90
–100
–110
–120
10
0%
–140
300
1k
3k
10k
30k
FREQUENCY (Hz)
100k
300k
09208-028
09208-032
–130
1M
Figure 31. Large Signal Response Unity-Gain Follower; VS = ±15 V, RL = 10 kΩ
Figure 27. Crosstalk vs. Frequency
10mV
V+
0.01µF
100
90
8
+
VIN
500ns
1/2
AD822-EP
VOUT
100pF
RL
–
09208-029
0.01µF
4
10
Figure 28. Unity-Gain Follower
09208-033
0%
5V
Figure 32. Small Signal Response Unity-Gain Follower; VS = ±15 V, RL = 10 kΩ
10µs
100
90
1V
2µs
100
90
10
09208-030
0%
10
GND
VOUT
Figure 33. VS = 5 V, 0 V; Unity-Gain Follower Response to 0 V to 4 V Step
V+
20kΩ
20V p-p
3
AD822-EP
0.01µF
7
1
+
5kΩ
1/2
AD822-EP
5kΩ
8
6
VIN
+
1/2
AD822-EP
5
RL
–
100pF
4
CROSSTALK = 20 log
VOUT
10VIN
0.1µF
V–
1µF
09208-031
VIN
Figure 30. Crosstalk Test Circuit
Rev. 0 | Page 15 of 20
VOUT
09208-035
1/2
V+
1µF
+
–
2.2kΩ
–
2
8
0.1µF
09208-034
Figure 29. 20 V p-p, 25 kHz Sine Wave Input; Unity-Gain Follower; VS = ±15 V,
RL = 600 Ω
0%
Figure 34. Unity-Gain Follower
AD822-EP
VIN
10kΩ
20kΩ
VOUT
V+
10mV
2µs
0.01µF
100
8
90
–
1/2
AD822-EP
+
100pF
09208-036
RL
4
10
Figure 35. Gain-of-Two Inverter
0%
09208-039
GND
1V
2µs
Figure 38. VS = 5 V, 0 V; Gain-of-2 Inverter Response to 20 mV Step,
Centered 20 mV Below Ground, RL = 10 kΩ
100
90
1V
2µs
100
10
0%
09208-037
GND
10
Figure 36. VS = 5 V, 0 V; Unity-Gain Follower Response to 0 V to 5 V Step
09208-040
GND
10mV
Figure 39. VS = 5 V, 0 V; Gain-of-2 Inverter Response to 2.5 V Step,
Centered −1.25 V Below Ground, RL = 10 kΩ
2µs
100
90
500mV
10µs
100
90
10
0%
09208-038
GND
10
Figure 37. VS = 5 V, 0 V; Unity-Gain Follower Response to 40 mV Step,
Centered 40 mV above Ground, RL = 10 kΩ
0%
09208-041
GND
Figure 40. VS = 3 V, 0 V; Gain-of-2 Inverter, VIN = 1.25 V, 25 kHz, Sine Wave
Centered at −0.75 V, RL = 600 Ω
Rev. 0 | Page 16 of 20
AD822-EP
1V
100
10µs
.... .... .... .... .... .... .... .... .... ....
90
10
GND
0%
.... .... .... .... .... .... .... .... .... ....
1V
(a)
1V
+Vs
100
10µs
1V
.... .... .... .... ...
... .... .... .... ....
90
10
0%
.... .... .... .... .... .... .... .... .... ....
1V
(b)
5V
RP
VIN
VOUT
09208-042
GND
Figure 41. (a) Response with RP = 0; VIN from 0 V to +VS
(b) VIN = 0 V to +VS + 200 mV
VOUT = 0 V to +VS
RP = 49.9 kΩ
Rev. 0 | Page 17 of 20
AD822-EP
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
1
5
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
SEATING
PLANE
6.20 (0.2441)
5.80 (0.2284)
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.50 (0.0196)
0.25 (0.0099)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Figure 42. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model 1
AD822TRZ-EP
AD822TRZ-EP-R7
1
Temperature Range
−55°C to +125°C
−55°C to +125°C
Package Description
8-Lead SOIC_N
8-Lead SOIC_N
Z = RoHS Compliant Part.
SPICE model is available at www.analog.com.
Rev. 0 | Page 18 of 20
Package Option
R-8
R-8
AD822-EP
NOTES
Rev. 0 | Page 19 of 20
AD822-EP
NOTES
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09208-0-6/10(0)
Rev. 0 | Page 20 of 20
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