93LC76 DATA SHEET (01/20/2010) DOWNLOAD

Not recommended for new designs –
Please use 93LC76C or 93LC86C.
93LC76/86
8K/16K 2.5V Microwire Serial EEPROM
Features:
PDIP Package
1
CLK
DI
DO
2
3
4
8
VCC
7
6
5
PE
ORG
93LC76/86
CS
93LC76/86
• Single Supply with Programming Operation down
to 2.5V
• Low-Power CMOS Technology
- 1 mA active current typical
- 5 A standby current (typical) at 3.0V
• ORG Pin Selectable Memory Configuration
1024 x 8 or 512 x 16-Bit Organization (93LC76)
2048 x 8 or 1024 x 16-Bit Organization (93LC86)
• Self-Timed Erase and Write Cycles
(including auto-erase)
• Automatic ERAL before WRAL
• Power On/Off Data Protection Circuitry
• Industry Standard 3-Wire Serial I/O
• Device Status Signal during Erase/Write Cycles
• Sequential Read Function
• 1,000,000 Erase/Write Cycles Ensured
• Data Retention > 200 years
• 8-Pin PDIP/SOIC Package
• Temperature Ranges Available
- Commercial (C)
0°C to +70°C
- Industrial (I)
-40°C to +85°C
Package Types
8
VSS
SOIC Package
CS
CLK
DI
DO
1
2
3
4
7
6
5
VCC
PE
ORG
VSS
Block Diagram
VCC VSS
Description:
Memory
Array
The Microchip Technology Inc. 93LC76/86 are 8K and
16K low voltage serial Electrically Erasable PROMs.
The device memory is configured as x8 or x16 bits
depending on the ORG pin setup. Advanced CMOS
technology makes these devices ideal for low power
nonvolatile memory applications. These devices also
have a Program Enable (PE) pin to allow the user to
write-protect the entire contents of the memory array.
The 93LC76/86 is available in standard 8-pin PDIP and
8-pin surface mount SOIC packages.
Address
Decoder
Address
Counter
Data
Register
Output
Buffer
DO
DI
PE
CS
CLK
 2010 Microchip Technology Inc.
Mode
Decode
Logic
Clock
Generator
DS21131F-page 1
93LC76/86
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
VCC .............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ........................................................................................................ -0.6V to Vcc + 1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
Soldering temperature of leads (10 seconds) .......................................................................................................+300°C
ESD protection on all pins ..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to Absolute Maximum Rating
conditions for extended periods may affect device reliability.
1.1
AC Test Conditions
AC Waveform:
VLO = 2.0V
VHI = Vcc - 0.2V
(Note 1)
VHI = 4.0V for
(Note 2)
Timing Measurement Reference Level
Input
0.5 VCC
Output
0.5 VCC
Note 1: For VCC  4.0V
2: For VCC > 4.0V
DS21131F-page 2
 2010 Microchip Technology Inc.
93LC76/86
TABLE 1-1:
DC CHARACTERISTICS
DC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted:
VCC = +2.5V to +6.0V
Commercial (C): TA = 0°C to +70°C
Industrial
(I): TA = -40°C to +85°C
Parameter
High-level input voltage
Low-level input voltage
Low-level output voltage
High-level output voltage
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
Operating current
Standby current
Note 1:
Symbol
Min.
Max.
Units
2.0
0.7 VCC
-0.3
-0.3
—
—
2.4
VCC-0.2
-10
-10
—
VCC + 1
VCC + 1
0.8
0.2 VCC
0.4
0.2
—
—
10
10
7
V
V
V
V
V
V
V
V
A
A
pF
ICC write
ICC read
—
—
ICCS
—
3
1
500
100
30
mA
mA
A
A
A
VIH1
VIH2
VIL1
VIL2
VOL1
VOL2
VOH1
VOH2
ILI
ILO
CINT
Conditions
VCC  2.7V
VCC < 2.7V
VCC  2.7V
VCC < 2.7V
IOL = 2.1 mA; VCC = 4.5V
IOL =100 A; VCC = VCC Min.
IOH = -400 A; VCC = 4.5V
IOH = -100 A; VCC = VCC Min.
VIN = 0.1V to VCC
VOUT = 0.1V to VCC
(Note 1)
TA = +25°C, FCLK = 1 MHz
VCC = 5.5V
FCLK = 3 MHz; VCC = 5.5V
FCLK = 1 MHz; VCC = 3.0V
CLK = CS = 0V; VCC = 5.5V
CLK = CS = 0V; VCC = 3.0V
DI = PE = VSS
ORG = VSS or VCC
This parameter is periodically sampled and not 100% tested.
 2010 Microchip Technology Inc.
DS21131F-page 3
93LC76/86
TABLE 1-2:
AC CHARACTERISTICS
AC CHARACTERISTICS
Parameter
Applicable over recommended operating ranges shown below unless otherwise noted:
VCC = +2.5V to +6.0V
Commercial (C): TA = 0°C to +70°C
Industrial
(I): TA = -40°C to +85°C
Symbol
Min.
Max.
Units
3
2
—
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ms
cycles
Clock frequency
FCLK
—
Clock high time
TCKH
Clock low time
TCKL
Chip select setup time
TCSS
Chip select hold time
Chip select low time
Data input setup time
TCSH
TCSL
TDIS
Data input hold time
TDIH
Data output delay time
TPD
200
300
100
200
50
100
0
250
50
100
50
100
—
Data output disable time
TCZ
—
Status valid time
Tsv
—
Program cycle time
TWC
TEC
TWL
—
—
—
—
1M
Endurance
Note 1:
2:
—
—
—
—
—
—
100
250
100
500
200
300
5
15
30
—
Conditions
4.5V VCC  6.0V
2.5V VCC  4.5V
4.5V VCC  6.0V
2.5V VCC  4.5V
4.5V VCC  6.0V
2.5V VCC  4.5V
4.5V VCC  6.0V, Relative to CLK
2.5V VCC  4.5V, Relative to CLK
—
Relative to CLK
4.5V VCC  6.0V, Relative to CLK
2.5V VCC <4.5V, Relative to CLK
4.5V VCC  6.0V, Relative to CLK
2.5V VCC  4.5V, Relative to CLK
4.5V VCC  6.0V, CL = 100 pF
2.5V VCC < 4.5V, CL = 100 pF
4.5V VCC  6.0V
2.5V  VCC < 4.5V (Note 1)
4.5V VCC  6.0V, CL = 100 pF
2.5V VCC <4.5V, CL = 100 pF
Erase/Write mode
ERAL mode
WRAL mode
25°C, Vcc = 5.0V, Block mode
(Note 2)
This parameter is periodically sampled and not 100% tested.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at
www.microchip.com.
DS21131F-page 4
 2010 Microchip Technology Inc.
93LC76/86
TABLE 1-3:
Instruction
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
TABLE 1-4:
Instruction
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
TABLE 1-5:
Instruction
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
TABLE 1-6:
Instruction
READ
EWEN
ERASE
ERAL
WRITE
WRAL
EWDS
INSTRUCTION SET FOR 93LC76: ORG=1 (1X16 ORGANIZATION)
SB
Opcode
1
1
1
1
1
1
1
10
00
11
00
01
00
00
Address
X A8 A7 A6 A5 A4 A3
1 1 X X X X X
X A8 A7 A6 A5 A4 A3
1 0 X X X X X
X A8 A7 A6 A5 A4 A3
0 1 X X X X X
0 0 X X X X X
Data In
A2
X
A2
X
A2
X
X
A1
X
A1
X
A1
X
X
A0
X
A0
X
A0
X
X
—
—
—
—
D15 - D0
D15 - D0
—
Req. CLK
Cycles
Data Out
D15 - D0
High-Z
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
High-Z
29
13
13
13
29
29
13
INSTRUCTION SET FOR 93LC76: ORG=0 (X8 ORGANIZATION)
SB
Opcode
1
1
1
1
1
1
1
10
00
11
00
01
00
00
Address
X A9 A8 A7 A6 A5 A4
1 1 X X X X X
X A9 A8 A7 A6 A5 A4
1 0 X X X X X
X A9 A8 A7 A6 A5 A4
0 1 X X X X X
0 0 X X X X X
A3
X
A3
X
A3
X
X
A2
X
A2
X
A2
X
X
A1 A0
X
A1 A0
X
A1 A0
X
X
Data In
Data Out
—
—
—
—
D7 - D0
D7 - D0
—
D7 - D0
High-Z
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
High-Z
Req. CLK
Cycles
22
14
14
14
22
22
14
INSTRUCTION SET FOR 93LC86: ORG=1 (X16 ORGANIZATION)
SB
Opcode
1
1
1
1
1
1
1
10
00
11
00
01
00
00
Address
A9 A8 A7 A6 A5 A4 A3
1 1 X X X X X
A9 A8 A7 A6 A5 A4 A3
1 0 X X X X X
A9 A8 A7 A6 A5 A4 A3
0 1 X X X X X
0 0 X X X X X
Data In
A2
X
A2
X
A2
X
X
A1
X
A1
X
A1
X
X
A0
—
X
—
A0
—
X
—
A0 D15 - D0
X D15 - D0
X
—
Req. CLK
Cycles
Data Out
D15 - D0
High-Z
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
High-Z
29
13
13
13
29
29
13
INSTRUCTION SET FOR 93LC86: ORG=0 (X8 ORGANIZATION)
SB
Opcode
1
1
1
1
1
1
1
10
00
11
00
01
00
00
 2010 Microchip Technology Inc.
Address
A10 A9 A8 A7 A6 A5 A4
1
1 X X X X X
A10 A9 A8 A7 A6 A5 A4
1
0 X X X X X
A10 A9 A8 A7 A6 A5 A4
0
1 X X X X X
0
0 X X X X X
A3
X
A3
X
A3
X
X
A2
X
A2
X
A2
X
X
A1 A0
X
A1 A0
X
A1 A0
X
X
Data In
Data Out
Req. CLK
Cycles
—
—
—
—
D7 - D0
D7 - D0
—
D7 - D0
High-Z
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
(RDY/BSY)
High-Z
22
14
14
14
22
22
14
DS21131F-page 5
93LC76/86
2.0
PRINCIPLES OF OPERATION
When the ORG pin is connected to VCC, the x16 organization is selected. When it is connected to ground,
the x8 organization is selected. Instructions, addresses
and write data are clocked into the DI pin on the rising
edge of the clock (CLK). The DO pin is normally held in
a high-Z state except when reading data from the
device, or when checking the Ready/Busy status
during a programming operation. The Ready/Busy
status can be verified during an erase/write operation
by polling the DO pin; DO low indicates that programming is still in progress, while DO high indicates the
device is ready. The DO will enter the high-impedance
state on the falling edge of the CS.
2.1
Start Condition
The Start bit is detected by the device if CS and DI are
both high with respect to the positive edge of CLK for
the first time.
Before a Start condition is detected, CS, CLK and DI
may change in any combination (except to that of a
Start condition), without resulting in any device operation (Read, Write, Erase, EWEN, EWDS, ERAL and
WRAL). As soon as CS is high, the device is no longer
in the Standby mode.
An instruction following a Start condition will only be
executed if the required amount of opcode, address
and data bits for any particular instruction are clocked
in.
2.3
Erase/Write Enable and Disable
(EWEN, EWDS)
The 93LC76/86 powers up in the Erase/Write Disable
(EWDS) state. All programming modes must be
preceded by an Erase/Write Enable (EWEN) instruction.
Once the EWEN instruction is executed, programming
remains enabled until an EWDS instruction is executed
or VCC is removed from the device. To protect against
accidental data disturb, the EWDS instruction can be
used to disable all erase/write functions and should
follow all programming operations. Execution of a READ
instruction is independent of both the EWEN and EWDS
instructions.
2.4
Data Protection
During power-up, all programming modes of operation
are inhibited until VCC has reached a level greater than
1.4V. During power-down, the source data protection
circuitry acts to inhibit all programming modes when
VCC has fallen below 1.4V.
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWEN instruction must be
performed before any ERASE or WRITE instruction can
be executed.
After execution of an instruction (i.e., clock in or out of
the last required address or data bit) CLK and DI
become “don't care” bits until a new Start condition is
detected.
2.2
DI/DO
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the read operation, if A0 is a logic high
level. Under such a condition the voltage level seen at
Data Out is undefined and will depend upon the relative
impedances of Data Out and the signal source driving
A0. The higher the current sourcing capability of A0,
the higher the voltage at the Data Out pin.
DS21131F-page 6
 2010 Microchip Technology Inc.
93LC76/86
3.0
DEVICE OPERATION
3.1
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 16-bit (x16 organization) or 8-bit
(x8 organization) output string. The output data bits will
toggle on the rising edge of the CLK and are stable
after the specified time delay (TPD). Sequential read is
possible when CS is held high and clock transitions
continue. The memory Address Pointer will
automatically increment and output data sequentially.
3.2
ERASE
The ERASE instruction forces all data bits of the
specified address to the logical “1” state. The self-timed
programming cycle is initiated on the rising edge of
CLK as the last address bit (A0) is clocked in. At this
point, the CLK, CS and DI inputs become “don’t cares”.
The DO pin indicates the Ready/Busy status of the
device if the CS is high. The Ready/Busy status will be
displayed on the DO pin until the next Start bit is
received as long as CS is high. Bringing the CS low will
place the device in Standby mode and cause the DO
pin to enter the high-impedance state. DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the register at the specified
address has been erased and the device is ready for
another instruction.
The erase cycle takes 3 ms per word (typical).
3.3
WRITE
The WRITE instruction is followed by 16 bits (or by 8
bits) of data to be written into the specified address.
The self-timed programming cycle is initiated on the
rising edge of CLK as the last data bit (D0) is clocked
in. At this point, the CLK, CS and DI inputs become
“don’t cares”.
The DO pin indicates the Ready/Busy status of the
device if the CS is high. The Ready/Busy status will be
displayed on the DO pin until the next Start bit is
received as long as CS is high. Bringing the CS low will
place the device in Standby mode and cause the DO
pin to enter the high-impedance state. DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the register at the specified
address has been written and the device is ready for
another instruction.
3.4
Erase All (ERAL)
The ERAL instruction will erase the entire memory array
to the logical “1” state. The ERAL cycle is identical to
the erase cycle except for the different opcode. The
ERAL cycle is completely self-timed and commences
on the rising edge of the last address bit (A0). Note that
the Least Significant 8 or 9 address bits are “don’t care”
bits, depending on selection of x16 or x8 mode. Clocking of the CLK pin is not necessary after the device has
entered the self clocking mode. The ERAL instruction is
ensured at VCC = +4.5V to +6.0V.
The DO pin indicates the Ready/Busy status of the
device if the CS is high. The Ready/Busy status will be
displayed on the DO pin until the next Start bit is
received as long as CS is high. Bringing the CS low will
place the device in Standby mode and cause the DO
pin to enter the high-impedance state. DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the entire device has been
erased and is ready for another instruction.
The ERAL cycle takes 15 ms maximum (8 ms typical).
3.5
Write All (WRAL)
The WRAL instruction will write the entire memory array
with the data specified in the command. The WRAL
cycle is completely self-timed and commences on the
rising edge of the last address bit (A0). Note that the
Least Significant 8 or 9 address bits are “don’t cares”,
depending on selection of x16 or x8 mode. Clocking of
the CLK pin is not necessary after the device has
entered the self clocking mode. The WRAL command
does include an automatic ERAL cycle for the device.
Therefore, the WRAL instruction does not require an
ERAL instruction but the chip must be in the EWEN
status. The WRAL instruction is ensured at Vcc = +4.5V
to +6.0V.
The DO pin indicates the Ready/Busy status of the
device if the CS is high. The Ready/Busy status will be
displayed on the DO pin until the next Start bit is
received as long as CS is high. Bringing the CS low will
place the device in Standby mode and cause the DO
pin to enter the high-impedance state. DO at logical “0”
indicates that programming is still in progress. DO at
logical “1” indicates that the entire device has been
written and is ready for another instruction.
The WRAL cycle takes 30 ms maximum (16 ms
typical).
The write cycle takes 3 ms per word (typical).
 2010 Microchip Technology Inc.
DS21131F-page 7
93LC76/86
FIGURE 3-1:
SYNCHRONOUS DATA TIMING
VIH
CS
TCSS
VIL
TCKH
TCKL
TCSH
VIH
CLK
VIL
TDIH
TDIS
VIH
DI
VIL
TPD
VOH
DO
(Read)
VOL
TCZ
TPD
TCZ
TSV
VOH
DO
(Program) VOL
Status Valid
The memory automatically cycles to the next register.
FIGURE 3-2:
READ
TCSL
CS
CLK
DI
1
0
AN
...
A0
High-impedance
DO
FIGURE 3-3:
1
0
DN
...
D0
DN
...
D0
EWEN
TCSL
CS
CLK
DI
1
0
0
1
1
X
...
X
ORG = VCC, 8 X’s
ORG = VSS, 9 X’s
DS21131F-page 8
 2010 Microchip Technology Inc.
93LC76/86
FIGURE 3-4:
EWDS
TCSL
CS
CLK
DI
1
0
0
0
0
...
X
X
ORG = VCC, 8 X’s
ORG = VSS, 9 X’S
FIGURE 3-5:
WRITE
CS
Standby
CLK
DI
1
0
1
AN
...
A0
DN
...
D0
TCZ
High-impedance
DO
BUSY
Ready
TWC
FIGURE 3-6:
WRAL
Standby
CS
CLK
DI
1
0
0
0
1
X
...
X
DN
...
D0
TCZ
DO
ORG = VCC, 8 X’s
ORG = VSS, 9 X’s
High-impedance
BUSY
Ready
TWL
Ensured at Vcc = +4.5V to +6.0V.
 2010 Microchip Technology Inc.
DS21131F-page 9
93LC76/86
FIGURE 3-7:
ERASE
CS
Standby
CLK
DI
1
1
1
...
AN
...
A0
TCZ
High-impedance
DO
BUSY
Ready
TWC
FIGURE 3-8:
ERAL
CS
Standby
CLK
DI
1
0
0
1
0
X
...
X
TCZ
High-impedance
BUSY
DO
ORG=VCC, 8 X’s
ORG=VSS, 9 X’s
DS21131F-page 10
Ready
TEC
Ensured at VCC = +4.5V to +6.0V.
 2010 Microchip Technology Inc.
93LC76/86
4.0
PIN DESCRIPTIONS
TABLE 4-1:
PIN FUNCTION TABLE
Name
Function
CS
Chip Select
CLK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
VSS
Ground
ORG
Memory Configuration
PE
Program Enable
VCC
Power Supply
4.1
Chip Select (CS)
A high level selects the device. A low level deselects
the device and forces it into Standby mode. However, a
programming cycle which is already initiated will be
completed, regardless of the CS input signal. If CS is
brought low during a program cycle, the device will go
into Standby mode as soon as the programming cycle
is completed.
CS must be low for 250 ns minimum (TCSL) between
consecutive instructions. If CS is low, the internal
control logic is held in a Reset status.
4.2
Serial Clock (CLK)
The Serial Clock is used to synchronize the communication between a master device and the 93LC76/86.
Opcode, address and data bits are clocked in on the
positive edge of CLK. Data bits are also clocked out on
the positive edge of CLK.
CLK can be stopped anywhere in the transmission
sequence (at high or low level) and can be continued
anytime with respect to clock high time (TCKH) and
clock low time (TCKL). This gives the controlling master
freedom in preparing opcode, address and data.
CLK is a “don't care” if CS is low (device deselected). If
CS is high, but Start condition has not been detected,
any number of clock cycles can be received by the
device without changing its status (i.e., waiting for Start
condition).
After detection of a Start condition the specified number
of clock cycles (respectively low-to-high transitions of
CLK) must be provided. These clock cycles are
required to clock in all opcode, address, and data bits
before an instruction is executed (see Table 1-3
through Table 1-6 for more details). CLK and DI then
become “don't care” inputs waiting for a new Start
condition to be detected.
Note:
4.3
CS must go low between consecutive
instructions, except when performing a
sequential read (Refer to Section 3.1
“READ” for more detail on sequential
reads).
Data In (DI)
Data In is used to clock in a Start bit, opcode, address
and data synchronously with the CLK input.
4.4
Data Out (DO)
Data Out is used in the Read mode to output data
synchronously with the CLK input (TPD after the
positive edge of CLK).
This pin also provides Ready/Busy status information
during erase and write cycles. Ready/Busy status information is available when CS is high. It will be displayed
until the next Start bit occurs as long as CS stays high.
4.5
Organization (ORG)
When ORG is connected to VCC, the x16 memory organization is selected. When ORG is tied to VSS, the x8
memory organization is selected. There is an internal
pull-up resistor on the ORG pin that will select x16
organization when left unconnected.
4.6
Program Enable (PE)
This pin allows the user to enable or disable the ability
to write data to the memory array. If the PE pin is
floated or tied to VCC, the device can be programmed.
If the PE pin is tied to VSS, programming will be
inhibited. There is an internal pull-up on this device that
enables programming if this pin is left floating.
CLK cycles are not required during the self-timed
WRITE (i.e., auto erase/write) cycle.
 2010 Microchip Technology Inc.
DS21131F-page 11
93LC76/86
5.0
PACKAGING INFORMATION
5.1
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DS21131F-page 12
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 2010 Microchip Technology Inc.
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 2010 Microchip Technology Inc.
DS21131F-page 13
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 2010 Microchip Technology Inc.
93LC76/86
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 2010 Microchip Technology Inc.
DS21131F-page 15
93LC76/86
APPENDIX A:
REVISION HISTORY
Revision E
Added note to page 1 header (Not recommended for
new designs).
Added Section 5.0: Package Marking Information.
Added On-line Support page.
Updated document format.
Revision F
Removed Preliminary Status.
DS21131F-page 16
 2010 Microchip Technology Inc.
93LC76/86
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape® or Microsoft®
Internet Explorer. Files are also available for FTP
download from our FTP site.
Connecting to the Microchip Internet
Web Site
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits. The Hot Line
Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
042003
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
 2010 Microchip Technology Inc.
DS21131F-page 17
93LC76/86
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Device: 93LC76/86
Y
N
Literature Number: DS21131F
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21131F-page 18
 2010 Microchip Technology Inc.
93LC76/86
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
/XX
XXX
Device
Temperature
Range
Package
Pattern
Device
93LC76/86: Microwire Serial EEPROM
93LC76T/86T: Microwire Serial EEPROM (Tape and Reel)
Temperature Range
Blank
I
=
0C to
= -40C to
Package
P
SN
=
=
+70C
+85C
Plastic DIP (300 mil Body), 8-lead
Plastic SOIC (150 mil Body), 8-lead
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2010 Microchip Technology Inc.
DS21131F-page 19
93LC76/86
NOTES:
DS21131F-page 20
 2010 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
rfPIC and UNI/O are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total
Endurance, TSHARC, UniWinDriver, WiperLock and ZENA
are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
 2010 Microchip Technology Inc.
DS21131F-page 21
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
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Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
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Italy - Milan
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Netherlands - Drunen
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Tel: 34-91-708-08-90
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UK - Wokingham
Tel: 44-118-921-5869
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Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
01/05/10
DS21131F-page 22
 2010 Microchip Technology Inc.