LTC3025 - 300mA Micropower VLDO Linear Regulator

LTC3025
300mA Micropower
VLDO Linear Regulator
FEATURES
DESCRIPTION
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The LTC®3025 is a micropower, VLDOTM (very low dropout) linear regulator which operates from input voltages as
low as 0.9V. The device is capable of supplying 300mA of
output current with a typical dropout voltage of only 45mV.
A BIAS supply is required to run the internal reference and
LDO circuitry while output current comes directly from
the IN supply for high efficiency regulation. The low 0.4V
internal reference voltage allows the LTC3025 output to
be programmed to much lower voltages than available in
common LDOs (range of 0.4V to 3.6V). The output voltage
is programmed via two ultrasmall SMD resistors.
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Wide Input Voltage Range: 0.9V to 5.5V
Stable with Ceramic Capacitors
Very Low Dropout: 45mV at 300mA
Adjustable Output Range: 0.4V to 3.6V
±2% Voltage Accuracy over Temperature
Supply Load
Low Noise: 80μVRMS (10Hz to 100kHz)
BIAS Voltage Range: 2.5V to 5.5V
Fast Transient Recovery
Shutdown Disconnects Load from VIN and VBIAS
Low Operating Current: IIN = 4μA, IBIAS = 50μA Typ
Low Shutdown Current: IIN = 1μA, IBIAS = 0.01μA Typ
Output Current Limit
Thermal Overload Protection
Available in 6-Lead (2mm × 2mm) DFN Package
APPLICATIONS
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Low Power Handheld Devices
Low Voltage Logic Supplies
DSP Power Supplies
Cellular Phones
Portable Electronic Equipment
Handheld Medical Instruments
Post Regulator for Switching Supply Noise Rejection
The LTC3025’s low quiescent current makes it an ideal
choice for use in battery-powered systems. For 3-cell
NiMH and single cell Li-Ion applications, the BIAS voltage
can be supplied directly from the battery while the input
can come from a high efficiency buck regulator, providing
a high efficiency, low noise output.
Other features include high output voltage accuracy,
excellent transient response, stability with ultralow ESR
ceramic capacitors as small as 1μF, short-circuit and
thermal overload protection and output current limiting.
The LTC3025 is available in a tiny, low profile (0.75mm)
6-lead DFN (2mm × 2mm) package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and VLDO
and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
TYPICAL APPLICATION
1.2V Output Voltage from 1.5V Input Supply
1MHz VIN Supply Rejection
50
Li-Ion
OR
3-CELL
NiMH
1.5V HIGH
EFFICIENCY 1.5V
DC/DC
BUCK
0.1μF
OUT
80.6k
LTC3025
IN
ADJ
0.1μF
OFF ON
40.2k
SHDN
GND
3025 TA01
1μF
VOUT = 1.2V
IOUT ≤ 300mA
45
COUT = 10μF
40
REJECTION (dB)
BIAS
35
COUT = 1μF
30
25
20
15
10
5 BIAS = 3.6V
VOUT = 1.2V
0
1.2 1.4 1.6
IOUT = 100mA
IOUT = 300mA
1.8 2.0
VIN (V)
2.2
2.4
2.6
3025 TA01b
3025fd
1
LTC3025
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Notes 1, 2)
TOP VIEW
VBIAS, VIN to GND......................................... –0.3V to 6V
SHDN to GND............................................... –0.3V to 6V
ADJ to GND.................................................. –0.3V to 6V
VOUT ........................................–0.3V to VIN + 0.3V or 6V
Operating Junction Temperature Range
(Note 3).................................................. –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
Output Short-Circuit Duration .......................... Indefinite
BIAS 1
6 SHDN
GND 2
7
5 ADJ
IN 3
4 OUT
DC6 PACKAGE
6-LEAD (2mm s 2mm) PLASTIC DFN
TJMAX = 125°C, θJA = 102°C/W, θJC = 20°C/W
EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3025EDC#PBF
LTC3025EDC#TRPBF
LBDY
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC#PBF
LTC3025IDC#TRPBF
LBDY
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3025EDC
LTC3025EDC#TR
LBDY
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
LTC3025IDC
LTC3025IDC#TR
LBDY
6-Lead (2mm × 2mm) Plastic DFN
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 1.5V, VBIAS = 3.6V, VOUT = 1.2V, COUT = 1μF, CIN = 0.1μF,
CBIAS = 0.1μF (all capacitors ceramic) unless otherwise noted. (Note 3)
PARAMETER
CONDITIONS
MIN
TYP
VIN Operating Voltage (Note 4)
l
0.9
VBIAS Operating Voltage (Note 4)
l
2.5
VBIAS Undervoltage Lockout
l
2.2
MAX
UNITS
5.5
V
5.5
V
2.5
V
VIN Operating Current
IOUT = 10μA
l
4
10
μA
VBIAS Operating Current
IOUT = 10μA
l
50
80
μA
VIN Shutdown Current
VSHDN = 0V
1
5
μA
VBIAS Shutdown Current
VSHDN = 0V
0.01
1
μA
VADJ Regulation Voltage (Note 5)
1mA ≤ IOUT ≤ 300mA, 1.5V ≤ VIN ≤ 5V
1mA ≤ IOUT ≤ 300mA, 1.5V ≤ VIN ≤ 5V
0.4
0.4
0.405
0.408
V
V
0
50
l
0.395
0.392
IADJ ADJ Input Current
VADJ = 0.45V
OUT Load Regulation (Referred to ADJ Pin)
∆IOUT = 1mA to 300mA
–50
–0.2
mV
VIN Line Regulation (Referred to ADJ Pin)
VIN = 1.5V to 5V, VBIAS = 3.6V, VOUT = 1.2V,
IOUT = 1mA
0.07
mV
BIAS Line Regulation (Referred to ADJ Pin)
VIN = 1.5V, VBIAS = 2.6V to 5V, VOUT = 1.2V
IOUT = 1mA
l
1.7
5.5
nA
mV
3025fd
2
LTC3025
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 1.5V, VBIAS = 3.6V, VOUT = 1.2V, COUT = 1μF, CIN = 0.1μF,
CBIAS = 0.1μF (all capacitors ceramic) unless otherwise noted. (Note 3)
PARAMETER
CONDITIONS
MIN
VIN to VOUT Dropout Voltage (Notes 4, 6, 7)
VBIAS = 2.8V, VIN = 1.5V, VADJ = 0.37V, IOUT = 300mA
TYP
MAX
UNITS
45
100
mV
1.4
V
l
VBIAS to VOUT Dropout Voltage (Note 4)
l
IOUT Continuous Output Current
l
300
mA
IOUT Current Limit
VADJ = 0V
680
mA
en Output Voltage Noise
f = 10Hz to 100kHz, IOUT = 300mA
80
μVRMS
VIH SHDN Input High Voltage
l
VIL SHDN Input Low Voltage
l
0.9
V
0.3
V
IIH SHDN Input High Current
SHDN = 1.2V
–1
1
μA
IL SHDN Input Low Current
SHDN = 0V
–1
1
μA
Note 4: For the LTC3025, a regulated output voltage will only be available
when the minimum IN and BIAS Operating Voltages as well as the IN to
OUT and BIAS to OUT Dropout Voltages are all satisfied.
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: Dropout voltage is minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to VIN – VDROPOUT.
Note 7: The DFN output FET on-resistance in dropout is guaranteed by
correlation to wafer level measurements.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: The LTC3025 regulator is tested and specified under pulse
load conditions such that TJ ≈ TA. The LTC3025 is 100% production
tested at 25°C. Performance at –40°C and 125°C is assured by design,
characterization and correlation with statistical process control. The
LTC3025I is guaranteed to meet performance specifications over the full
–40°C and 125°C operating junction temperature range.
TYPICAL PERFORMANCE CHARACTERISTICS
Operating BIAS Current
vs Output Load
Dropout Voltage vs IOUT
VBIAS = 2.8V
TA = 125°C
50
TA = 25°C
40
IBIAS (μA)
DROPOUT VOLTAGE (mV)
60
30
TA = –40°C
20
10
0
0
50
BIAS No Load Operating Current
400
100
200
150
IOUT (mA)
250
300
3025 G01
80
350
VIN = 1.5V
70 VOUT = 1.2V
300
60
250
IBIAS (μA)
70
125°C
200
25°C
150
125°C
50
–40°C
40
25°C
30
–40°C
100
20
50
10
0
0.01
0.1
1
10
IOUT (mA)
100
1000
3025 G02
0
2.5
3
3.5
4.5
4
VBIAS (V)
5
5.5
3025 G03
3025fd
3
LTC3025
TYPICAL PERFORMANCE CHARACTERISTICS
VIN No Load Operating Current
VBIAS = 5V
VOUT = 0.8V
VBIAS = 5V
8
85°C
6
403
5
125°C
25°C
–40°C
4
3
25°C
–40°C
4
2
2
1
401
400
399
398
397
0
0.5
0
0.5
2.5
3.5
5.5
4.5
396
1.5
2.5
VIN (V)
3.5
50
25
0
75
TEMPERATURE (°C)
–25
VIN (V)
125
Burst Mode DC/DC Buck Ripple
Rejection
Current Limit vs VIN Voltage
1000
100
3025 G06
3025 G05
SHDN Threshold vs Temperature
1600
VBIAS = 3.6V
1400 VOUT = 0V
900
VIN
AC
100mV/DIV
CURRENT LIMIT (mA)
800
VBIAS = 5V
700
600
VBIAS = 2.5V
500
400
300
1200
1000
800
VOUT
AC
10mV/DIV
600
400
200
50
25
0
75
TEMPERATURE (°C)
–25
100
0
125
1
0
2
3
VIN (V)
4
5
3025 G07
6
BIAS Ripple Rejection
vs Frequency
70
70
60
COUT = 10μF
50
REJECTION (dB)
REJECTION (dB)
60
40
COUT = 1μF
30
10
3025 G09
3025 G08
VIN Ripple Rejection
vs Frequency
20
10μs/DIV
VIN = 1.8V
VOUT = 1.5V
COUT = 1μF
IOUT = 50mA
200
100
0
–50
395
–50
5.5
4.5
3025 G04
SHDN THRESHOLD (mV)
402
85°C
1.5
VBIAS = 3.6V
VIN = 1.5V
IOUT = 10μA
404
6
10
IIN (μA)
Adjust Voltage vs Temperature
405
ADJUST VOLTAGE (mV)
12
VIN Shutdown Current
7
IIN (μA)
14
0
100
1k
50
40
30
COUT = 1μF
20
VBIAS = 3.6V
VIN = 1.5V
VOUT = 1.2V
IOUT = 100mA
10
10k
100k
1M
10M
FREQUENCY (Hz)
COUT = 10μF
VBIAS = 3.6V
VIN = 1.5V
VOUT = 1.2V
IOUT = 100mA
0
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
3025 G10
3025 G11
3025fd
4
LTC3025
TYPICAL PERFORMANCE CHARACTERISTICS
3MHz VIN Supply Rejection
Transient Response
50
250mA
REJECTION (dB)
45
40
COUT = 10μF
35
COUT = 1μF
IOUT
10mA
30
25
VOUT
AC
10mV/DIV
20
15
10
5 VBIAS = 3.6V
VOUT = 1.2V
0
1.2 1.4 1.6
IOUT = 100mA
IOUT = 300mA
1.8 2.0
VIN (V)
2.2
2.4
2.6
VIN = 1.5V
VOUT = 1.2V
VBIAS = 3.6V
COUT = 1μF
100μs/DIV
3025 G13
3025 G12
PIN FUNCTIONS
BIAS (Pin 1): BIAS Input Voltage. BIAS provides internal
power for LTC3025 circuitry. The BIAS pin should be locally bypassed to ground if the LTC3025 is more than a
few inches away from another source of bulk capacitance.
In general, the output impedance of a battery rises with
frequency, so it is usually advisable to include an input
bypass capacitor in battery-powered circuits. A capacitor
in the range of 0.01μF to 0.1μF is usually sufficient.
GND (Pin 2): Ground. Connect to a ground plane.
IN (Pin 3): Input Supply Voltage. The output load current
is supplied directly from IN. The IN pin should be locally
bypassed to ground if the LTC3025 is more than a few inches
away from another source of bulk capacitance. In general,
the output impedance of a battery rises with frequency, so
it is usually advisable to include an input bypass capacitor
when supplying IN from a battery. A capacitor in the range
of 0.1μF to 1μF is usually sufficient.
OUT (Pin 4): Regulated Output Voltage. The OUT pin
supplies power to the load. A minimum ceramic output
capacitor of at least 1μF is required to ensure stability.
Larger output capacitors may be required for applications
with large transient loads to limit peak voltage transients.
See the Applications Information section for more information on output capacitance.
ADJ (Pin 5): Adjust Input. This is the input to the error
amplifier. The ADJ pin reference voltage is 0.4V referenced
to ground. The output voltage range is 0.4V to 3.6V and is
typically set by connecting ADJ to a resistor divider from
OUT to GND. See Figure 2.
SHDN (Pin 6): Shutdown Input, Active Low. This pin is
used to put the LTC3025 into shutdown. The SHDN pin
current is typically less than 10nA. The SHDN pin cannot
be left floating and must be tied to a valid logic level (such
as BIAS) if not used.
GND (Exposed Pad Pin 7): Ground and Heat Sink. Must
be soldered to PCB ground plane or large pad for optimal
thermal performance.
3025fd
5
LTC3025
BLOCK DIAGRAM
1
BIAS
REFERENCE
6
SHDN
SHDN
SOFT-START
0.4V
IN
+
–
2
3
6μA
OUT
GND
ADJ
4
5
3025 BD
APPLICATIONS INFORMATION
Operation (Refer to Block Diagram)
The LTC3025 is a micropower, VLDO (very low dropout)
linear regulator which operates from input voltages as
low as 0.9V. The device provides a high accuracy output
that is capable of supplying 300mA of output current with
a typical dropout voltage of only 45mV. A single ceramic
capacitor as small as 1μF is all that is required for output
bypassing. A low reference voltage allows the LTC3025
output to be programmed to much lower voltages than
available in common LDOs (range of 0.4V to 3. 6V).
As shown in the Block Diagram, the BIAS input supplies
the internal reference and LDO circuitry while all output
current comes directly from the IN input for high efficiency
regulation. The low quiescent supply currents IIN = 4μA,
IBIAS = 50μA drop to IIN = 1μA, IBIAS = 0.01μA typical in
shutdown making the LTC3025 an ideal choice for use in
battery-powered systems.
The device includes current limit and thermal overload
protection. The fast transient response of the follower
output stage overcomes the traditional tradeoff between
dropout voltage, quiescent current and load transient
response inherent in most LDO regulator architectures.
The LTC3025 also includes overshoot detection circuitry
which brings the output back into regulation when going
from heavy to light output loads (see Figure 1).
300mA
IOUT
0mA
VOUT
AC
20mV/DIV
VIN = 1.5V
VOUT = 1.2V
VBIAS = 3.6V
COUT = 1μF
100μs/DIV
3025 F01
Figure 1. LTC3025 Transient Response
Adjustable Output Voltage
The output voltage is set by the ratio of two external resistors as shown in Figure 2. The device servos the output
to maintain the ADJ pin voltage at 0.4V (referenced to
ground). Thus the current in R1 is equal to 0.4V/R1. For
good transient response, stability, and accuracy, the current
in R1 should be at least 8μA, thus the value of R1 should
be no greater than 50k. The current in R2 is the current in
R1 plus the ADJ pin bias current. Since the ADJ pin bias
current is typically <10nA, it can be ignored in the output
voltage calculation. The output voltage can be calculated
3025fd
6
LTC3025
APPLICATIONS INFORMATION
The LTC3025 operates at a relatively high gain of –0.7μV/
mA referred to the ADJ input. Thus a load current change
of 1mA to 300mA produces a –0.2mV drop at the ADJ
input. To calculate the change referred to the output simply multiply by the gain of the feedback network (i. e. ,1
+ R2/R1). For example, to program the output for 1.2V
choose R2/R1 = 2. In this example, an output current
change of 1mA to 300mA produces –0.2mV • (1 + 2) =
0.6mV drop at the output.
Because the ADJ pin is relatively high impedance (depending on the resistor divider used) , stray capacitance at this
pin should be minimized (<10pF) to prevent phase shift
in the error amplifier loop. Additionally, special attention
should be given to any stray capacitances that can couple
external signals onto the ADJ pin producing undesirable
output ripple. For optimum performance connect the ADJ
pin to R1 and R2 with a short PCB trace and minimize all
other stray capacitance to the ADJ pin.
( )
VOUT = 0.4V 1 R2
R1
OUT
R2
ADJ
COUT
increase the effective output capacitor value. High ESR
tantalum and electrolytic capacitors may be used, but
a low ESR ceramic capacitor must be in parallel at the
output. There is no minimum ESR or maximum capacitor
size requirements.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit large voltage and temperature coefficients as shown in Figures 3 and 4. When
used with a 2V regulator, a 1μF Y5V capacitor can lose as
much as 75% of its initial capacitance over the operating
20
BOTH CAPACITORS ARE 1μF,
10V, 0603 CASE SIZE
0
CHANGE IN VALUE (%)
using the formula in Figure 2. Note that in shutdown the
output is turned off and the divider current will be zero
once COUT is discharged.
X5R
–20
–40
Y5V
–60
–80
–100
R1
0
2
6
4
DC BIAS VOLTAGE (V)
GND
8
10
3025 F03
3025 F02
Figure 3. Ceramic Capacitor DC Bias Characteristics
Figure 2. Programming the LTC3025
20
Output Capacitance and Transient Response
CHANGE IN VALUE (%)
The LTC3025 is designed to be stable with a wide range of
ceramic output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. A
minimum output capacitor of 1μF with an ESR of 0.05Ω
or less is recommended to ensure stability. The LTC3025
is a micropower device and output transient response
will be a function of output capacitance. Larger values
of output capacitance decrease the peak deviations and
provide improved transient response for larger load current
changes. Note that bypass capacitors used to decouple
individual components powered by the LTC3025 will
0
X5R
–20
Y5V
–40
–60
–80
BOTH CAPACITORS ARE 1μF,
10V, 0603 CASE SIZE
–100
–50
0
25
50
–25
TEMPERATURE (°C)
75
3025 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
3025fd
7
LTC3025
APPLICATIONS INFORMATION
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are usually more suitable
for use as the output capacitor. The X7R type has better
stability across temperature, while the X5R is less expensive
and is available in higher values. In all cases, the output
capacitance should never drop below 0.4μF, or instability
or degraded performance may occur.
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be the output current
multiplied by the input/output voltage differential:
(IOUT) (VIN – VOUT)
Note that the BIAS current is less than 300μA even under
heavy loads, so its power consumption can be ignored
for thermal calculations.
The LTC3025 has internal thermal limiting designed to
protect the device during momentary overload conditions.
For continuous normal conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
For surface mount devices, heat sinking is accomplished
by using the heat-spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through holes can also be used to spread the heat generated by power devices.
The LTC3025 2mm × 2mm DFN package is specified as having a junction-to-ambient thermal resistance of 102°C/W,
which assumes a minimal heat spreading copper plane. The
actual thermal resistance can be reduced substantially by
connecting the package directly to a good heat spreading
ground plane. When soldered to 2500mm2 double-sided
1 oz. copper plane, the actual junction-to-ambient thermal
resistance can be less than 60°C/W.
Calculating Junction Temperature
Example: Given an output voltage of 1.2V, an input voltage
of 1.8V to 3V, an output current range of 0mA to 100mA
and a maximum ambient temperature of 50°C, what will
the maximum junction temperature be?
The power dissipated by the device will be equal to:
IOUT(MAX) (VIN(MAX) – VOUT)
where:
IOUT(MAX) = 100mA
VIN(MAX) = 3V
So:
P = 100mA(3V – 1.2V) = 0.18W
Even under worst-case conditions, the LTC3025’s BIAS pin
power dissipation is only about 1mW, thus can be ignored.
Assuming a junction-to-ambient thermal resistance of
102°C/W, the junction temperature rise above ambient
will be approximately equal to:
0.18W(102°C/W) = 18.4°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T = 50°C + 18.4°C = 68.4°C
Short-Circuit/Thermal Protection
The LTC3025 has built-in short-circuit current limiting as
well as overtemperature protection. During short-circuit
conditions, internal circuitry automatically limits the output
current to approximately 600mA. At higher temperatures, or
in cases where internal power dissipation causes excessive
self heating on chip, the thermal shutdown circuitry will
shut down the LDO when the junction temperature exceeds
approximately 150°C. It will re enable the LDO once the
junction temperature drops back to approximately 140°C.
3025fd
8
LTC3025
APPLICATIONS INFORMATION
The LTC3025 will cycle in and out of thermal shutdown
without latch-up or damage until the overstress condition
is removed. Long term overstress (TJ > 125°C) should be
avoided as it can degrade the performance or shorten the
life of the part.
Soft-Start Operation
The LTC3025 includes a soft-start feature to prevent
excessive current flow during start-up. When the LDO is
enabled, the soft-start circuitry gradually increases the LDO
reference voltage from 0V to 0.4V over a period of about
600μs. There is a short 700μs delay from the time the
part is enabled until the LDO output starts to rise. Figure 5
shows the start-up and shutdown output waveform.
SHDN
ON
OFF
1.2V
VOUT
200mV/DIV
0V
TA = 25°C
VIN = 1.5V
VBIAS = 3.6V
COUT = 1μF
RLOAD = 4Ω
500μs/DIV
3025 F05
VOUT Start-Up and Supply Sequencing
During power-up, the output shutdown circuitry is not
active below VIN of about 0.65V DC (typical). As a result,
the output voltage can drift up during power-up due to
leakage current (<1 mA typical) from VIN to VOUT . At 0.9V
input, the shutdown circuitry is active and the output is
actively held off. This usually causes no circuit problems
and is similar to 3-terminal regulators such as the LT3080,
LT1086 and LT317 which have no ground pin and can have
the output rise under some conditions. A slowly rising
VIN with the part enabled may result in non-monotonic
ramping of VOUT due to LDO circuitry becoming active at
VIN of about 0.65V (typical) as well.
With fast rising inputs (>1V/ms) or with sufficient resistive load on VOUT , output voltage rise during power-up is
reduced or eliminated. Such conditions also reduce or
eliminate non-monotonic initial power-up with the part
enabled. If VBIAS is sequenced up before VIN, the leakage
current from VIN to VOUT may increase until the shutdown
circuitry is active at a VIN of about 0.65V typical. Thus,
to minimize VOUT rise during start-up, sequence up VIN
before VBIAS. At VIN = 0.9V, the output is actively held off
in shutdown or it is actively held on when enabled under
all conditions.
Figure 5. Output Start-Up and Shutdown
3025fd
9
LTC3025
PACKAGE DESCRIPTION
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703 Rev B)
0.70 p0.05
2.55 p0.05
1.15 p0.05 0.61 p0.05
(2 SIDES)
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
1.42 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.125
TYP
0.56 p 0.05
(2 SIDES)
0.40 p 0.10
4
6
2.00 p0.10
(4 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
PIN 1 NOTCH
R = 0.20 OR
0.25 s 45o
CHAMFER
R = 0.05
TYP
0.200 REF
0.75 p0.05
(DC6) DFN REV B 1309
3
1
0.25 p 0.05
0.50 BSC
1.37 p0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3025fd
10
LTC3025
REVISION HISTORY
REV
DATE
C
07/10
(Revision history begins at Rev C)
DESCRIPTION
PAGE NUMBER
Added (Note 3) notation to “The l denotes” statement in Electrical Characteristics section
Updated Pin 7 in Pin Functions
D
01/11
2, 3
6
Added “VOUT Start-Up and Supply Sequencing” section
9
Updated Related Parts section
12
Updated graph G11
4
3025fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC3025
TYPICAL APPLICATION
High Efficiency 1.5V Step-Down Converter with Efficient 1.2V VLDO Output
OFF ON
1
0.1μF
VIN
2.7V
TO 5.5V
4
CIN**
4.7μF
CER
VIN
SW
3
LTC3406-1.5
1
RUN
VOUT
5
2.2μH*
VOUT
1.5V
600mA
OUT
BIAS
80.6k
LTC3025
3
IN
ADJ
1μF
VOUT = 1.2V
IOUT ≤ 300mA
5
40.2k
OFF ON
6
SHDN
GND
2
3025 TA02
+
COUT
10μF
CER
GND
4
*MURATA LQH32CN2R2M33
**TAIYO YUDEN JMK212BJ475MG
†
TAIYO YUDEN JMK316BJ106ML
Efficiency vs Output Current
100
EFFICIENCY (%)
90
VOUT = 1.5V
80
VOUT = 1.2V
70
60
50
40
0.1
1
10
100
OUTPUT CURRENT (mA)
1000
3025 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT®1761
100mA, Low Noise Micropower, LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 20μA, ISD < 1μA,
VOUT = Adj, 1.5V, 1.8V, 2V, 2.5V, 2.8V, 3V, 3.3V, 5V, ThinSOTTM Package.
Low Noise < 20μVRMSP-P, Stable with 1μF Ceramic Capacitors
LT1762
150mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.30V, IQ = 25μA, ISD < 1μA,
VOUT = Adj, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20μVRMSP-P
LTC1844
150mA, Very Low Dropout LDO
VIN: 1.6V to 6.5V, VOUT(MIN) = 1.25V, VDO = 0.08V, IQ = 40μA, ISD < 1μA,
VOUT = Adj, 1.5V, 1.8V, 2.5V, 2.8V, 3.3V, ThinSOT Package.
Low Noise < 30μVRMSP-P, Stable with 1μF Ceramic Capacitors
LT1962
300mA, Low Noise Micropower LDO
VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30μA, ISD < 1μA,
VOUT = 1.5, 1.8V, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20μVRMSP-P
LT1964
200mA, Low Noise Micropower, Negative LDO
VIN: –0.9V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30μA, ISD < 3μA,
VOUT = Adj, –5V, ThinSOT Package.
Low Noise < 30μVRMSP-P, Stable with Ceramic Capacitors
LT3020
100mA, Low Voltage, VLDO
VIN: 0.9V to 10V, VOUT(MIN) = 0.20V, VDO = 0.15V, IQ = 120μA, ISD < 3μA,
VOUT = Adj, DFN, MS8 Package
3025fd
12 Linear Technology Corporation
LT 0111 REV D • PRINTED IN USA
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