DS9701 16

RT9701
100mΩ
Ω Power Distribution Switches
General Description
Features
The RT9701 is an integrated 100mΩ power switch for
self-powered and bus-powered Universal Series Bus
(USB) applications. A built-in charge pump is used to
drive the N-Channel MOSFET that is free of parasitic
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body diode to eliminate any reversed current flow across
the switch when it is powered off. Its low quiescent current
(23uA) and small package (SOT-23-5) is particularly
suitable in battery-powered portable equipment.
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Several protection functions include soft start to limit inrush
current during plug-in, current limiting at 1.5A to meet
USB power requirement, and thermal shutdown to protect
damage under over current conditions.
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100mΩ
Ω Typ. High-Side NMOSFET (SOT-23-5)
Guaranteed 1.1A Continuous Current
1.5A Current Limit
Small SOT-23-5 Package Minimizes Board Space
Soft Start
Thermal Protection
Low 23uA Supply Current
Wide Input Voltage Range : 2.2V to 6V
UL Approved - #E219878
RoHS Compliant and 100% Lead (Pb)-Free
Applications
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Ordering Information
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RT9701
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Battery-Powered Equipment
Motherboard USB Power Switch
USB Device Power Switch
Hot-Plug Power Supplies
Battery-Charger Circuits
Package Type
B : SOT-23-5
BL : SOT-23-5 (L-Type)
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Lead Plating System
P : Pb Free
G : Green (Halogen Free and Pb Free)
Pin Configurations
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(TOP VIEW)
Note :
Richtek products are :
`
RoHS compliant and compatible with the current require-
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Suitable for use in SnPb or Pb-free soldering processes.
VOUT
EN
VOUT
VIN
5
4
5
4
ments of IPC/JEDEC J-STD-020.
2
2
VOUT GND VIN
3
VOUT GND VIN
SOT-23-5
Marking Information
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
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SOT-23-5 (L-Type)
Typical Application Circuit
RT9701xBL
VIN
VOUT
VIN
CIN
1uF
VIN
VOUT
GND
VOUT
* COUT
470uF
* 470uF, Low ESR Electrolytic
DS9701-16 April 2011
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1
RT9701
Test Circuits
VIN-SW
VIN
VIN
IOUT
VIN
Switch Off
VOUT
CL
GND
+
CIN
1uF
+
RT9701xBL
VIN
VOUT
RL
IL
VIN
+
CIN
1uF
VOUT
GND
Test Circuit 1
CL
+
RT9701xBL
VIN
VOUT
VOUT
VOUT
RL
Test Circuit 2
VIN
+
VOUT
CL
GND
+
EN
CIN
1uF
VOUT
IOUT
RT9701xB
VIN
VOUT
RL
IL
Chip Enable
Test Circuit 3
Test Circuit 2 is performed by charging an external tank of bulk capacitor to the input then applying this voltage to the
input of the unit.
All typical operating characteristics curves showed are referred to Test Circuit 1, unless specified to Test Circuit 2 or
Test Circuit 3.
Functional Pin Description
Pin Name
Pin Function
VIN
Power Input Voltage
VOUT
Output Voltage
GND
Ground
EN
Chip Enable (Active High)
Function Block Diagram
VIN
EN
Current
Limit
Bias
Charge
Pump
Control
NMOSFET
RS
(VIN)
(VOUT)
VOUT
Oscillator
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2
Thermal
Detection
GND
DS9701-16 April 2011
RT9701
Absolute Maximum Ratings
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Supply Voltage --------------------------------------------------------------------------------------------------------- 7V
Chip Enable ------------------------------------------------------------------------------------------------------------- −0.3V to 7V
Power Dissipation, PD @ TA = 25°C
SOT-23-5 ---------------------------------------------------------------------------------------------------------------- 0.25W
Package Thermal Resistance
SOT-23-5, θJA ----------------------------------------------------------------------------------------------------------- 250°C /W
Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260°C
Operating Junction Temperature Range -------------------------------------------------------------------------- −20°C to 100°C
Storage Temperature Range ---------------------------------------------------------------------------------------- −65°C to 150°C
VOUT ESD Level
HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 8kV
MM (Machine Mode) -------------------------------------------------------------------------------------------------- 800V
Electrical Characteristics
(VIN = 5V, CIN = COUT = 1μF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Input Voltage Range
Output NMOSFET RD S(ON)
Test Conditions
Min
Typ
Max
Units
2.2
--
6
V
IL = 1A
--
85
100
IL = 1A
--
87
100
VIN = 3V
--
19
40
VIN = 5V
--
23
45
--
400
--
μs
1.1
1.5
2
A
--
1.0
--
A
V IN
RT9701xBL
RT9701xB
R DS(ON)
Quiescent Current
Output Turn-On Rising Time
TR
RL = 10Ω, 90% Settling
Current Limit Threshold
ILIMIT
Short-circuit Fold Back Current
IOS
RL = 2Ω
VOUT = 0V, measured prior
to thermal shutdown
mΩ
μA
EN Input High Threshold
RT9701xB
2.0
--
--
V
EN Input Low Threshold
RT9701xB
--
--
0.8
V
Shutdown Supply Current
RT9701xB
I OFF
EN = “0”
--
0.1
1
μA
Output Leakage Current
RT9701xB
I LEAKAGE EN = “0”, VOUT = 0V
--
0.5
10
μA
1.3
1.8
--
V
--
100
--
mV
VIN Under Voltage Lockout
UVLO
VIN Under Voltage Hysteresis
Thermal Limit
TS D
--
130
--
°C
Thermal Limit Hysteresis
ΔTSD
--
20
--
°C
DS9701-16 April 2011
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RT9701
Typical Operating Characteristics
Quiescent Current vs. Temperature
Quiescent Current vs. Input Voltage
40
40
VIN = 5V
TA = 25°C
35
Quiescent Current (uA)
Quiescent Current ( uA)
35
30
25
20
15
10
5
30
25
20
15
10
5
0
0
-40
-20
0
20
40
60
80
100
120
2.0
2.5
3.0
Temperature (° C)
3.5
4.0
4.5
5.0
On-Resistance vs. Temperature
100
VIN = 5V
150
RT9701xBL
100
TA = 25°C
On-Resistance (mΩ)
On-Resistance (mΩ)
6.0
On-Resistance vs. Input Voltage
200
RT9701xB
50
95
90
RT9701xB
85
RT9701xBL
80
0
-40
-20
0
20
40
60
80
100
2.0
120
2.5
3.0
Temperature ((℃
)
° C)
3.5
4.0
4.5
5.0
5.5
6.0
Input Voltage(V)
Current Limit vs. Temperature
Current Limit vs. Input Voltage
2.20
1.80
VIN = 5V
2.00
TA = 25°C
1.58
1.80
Current Limit (A)
Current Limit (A)
5.5
Input Voltage (V)
1.60
1.40
1.20
1.00
0.80
1.35
1.13
0.90
0.68
0.45
0.23
0.60
0.00
-40
-20
0
20
40
60
Temperature (° C)
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80
100
120
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Input Voltage (V)
DS9701-16 April 2011
RT9701
Short Circuit Current vs. Temperature
Short Circuit Current vs. Input Voltage
1950
VIN = 5V
1300
TA = 25°C
Short Circuit Current (mA)
Short Circuit Current (mA)1
1400
1200
1100
1000
900
800
700
1700
1450
1200
600
950
700
450
200
500
-40
-20
0
20
40
60
80
100
2.0
120
2.5
3.0
3.5
4.0
4.5
5.0
Temperature ( C)
° C)
EN
Threshold
Voltage vs.
EN Pin
Threshold
vs. Temperature
2.4
VIN = 5V
2.0
1.6
Rising
1.2
TA = 25°C
EN Pin
(V)
ENThreshold
ThresholdVoltage
(V)
EN Pin
Voltage
ENThreshold
Threshold
(V) (V)
6.0
EN EN
PinThreshold
Thresholdvs.
Voltage
vs. Input
Input Voltage
2.4
Falling
0.8
0.4
2.0
1.6
Rising
1.2
Falling
0.8
0.4
0.0
0.0
-40
-20
0
20
40
60
80
Temperature (° C)
100
2.0
120
2.5
3.0
3.5
4.0
4.5
5.0
Input Voltage (V)
*Test Circuit 3
Turn On Rising Time vs. Temperature
5.5
6.0
*Test Circuit 3
Turn Off Falling Time vs. Temperature
140
720
VIN = 5V
VIN = 5V
630
Turn-Off Falling Time (us)
Turn-On Rising Time (us)
5.5
Input Voltage (V)
540
450
360
270
180
RL =30Ω
90
120
100
80
60
40
20
CL = 1uF Ceramic
RL = 30Ω
CL = 1uF Ceramic
0
0
-40
-20
0
20
40
60
Temperature (° C)
DS9701-16 April 2011
80
100
120
*Test Circuit 3
-40
-20
0
20
40
60
Temperature (° C)
80
100
120
*Test Circuit 3
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Shutdown Supply Current vs. Temperature
Turn-Off Leakage Current vs. Temperature
0.9
3.5
VIN = 5V
0.8
0.6
0.5
0.3
0.2
Turn-Off Leakage Current (uA) A
Shutdown Supply Current (uA)
RT9701
VIN = 5V
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.0
-40
-20
0
20
40
60
80
Temperature (° C)
100
120
-40
-20
0
20
40
60
80
Temperature (° C)
*Test Circuit 3
UVLO Threshold vs. Temperature
100
120
*Test Circuit 3
Inrush Current Response
3.50
VIN = 5V
UVLO Threshold (V)
3.00
2.50
CL = 100uF
CL = 33uF
2.00
1.50
CL = 1uF
1.00
0.50
IL = 1A/Div, RL = 1Ω, VIN = 5V
0.00
-40
-20
0
20
40
60
80
100
120
Time (100us/Div)
Temperature (° C)
Turn - On Response
Turn - Off Response
CH1
CH1
CH2
CH1: VEN: 5V/Div
CH2: IOUT: 100mA/Div
CH3: VOUT: 2V/Div
CH2
CH1: VEN: 5V/Div
CH2: VOUT: 1V/Div
RL = 30Ω, CL = 1uF
Time (100us/Div)
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*Test Circuit 3
CH3
RL = 30Ω, CL = 1uF
Time (50us/Div)
*Test Circuit 3
DS9701-16 April 2011
RT9701
UVLO at Rising
UVLO at Falling
CH1
CH2
CH1
CH1: VIN: 1V/Div
CH2: VOUT: 1V/Div
RL = 30Ω, CL = 1uF
CH2
CH1: VIN: 1V/Div
CH2: VOUT: 1V/ Div
RL = 30Ω, CL = 1uF
Time (100ms/Div)
Time (500us/Div)
Inrush Short Circuit Response
*Test Circuit 2
Soft - start Short Circuit Response
CH1: VIN: 2V/Div
CH1: VIN: 2V/Div
VDROP=1.2V, depend on CIN ESR
IPEAK : depend on ESR & ESL
CH1
CH1
CH2: IOUT: 1A/Div
CH2
CIN = 1uF, CL = 1000uF
CH2: IL: 10A/Div
CH2
CIN = 1uF
Time (5us/Div)
Time (25us/Div)
Ramped Load Response
CH1
Current Limit Response
VOUT = 4.6V
VOUT= 5V
4.9V
CH1
Loading trigger
Current Limit Threshold
1.1V
CH2
CH2
CH2: IOUT: 500mA/Div
Time (1ms/Div)
DS9701-16 April 2011
VIN = 5V, CL = 1uF
CH2: IOUT: 1A/Div
VIN = 5V, CL = 0.1uF
RL = 1Ω
Time (5us/Div)
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RT9701
Thermal Shut Dowm Response
CH1
CH3
Thermal Shut Down
CH2
Current Limiting and Short Protection
The current limit circuit is designed to protect the system
supply, the MOSFET switch and the load from damage
caused by excessive currents. The current limit threshold
is set internally to allow a minimum of 1.1A through the
MOSFET but limits the output current to approximately
1.5A typical. When the output is short to ground, it will
limit to a constant current 1A until thermal shutdown or
short condition removed.
CH1: VEN = 5V/Div, CH3: [email protected]: 1A/Div
CH2: [email protected]: 1A/DiV, VIN = 5V
Time (50ms/Div)
Application Information
RT9701xBL
VIN
VOUT
VIN
VIN
CIN
1uF
The RT9701 is a high-side single N-Channel MOSFET
switch with active-high enable input.
VOUT
VOUT2
VOUT1
GND
COUT
COUT
CIN = 1uF, COUT = 470uF (Low ESR) on M/B
CIN = 1uF, COUT = 330uF (Low ESR) on Notebook
CIN = 10uF, COUT = 1uF on USB device
Input and Output
VIN (input) is the power supply connection to the circuitry
and the drain of the output MOSFET. VOUT (output) is
the source of the output MOSFET. In a typical circuit,
current flows through the switch from VIN to VOUT toward
the load. Both VOUT pins must be short on the board
and connected to the load and so do both VIN pins but
connected to the power source.
Figure 1. High Side Power Switch
VIN
Soft Start
In order to eliminate the upstream voltage droop caused
by the large inrush current during hot-plug events, the
“ soft-start” feature effectively isolates power supplies
from such highly capacitive loads.
Under-voltage Lockout
UVLO prevents the MOSFET switch from turning on until
input voltage exceeds 1.8V (typical). If input voltage drops
below 1.8V (typical), UVLO shuts off the MOSFET switch.
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RT9701xB
VOUT
EN
VOUT
GND
Chip Enable
VOUT2
VOUT1
COUT
COUT
Figure 2. High Side Power Switch
with Chip Enable Control
Thermal Shutdown
Thermal shutdown shuts off the output MOSFET if the
die temperature exceeds 130°C and 20°C of hysteresis
forces the switch turning off until the die temperature
drops to 110°C.
CIN
VIN
Filtering
To limit the input voltage drop during hot-plug events,
connect a 1uF ceramic capacitor from VIN to GND.
However, higher capacitor values will further reduce the
voltage drop at the input.
Connect a sufficient capacitor from VOUT to GND. This
capacitor helps to prevent inductive parasitics from pulling
VOUT negative during turn-off or EMI damage to other
components during the hot-detachment. It is also
necessary for meeting the USB specification during hot
plug-in operation. If RT9701 is implanted in device end
application, minimum 1uF capacitor from VOUT to GND is
recommended and higher capacitor values are also
preferred.
DS9701-16 April 2011
RT9701
In choosing these capacitors, special attention must be
paid to the Effective Series Resistance, ESR, of the
capacitors to minimize the IR drop across the capacitor
ESR. A lower ESR on this capacitor can get a lower IR
drop during the operation.
Ferrite beads in series with all power and ground lines are
recommended to eliminate or significantly reduce EMI. In
selecting a ferrite bead, the DC resistance of the wire
used must be kept to a minimum to reduce the voltage
drop.
Reverse current preventing
The output MOSFET and driver circuitry are also designed
to allow the MOSFET source to be externally forced to a
higher voltage than the drain (VOUT > VIN ≥ 0). To prevent
reverse current from such condition, disable the switch
(RT9701xB) or connect VIN to a fixed voltage under 1.3V.
Layout and Thermal Dissipation
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Place the switch as close to the USB connector as
possible. Keep all traces as short as possible to reduce
the effect of undesirable parasitic inductance.
Place the ot capacitor and ferrite beads asclose to the
USB connector as possible.
If ferrite beads are used, use wires with minimum
resistance and large solder pads to minimize
connection resistance.
If the package is with dual VOUT or VIN pins, short
both the same function pins as Figure 1 or Figure 2 to
reduce the internal turn-on resistance. If the output
power will be delivered to two individual ports, it is
specially necessary to short both VOUT pin at the
switch output side in order to protect the switch when
each port are plug-in separately.
Under normal operating conditions, the package can
dissipate the channel heat away. Wide power-bus
planes connected to VIN and VOUT and a ground plane
in contact with the device will help dissipate additional
heat.
DS9701-16 April 2011
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RT9701
Outline Dimension
H
D
L
B
C
b
A
A1
e
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
A
0.889
1.295
0.035
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.356
0.559
0.014
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-5 Surface Mount Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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DS9701-16 April 2011