Evaluation Board User Guide UG-294 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the AD9644/AD9641 Analog-to-Digital Converters FEATURES DOCUMENTS NEEDED Full featured evaluation board for the AD9644 or AD9641 SPI interface for setup and control External clock, on-board oscillator, and AD9524 clocking options Balun/transformer and amplifier input drive options LDO regulator and switching power supply options VisualAnalog® and SPI controller software interfaces AD9644 or AD9641 data sheet AD9524 data sheet ADP2114 or ADP2108 data sheet AD8376 or ADL5562 data sheet JESD204A specification AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version 1.0 User Manual AN-878 Application Note, High Speed ADC SPI Control Software AN-877 Application Note, Interfacing to High Speed ADCs via SPI AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation EQUIPMENT NEEDED Analog signal source and antialiasing filter Sample clock source (if not using the on-board oscillator) 2 switching power supplies (6.0 V, 2.5 A), CUI EPS060250UHPHP-SZ, provided PC running Windows® 98 (2nd ed.), Windows 2000, Windows ME, or Windows XP USB 2.0 port, recommended (USB 1.1 compatible) AD9644 or AD9641 evaluation board FIFO-GX FPGA-based data capture kit SOFTWARE NEEDED VisualAnalog SPI controller GENERAL DESCRIPTION This user guide describes the AD9644 and AD9641 evaluation boards (AD9644-155KITZ, AD9644-80KITZ, AD9641-80KITZ), which provide all of the support circuitry required to operate the AD9644 and AD9641 in the available modes and configurations. The application software used to interface with the device is also described. The AD9644 and AD9641 data sheets provide additional information and should be consulted when using the evaluation board. For additional information or questions, send an email to [email protected]. The JESD204A specification can be downloaded from the JEDEC website. The download is free, but registration is required. 09941-001 TYPICAL MEASUREMENT SETUP Figure 1. AD9644/AD9641 Evaluation Board and FIFO-GX Data Capture Board PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. B | Page 1 of 48 UG-294 Evaluation Board User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Input Signals...................................................................................3 Equipment Needed ........................................................................... 1 Output Signals ...............................................................................3 Software Needed ............................................................................... 1 Default Operation and Jumper Selection Settings ....................5 Documents Needed .......................................................................... 1 Evaluation Board Software Quick Start Procedures .....................8 General Description ......................................................................... 1 Configuring the Board .................................................................8 Typical Measurement Setup ............................................................ 1 Using the Software for Testing.....................................................8 Revision History ............................................................................... 2 Evaluation Board Schematics and Artwork ................................ 14 Evaluation Board Hardware ............................................................ 3 Ordering Information .................................................................... 38 Power Supplies .............................................................................. 3 Bill of Materials ........................................................................... 38 REVISION HISTORY 3/13—Rev. A to Rev. B Changed ADA4937 to ADA4937-1 and ADA4938 to ADA4938-1........................................................................................ 5 Changes to Figure 21 ...................................................................... 18 Changes to Figure 22 ...................................................................... 19 Changes Table 4 .............................................................................. 39 9/12—Rev. 0 to Rev. A Removed HSC-ADC-EVALCZ (Throughout) ............................. 1 8/11—Revision 0: Initial Version Rev. B | Page 2 of 48 Evaluation Board User Guide UG-294 EVALUATION BOARD HARDWARE The AD9644 and AD9641 evaluation boards provide all of the support circuitry required to operate the parts in various modes and configurations. Figure 2 shows the typical bench characterization setup used to evaluate the ac performance of the AD9644 or AD9641. It is critical that the signal sources used for the analog input and clock have very low phase noise (<1 ps rms jitter) to realize the optimum performance of the signal chain. Proper filtering of the analog input signal to remove harmonics and lower the integrated or broadband noise at the input is necessary to achieve the specified noise performance. The AD9644 evaluation board supports dual-channel operation for the AD9644. The AD9641 evaluation board supports single-channel operation for the AD9641. See the Evaluation Board Software Quick Start Procedures section to get started, and see Figure 17 to Figure 40 for the complete schematics and layout diagrams. These diagrams demonstrate the routing and grounding techniques that should be applied at the system level when designing application boards using these converters. POWER SUPPLIES Each evaluation board is supplied with a wall-mountable switching power supply that provides a 6 V, 2 A maximum output. Connect the supply to an ac wall outlet of 100 V to 240 V at a frequency of 47 Hz to 63 Hz. The output from the supply is provided through a 2.1 mm inner diameter jack that connects to the printed circuit board (PCB) at P201. In the default configuration, the 6 V supply is fused and conditioned on the PCB before connecting to the low dropout linear regulators that supply the proper bias to each of the various sections on the board. The evaluation board can be powered in a nondefault condition using multiple external bench power supplies to bias each section of the board individually. To do this, remove the E202, E204, E205, and E207 ferrite beads—as well as the E201 ferrite bead for the AD9644—from the evaluation board to disconnect the outputs from the on-board LDOs. Then, use P202 and P203 to connect a different supply for each section. A 1.8 V supply is needed with a 1 A current capability for DUT_AVDD and DRVDD; however, it is recommended that separate supplies be used for the analog domain and the digital domain. An additional supply (DVDD) is also required to supply 1.8 V for digital support circuitry on the board. This supply should also have a 1 A current capability and can be combined with DRVDD without significantly degrading performance. To operate the evaluation board using the SPI and the alternate clocking options, a separate 3.3 V analog supply is needed in addition to the other supplies. This 3.3 V supply, or 3P3V_ ANALOG, should have a 1 A current capability and is used to support the clocking circuitry. On the AD9641 evaluation board, the 3.3 V supply is also used to support the optional input path amplifier (ADL5562). An additional supply (5V_SUPPORT) is used on the AD9644 evaluation board to bias the optional dual input path amplifier (AD8376) on Channel A and Channel B. If used, these supplies should each have a 1 A current capability. INPUT SIGNALS When connecting the clock and analog source, use signal generators with low phase noise, such as the Rohde & Schwarz SMA or HP 8644B signal generators, or an equivalent. Use a 1 m, shielded, RG-58, 50 Ω coaxial cable for connecting the signal generators to the evaluation board. Enter the desired frequency and amplitude (see the Specifications section in the data sheet of the respective part). When connecting the analog input source, use of a multi-pole, narrow-band band-pass filter with 50 Ω terminations is recommended. Analog Devices, Inc., uses TTE and K&L Microwave, Inc., band-pass filters. The filters should be connected directly to the evaluation board. If an external clock source is used, it should also be supplied using a signal generator with low phase noise. Typically, most Analog Devices evaluation boards can accept ~2.8 V p-p or 13 dBm sine wave input for the clock. OUTPUT SIGNALS The default setup uses the Analog Devices high speed converter evaluation platform (FIFO-GX FPGA) for data capture. The output signals from Channel A and Channel B are routed through P601 to the FPGA on the data capture board. Rev. B | Page 3 of 48 UG-294 Evaluation Board User Guide WALL OUTLET 100V TO 240V AC 47Hz TO 63Hz SWITCHING POWER SUPPLY 6V DC 2A MAX SWITCHING POWER SUPPLY SIGNAL SYNTHESIZER ANALOG FILTER 6V DC 2A MAX SIGNAL SYNTHESIZER PC RUNNING ADC ANALYZER OR VisualAnalog USER SOFTWARE 09941-002 OPTIONAL CLOCK SOURCE ANALOG INPUT Figure 2. AD9644/AD9641 Evaluation Board Connection Rev. B | Page 4 of 48 Evaluation Board User Guide UG-294 AD8376 is included on the AD9644 evaluation board at U401. However, the path into and out of the AD8376 can be configured in many different ways depending on the application; therefore, the parts in the input and output paths are left unpopulated. Users should see the AD8376 data sheet for additional information about this part and for configuring the inputs and outputs. The AD8376 by default is held in power-down mode but can be enabled by adding a jumper on P401 (Channel A) or P402 (Channel B). DEFAULT OPERATION AND JUMPER SELECTION SETTINGS This section explains the default and optional settings and modes available on the AD9644 and AD9641 Rev. A evaluation boards. Power Circuitry Connect the switching power supply that is included in the evaluation kit between an ac wall outlet of 100 V to 240 V at 47 Hz to 63 Hz and the P201 jack. Optionally, on the AD9641 evaluation board, the Channel A input on the board can be configured to use the ADL5562 ultralow distortion RF/IF differential amplifier. The ADL5562 is included on the AD9641 evaluation board at U401. However, the path into and out of the ADL5562 can be configured in many ways depending on the application; therefore, the parts in the input and output paths are left unpopulated. Users should see the ADL5562 data sheet for additional information on this part and for configuring the inputs and outputs. The ADL5562 by default is held in power-down mode but can be enabled by adding a jumper on P401. The ADL5562 can also be substituted with the ADA4937-1 or the ADA4938-1 to allow evaluation of these parts with the analog-to-digital converter (ADC). Analog Input The Channel A and Channel B inputs on the evaluation board are set up for a double balun-coupled analog input with a 50 Ω impedance. This input network is optimized to support a wide frequency band. See the AD9644 data sheet for additional information about the recommended networks for various input frequency ranges. The nominal input drive level is 10 dBm to achieve 2 V p-p full scale into 50 Ω. At higher input frequencies, slightly higher input drive levels are required due to losses in the front-end network. Optionally, on the AD9644 evaluation board, Channel A and Channel B inputs on the board can be configured to use the AD8376 digitally controlled variable gain amplifier (VGA). The 8.2pF 49.9Ω 0.1µF 2V p-p 33Ω VIN+ 36Ω S S P 0.1µF 36Ω 0.1µF AD9644/AD9641 8.2pF 33Ω VIN– VCM 49.9Ω 8.2pF Figure 3. Default Analog Input Configuration of the AD9644/AD9641 Rev. B | Page 5 of 48 09941-003 PA UG-294 Evaluation Board User Guide Clock Circuitry PDWN The default clock input circuit that is populated on the AD9644 and AD9641 evaluation boards uses a simple transformer-coupled circuit using a high bandwidth 1:1 impedance ratio transformer (T503) that adds a very low amount of jitter to the clock path. The clock input is 50 Ω terminated and ac-coupled to handle single-ended sine wave types of inputs. The transformer converts the single-ended input to a differential signal that is clipped by CR503 before entering the ADC clock inputs. To enable the power-down feature, add a shorting jumper across P101 at Pin 1 and Pin 2 to connect the PDWN pin to AVDD. The board is set by default to use an external clock generator. An external clock source capable of driving a 50 Ω terminated input should be connected to J702. A differential LVPECL clock driver output can also be used to clock the ADC input using the AD9524 (U501). To place the AD9524 into the clock path, populate R541 and R542 with 0 Ω resistors and remove R522 and R523 to disconnect the default clock path outputs. In addition, populate R533 and R534 with 0 Ω resistors. Next, place Y501, which is the Epson Toyocom voltage controlled oscillator that serves as the VCXO for the AD9524. By completing these connections, OUT2 of the AD9524 is connected to the sampling clock inputs of the AD9644/AD9641. The AD9524 must be configured through the SPI controller software to set up the PLL and other operation modes. Consult the AD9524 data sheet for more information about these and other options. An additional clocking option is provided on the AD9644 evaluation board. In place of connecting an external source for the clock, Y502 a low jitter Valpey Fisher clock oscillator can be placed and used as the clock source. If using Y502, a jumper must be placed on Header P501. Switching Power Supply The ADC on the AD9644 evaluation board can be configured to use the ADP2114 dual switching power supply to provide power to the DRVDD and AVDD rails of the ADC. To configure the board to operate from the ADP2114, the following changes must be incorporated (see the AD9644 Evaluation Board Schematics and Artwork and Bill of Materials sections for specific recommendations for part values): 1. 2. 3. 4. 5. Install R204 and R221 to enable the ADP2114. Install R216 and R218. Install L201 and L202. Remove JP201 and JP203 and install JP202 and JP204. Remove E205 and E207 and install E208 and E209. The ADC on the AD9641 evaluation board can be configured to use the ADP2108 switching power supply to provide power to the DRVDD and AVDD rails of the ADC. To configure the board to operate from the ADP2108, the following changes must be incorporated (see the AD9641 Evaluation Board Schematics and Artwork and Bill of Materials sections for specific recommendations for part values): 1. 2. 3. 4. Install R204 to enable the ADP2108. Install L201 and L202. Remove JP201 and JP203 and install JP202 and JP204. Remove E205 and E207 and install E208 and E209. Making these changes enables the switching converter to power the ADC. Using the switching converter as the ADC power source is more efficient than using the default LDOs. Rev. B | Page 6 of 48 Evaluation Board User Guide UG-294 JESD204A Output Modes The AD9641 evaluation platform supports one JESD204A output mode (see Table 1), and the AD9644 evaluation platform supports several JESD204A output modes (see Table 2 for typical configurations). Each mode requires a different FPGA configuration to capture data properly. Output Configuration A in Table 2 is the configuration for the default mode for the AD9644, and it consists of two converters, each of which has two links and one output lane. Table 1. AD9641 JESD204A Configuration Output Configuration A AD9641 Configuration One converter, One JESD204A link, One lane per link JESD204A Link Settings M = 1; L = 1; S = 1; F = 2; N’ = 16; CF = 0; CS = 0, 1, 2; K = N/A; SCR = 0, 1; HD = 0 Comments Maximum sample rate = 80 MSPS or 155 MSPS Table 2. AD9644 JESD204A Typical Configurations (Enabled Through SPI Register 0x5E, Bits[2:0]) Output Configuration A B C AD9644 Configuration Two converters, two JESD204A links, one lane per link Two converters, one JESD204A link, two lanes per link JESD204A Link A Settings M = 1; L = 1; S = 1; F = 2; N’ = 16; CF = 0; CS = 0, 1, 2; K = N/A; SCR = 0, 1; HD = 0 M = 2; L = 2; S = 1; F = 2; N’ = 16; CF = 0; CS = 0, 1, 2; K = see the specifications in the AD9644 data sheet; SCR = 0, 1; HD = 0 JESD204A Link B Settings M = 1; L = 1; S = 1; F = 2; N’ = 16; CF = 0; CS = 0, 1, 2; K = N/A; SCR = 0, 1; HD = 0 Disabled Two converters, one JESD204A link, one lane per link M = 2; L = 1; S = 1; F = 4; N’ = 16; CF = 0; CS = 0, 1, 2; K = see the specifications in the AD9644 data sheet; SCR = 0, 1; HD = 0 Disabled Rev. B | Page 7 of 48 Comments Maximum sample rate = 80 MSPS Maximum sample rate = 80 MSPS This configuration is required for applications needing two aligned samples (that is, I/Q applications) Maximum sample rate = 80 MSPS UG-294 Evaluation Board User Guide EVALUATION BOARD SOFTWARE QUICK START PROCEDURES testing to be performed (for example, in Figure 4 AD9644 has been selected). This section provides quick start procedures for using the AD9644 or AD9641 evaluation board. Both the default and optional settings are described. CONFIGURING THE BOARD 2. 3. 4. 5. 6. 7. 8. Connect the AD9644 or AD9641 evaluation board to the FIFO-GX data capture board, as shown in Figure 1 and Figure 2. Ensure that a jumper is installed on Header P1 between Pin 1 and Pin 2 on the FIFO-GX evaluation board to set the FPGA I/O voltage to 1.8 V. Connect the AD9644 or AD9641 evaluation board to a 6 V, 2.5 A switching power supply (such as the CUI, Inc., EPS060250UH-PHP-SZ included in the evaluation board package). Connect the FIFO-GX board to a 6 V, 2.5 A switching power supply (such as the CUI EPS060250UH-PHP-SZ included in the evaluation board package). Connect the FIFO-GX board (J6) to a PC with the USB cable. On the ADC evaluation board, confirm that there are no jumpers installed on any of the header pins. Connect a low jitter sample clock to Connector J505 (J506 may be installed on earlier revision boards and can be used for the clock input on these boards). If the AD9644 clock divider is used, provide a clock into J505 (or J506) at the appropriate rate, which is divided to the desired clock rate. The input clock level should be between 10 dBm and 14 dBm. Use a signal generator with low phase noise to provide an input signal to the analog input—Connector J301 (Channel A) and/or Connector J303 (Channel B). Use a 1 m, shielded, RG-58, 50 Ω coaxial cable to connect the signal generator. For best results, use a narrow-band band-pass filter with 50 Ω terminations and an appropriate center frequency. For the testing of these boards, TTE, Allen Avionics, and K&L band-pass filters were used. Figure 4. VisualAnalog, New Canvas Window 2. After the template is selected, a message appears asking if the default configuration can be used to program the FPGA (see Figure 5). Click Yes, and the window closes. 09941-005 1. 09941-004 Before using the software for testing, configure the evaluation board as follows: Figure 5. VisualAnalog Default Configuration Message 3. USING THE SOFTWARE FOR TESTING Setting Up the ADC Data Capture To change features to settings other than the default settings, click the Expand Display button (see Figure 6) to view the full window (shown in Figure 7). Detailed instructions for changing the features and capture settings can be found in the AN-905 Application Note, VisualAnalog Converter Evaluation Tool Version 1.0 User Manual. After the changes are made to the capture settings, click the Collapse Display button (see Figure 7) to minimize the window (shown in Figure 6). 1. Open VisualAnalog on the PC that is connected to the evaluation board. The appropriate part type should be listed in the status bar of the VisualAnalog – New Canvas window. Select the template that corresponds to the type of Rev. B | Page 8 of 48 EXPAND DISPLAY BUTTON Figure 6. VisualAnalog Window Toolbar, Collapsed Display 09941-006 After configuring the board, set up the ADC data capture using the following steps: Evaluation Board User Guide UG-294 09941-007 COLLAPSE DISPLAY BUTTON Figure 7. VisualAnalog, Main Window Rev. B | Page 9 of 48 UG-294 4. Evaluation Board User Guide If the input clock divider is used or if testing in Configuration C is desired, a nonstandard FPGA configuration file is required. To program the FPGA with a nonstandard configuration, click ADC Data Capture, and the ADC Data Capture Settings window appears. Click the Capture Board tab. Under the FPGA area, select the appropriate FPGA configuration file from the Program Files: box (see Table 2 and Figure 8). The selected FPGA configuration is then downloaded to the hardware using VisualAnalog. Table 2 details the configurations that are available to program the FPGA. Table 3. AD9644 and AD9641 JESD204A Typical Configurations Clock Divider Disabled (Default) Set to Divide by 2 Set to Divide by 3 Set to Divide by 4 Set to Divide by 5 Set to Divide by 6 Set to Divide by 7 Set to Divide by 8 Disabled FPGA Configuration File Name ad9644_41.rbf (default) ad9644_41_div2.rbf ad9644_41_div3.rbf ad9644_41_div4.rbf ad9644_41_div5.rbf ad9644_41_div6.rbf ad9644_41_div7.rbf ad9644_41_div8.rbf ad9644_41_config3.rbf 09941-008 AD9644 A and B A and B A and B A and B A and B A and B A and B A and B C Output Configuration AD9641 A A A A A A A A A Figure 8. VisualAnalog, Main Window, Data Capture Settings Rev. B | Page 10 of 48 Evaluation Board User Guide UG-294 3. Setting Up the SPI Controller Software After the ADC data capture board setup is complete, set up the SPI Controller software using the following procedure: Start the SPI Controller software by selecting the SPI controller software from the Start menu or by doubleclicking the SPIController software desktop icon. If prompted for a configuration file, select the appropriate one. If not, check the title bar of the window to determine which configuration is loaded. If necessary, select Cfg Open from the File menu and select the appropriate file based on your part type. Note that the CHIP ID(1) field should be filled to indicate whether the correct SPI controller configuration file is loaded (see Figure 9). 09941-011 1. In the ADCBase 0 tab of the SPIController window, find the CLKDIV(B) box (see Figure 11). If using the clock divider, use the drop-down box to select the correct clock divide ratio, if necessary. See the AD9644 or AD9641 data sheet; the AN-878 Application Note, High Speed ADC SPI Control Software; and the AN-877 Application Note, Interfacing to High Speed ADCs via SPI, for additional information. Figure 11. SPI Controller, CLKDIV(B) Box 09941-009 4. Figure 9. SPI Controller, CHIP ID(1) Box Click the New DUT button in the SPIController window (see Figure 10). 09941-010 2. 5. 6. Figure 10. SPI Controller, New DUT Button Rev. B | Page 11 of 48 If the ADC sample rate is less than 100 MSPS, click the PLL Input < 100 MSPS check box in the PLL CTRL(21) box of the ADCBase0 tab. If you configured the FPGA for a clock divider mode in Step 4 of the Setting Up the ADC Data Capture section, select the appropriate clock divider setting in the Divide ratio drop-down box located in the CLKDIV(B) box. If you configured the FPGA for Output Configuration C (two converters, one JESD204A link, one lane per link) in Step 4 of the Setting Up the ADC Data Capture section, select this option in the JTX QUICK CFG box. Note that other settings can be changed on the ADCBase 0 tab (see Figure 11) and the ADC A and ADC B tabs (see Figure 12) to set up the part in the desired mode. The ADCBase 0 tab settings affect the entire part, whereas the settings on the ADC A and ADC B tabs affect the selected channel only. Note that for the AD9641, only the ADCBase0 and ADC A tabs are available because the device is a singlechannel ADC. See the AD9644 or AD9641 data sheet; the AN-878 Application Note, High Speed ADC SPI Control Software; and the AN-877 Application Note, Interfacing to High Speed ADCs via SPI, for additional information on the available settings. Set the single-ended SYNC check box in the JTX LINK CTRL2 box on both the ADC A and ADC B tabs (or on only the ADC A tab for the AD9641) as shown in Figure 12. This sets the JESD input syncs to operate in singled-ended CMOS mode for compatibility with the FPGA configuration. UG-294 Evaluation Board User Guide Adjusting the Amplitude of the Input Signal Next, adjust the amplitude of the input signal for each channel as follows: Adjust the amplitude of the input signal for Channel A so that the fundamental is at the desired level. (Examine the Fund Power reading in the left panel of the VisualAnalog Graph – AD9644 Average FFT window (see Figure 15).) 09941-012 1. Figure 12. SPI Controller, Example ADC A Tab If Configuration B (two converters, one JESD204A link, two lanes per link) is selected, click the FACI Disable check box in the JTX LINK CTRL1 box (shown in Figure 13) for both Channel A and Channel B (ADC A and ADC B tabs) for the AD9644, or for only Channel A (ADC A tab) for the AD9641. Changing this selection sets the part to match the expected FPGA input configuration. 09941-015 7. Figure 15. Graph Window of VisualAnalog 2. 3. Repeat Step 1 for Channel B on the AD9644. Click the disk icon within the graph for Channel A to save the performance plot data as a .csv formatted file. See Figure 16 for an example. 09941-013 0 AMPLITUDE (dBFS) Figure 13. SPI Controller, Example ADC A Tab Click the Run button in the VisualAnalog toolbar (see Figure 14). –40 –60 –80 THIRD HARMONIC –100 –140 Figure 14. Run Button in VisualAnalog Toolbar, Collapsed Display 0 10 20 30 FREQUENCY (MHz) Figure 16. Typical FFT, AD9644 4. Rev. B | Page 12 of 48 Repeat Step 3 for Channel B on the AD9644. 40 09941-016 –120 RUN BUTTON 09941-014 8. 80MSPS 10.1MHz @ –1dBFS SNR = 73.0dB (74.0dBFS) SFDR = 95dBc –20 Evaluation Board User Guide UG-294 Troubleshooting Tips If the FFT window remains blank after Run is clicked, use the following troubleshooting tips: If the FFT plot appears abnormal, use the following troubleshooting tips: • • • If you see a normal noise floor when you disconnect the signal generator from the analog input, be sure you are not overdriving the ADC. Reduce the input level, if necessary. In the VisualAnalog main window, click the Settings button in the Input Formatter box. Check that Number Format is set to the correct encoding (offset binary by default). Repeat this procedure for the other channel. • • If the FFT appears normal but the performance is poor, use the following troubleshooting tips: • • • • Ensure that an appropriate filter is used on the analog input. Check that the signal generators for the clock and the analog input have low phase noise. Change the analog input frequency slightly if noncoherent sampling is being used. Verify that the SPI configuration file matches the product being evaluated. Check that the evaluation board is securely connected to the FIFO-GX board. Ensure that the FPGA has been programmed by verifying that the DONE LED is illuminated on the FIFO-GX board. If this LED is not illuminated, make sure the U4 switch on the board is in the correct position for the USB configuration. Verify that the correct FPGA program was installed by clicking the Settings button in the ADC Data Capture box in VisualAnalog, and then clicking the FPGA tab and verifying that the proper FPGA bin file is selected for the part. If VisualAnalog indicates that the FIFO Capture timed out, use the following troubleshooting tips: • • Rev. B | Page 13 of 48 Ensure that all power and USB connections are secure. Probe the DCOA signal at RN801 (Pin 2) on the evaluation board and confirm that a clock signal is present at the ADC sampling rate. UG-294 Evaluation Board User Guide EVALUATION BOARD SCHEMATICS AND ARTWORK 09941-017 Figure 17. AD9644 DUT and Related Circuits Rev. B | Page 14 of 48 Evaluation Board User Guide UG-294 09941-018 Figure 18. AD9644 Board Power Input and Supply Rev. B | Page 15 of 48 UG-294 Evaluation Board User Guide 09941-019 Figure 19. AD9644 Passive Analog Input Circuits Rev. B | Page 16 of 48 Evaluation Board User Guide UG-294 09941-020 Figure 20. AD9644 Optional Active Input Circuits Rev. B | Page 17 of 48 UG-294 Evaluation Board User Guide 09941-021 Figure 21. AD9644 Clock Input Circuits Rev. B | Page 18 of 48 Evaluation Board User Guide UG-294 09941-022 Figure 22. AD9644 SPI Configuration Circuit and FIFO Connections Rev. B | Page 19 of 48 Evaluation Board User Guide 09941-023 UG-294 Figure 23. AD9644 Top Side Rev. B | Page 20 of 48 UG-294 09941-024 Evaluation Board User Guide Figure 24. AD9644 Ground Plane (Layer 2) Rev. B | Page 21 of 48 Evaluation Board User Guide 09941-025 UG-294 Figure 25. AD9644 Power Plane (Layer 3) Rev. B | Page 22 of 48 UG-294 09941-026 Evaluation Board User Guide Figure 26. AD9644 Power Plane (Layer 4) Rev. B | Page 23 of 48 Evaluation Board User Guide 09941-027 UG-294 Figure 27. AD9644 Ground Plane (Layer 5) Rev. B | Page 24 of 48 UG-294 09941-028 Evaluation Board User Guide Figure 28. AD9644 Bottom Side Rev. B | Page 25 of 48 UG-294 Evaluation Board User Guide 09941-029 Figure 29. AD9641 DUT and Related Circuits Rev. B | Page 26 of 48 VIN 2 1 100MHZ AGND C210 10UF 10UF 1UF C212 DNI AGND 3 R204 100K EN CR201 E201 C 2 GND 1 VIN 5 4 AGND FB SW 1 IN IN U203 AGND DNI 2.2UH C213 10UF DNI DGND L202 2.2UH AGND DNI C214 10UF 2 2 DNI 2 E210 DNI 2 E211 C AGND DNI C216 10UF AGND DNI C215 10UF C A 100MHZ 1 E204 CR206 100MHZ 1 E202 A 100MHZ 1 1 100MHZ E203 CR205 ADP1713AUJZ-3.3-R7 OUT 5 AGND GND 2 VIN ADP1713AUJZ-3.3-R7 OUT 5 GND 2 C U202 AGND DNI BYP 3 EN 4 1 BYP 3 EN 4 A L201 U206 ADP2108AUJZ-1.8-R7 A CR202 SK33A-TP A C 2 CR203 R201 P N C C204 C207 C201 C211 10UF A C205 4.7UF 4.7UF C208 4 6 5 DNI 3 0.01UF 0.01UF C206 C209 2 1 261 4.7UF 4.7UF 3P3V_ANALOG 3P3V_DIGITAL 100MHZ FL201 1 1 1 1 0 2 2 DNI 0 2 JP204 0 JP203 DNI 0 JP202 2 JP201 C225 C228 BNX016-01 2 100MHZ 1 E208 DNI EN PAD EN 1 2 100MHZ E209 DNI DGND PAD 2 PAD SS GND1 7 SENSE 3 5 IN OUT 4 6 OUT2 IN2 8 1 ADP1706ARDZ-1.8-R7 U205 AGND 2 PAD SS GND1 7 SENSE 3 5 OUT IN 4 6 IN2 OUT2 8 1 ADP1706ARDZ-1.8-R7 U204 0.01UF 1 4.7UF C226 4.7UF C229 CR204 2 C227 C230 PGND 1.1A 4.7UF 4.7UF F201 E205 2 1 E207 2 100MHZ 1 2 3 4 1 2 3 4 5 6 DRVDD AVDD P203 Z5.531.3425.0 100MHZ 1 P202 Z5.531.3625.0 DNI AGND AGND DGND E213 E214 2 2 E216 2 2 0 AGND RS20 5 0 AGND RS201 100MHZ 1 2 100MHZ 1 E215 100MHZ 1 E212 100MHZ 1 1 100MHZ C231 C233 RS202 DGND DGND 0 DNI RS20 6 DNI 0 P N PJ-202A 1 R222 E206 0.1U F 10UF AGND 0 DNI 1 DNI 0 RS204 RS208 DGND 0 DNI 0 DNI 0 RS209 DNI RS210 3P3V_ANALOG DGND RS20 7 DNI 0 RS203 AGND AVDD DRVDD 3P3V_DIGITAL TP201 5V_SUPPORT AGND 10UF 10UF 10UF C235 C237 C239 0.1UF C232 0.1U F C234 C236 0.1UF C238 0.1UF C240 10UF P N P N P N P N 1 1.00K 2 1 2 3 100MHZ Rev. B | Page 27 of 48 0.01UF Figure 30. AD9641 Board Power Input and Supply RS211 DNI 0 09941-030 P201 Evaluation Board User Guide UG-294 UG-294 Evaluation Board User Guide 09941-031 Figure 31. AD9641 Passive Analog Input Circuit Rev. B | Page 28 of 48 AMP_IN- AMP_IN+ 3 4 ETC1-1-13 SEC PRI 1 T401 Rev. B | Page 29 of 48 AGND AGND R402 40.2 R401 40.2 C401 0.1UF C402 0.1UF Figure 32. AD9641 Optional Active Input Circuit AGND PD_N_A 0 2 3 4 ADL5562_PRELIM 2 1 P401 3P3V_ANALOG R407 1.1K DNI VIN2 VIP1 VIN1 VIP2 VCC GND PD_N_A 12 ENBL R405 0 R406 1 0 R404 DNI R403 0 AGND VOP VON PAD VCOM 13 14 15 16 5 5 6 7 8 9 10 11 U401 AGND PAD C403 0.1UF DNI JPR0402 1 JP401 2 AGND C404 0.1UF VCM 0 DNI 0 DNI R409 R408 P N AGND C405 10UF C406 DNI 0.1UF C407 DNI 0.1UF DNI R411 1.00K DNI R410 1.00K DNI 0.1UF C408 L401 120NH DNI L404 DNI DNI DNI C409 5PF L403 120NH 120NH L402 AGND DNI 120NH DNI C410 5PF DNI 82NH L406 DNI 82NH L405 AMP_OUT- DNI 0 R412 AMP_OUT+ VCM 09941-032 3P3V_ANALOG Evaluation Board User Guide UG-294 DNI AGND 2 3 4 5 1 J506 CLK AGND 2 3 4 5 1 J505 R528 DNI 0 AGND R529 49.9 AGND DNI DNI 0.1UF C523 0.1UF C522 C530 REF CLK 0.1UF R537 AGND AGND 2 AGND DIN 4 GND 1 VCC DNI 3P3V_ANALOG AGND 1 3 0.1UF C529 DOUT+ DOUT- OUT3 0 R527 0 R526 0 0 R525 DNI REFCLK+ REFCLK- REFCLK+ 0 R554 0 R553 0 0 R552 R551 0 DNI DNI DNI DNI AGND R549 DNI 0 AGND REFCLK- C506 0.1UF R550 CLK_IN+ DNI R540 24.9 0.1UF C528 R539 24.9 DNI 4 DNI 5 0.1UF 0 R523 3 Y501 C503 C531 DNI T503 ETC1-1-13 3 1 SEC 4 5 PRI R524 AGND OUT3_N 7 8 U503 FIN1017M 4 2 6 T502 ADT1-1WT+ 0 OUT+ 1 VC OUTGND VCC R522 60-800MHZ 6 1K R502 AGND 0.33UF CLK_IN- R503 49.9 1 0 DNI 49.9 CR503 2 REFCLK2X- REFCLK2X+ REFCLK1+ REFCLK1- REFCLK2+ REFCLK2- 3 R507 TBD0402 0 0.1UF C533 0.1UF DNI R508 0.001UF C532 0.1UF C507 0.1UF C504 VCXO_CTRL 0.1UF C502 R505 R506 R604 49.9 C505 R533 C509 3.3V_PLL1 DNI DNI CLK_OUT- CLK- 100 R543 CLK+ CLK_OUT+ AGND 0.1UF OSC_IN_N OSC_IN LF1_EXT_CAP OSC_CTRL REFB_N REFB REFA_N REFA 10 LF2_EXT_CAP LDO_PLL2 SI04 10K R509 3.3V_REF 12 VDD3_VCO LDO_VCO 3.3V_PLL2 11 0.47UF C512 C511 0.33UF C508 2 3 4 5 6 7 8 9 1 AGND C513 0.47UF 3.3V_REF 1 TP501 PAD 0.1UF C510 C515 AD9524_PRELIM U501 AGND DNI R521 200 33 OUT2 32 OUT2_N 3.3V_OUT_0-1 OUT4_N AGND DNI R520 200 R511 0.1UF C517 OUT2 31 EEPROM_SEL OUT3_N OUT3 3.3V_OUT_2-5 TP505 1 3P3V_DIGITAL 3P3V_ANALOG TP504 1 30 OUT3 29 OUT3_N 28 EEPROM_SEL 27 PDB PD_N 26 RESETB RESET_N 25 REF_TEST VDD3_OUT_2_3 OUT2_N O4N O4 TP503 1 1 TP502 0.1UF C518 36 STATUS0/SP0 STATUS_0_I2C_SP0 35 STATUS1/SP1 STATUS_1_I2C_SP1 34 VDD_1_8_OUT_2_3 1.8V_OUT_0-5 41 20 C501 DNI C514 0.1UF 3.3V_PLL1 0.1UF OUT0 OUT0_N 38 CLK_IN+ 0.001UF PAD C516 1.8V_OUT_0-5 0.1UF 13 SYNC_N 14 VDD3_REF 15 CS_N_SDA 16 SCLK_SCL 17 SDIO 18 SDO 19 OUT5_N OUT1_N37 OUT0 100 OUT4 2 1 2 45OHMS E502 OUT2_N OUT2 5 2 3.3V_OUT_2-5 100 200 3.3V_OUT_0-1 3.3V_PLL1 3.3V_PLL2 AGND R514 200 R513 1.8V_OUT_0-5 10K R518 3.3V_REF J501 1UH 3.3V_OUT_2-5 L505 1UH L504 1UH L503 1UH L502 1UH 1UH L501 R512 NC7WZ16P6X 4 AGND Y2 10K L506 U300 Y1 6 R517 GND VCC 3.3V_OUT_2-5 3 A2 1 A1 0.1UF 3.3V_OUT_0-1 AGND C519 45OHMS 1 DNI AGND 5 4 3 2 1 J503 AGND E501 DNI 5 4 3 2 1 J502 DRVDD 10K OUT0 10K OUT0_N R515 0.1UF 0 0 R534 LAYOUT : SMA' S SHOUL D BE 540 MIL S CENTE R TO CENTER CLK_INLAYOUT : SHAR E PAD S WIT H ACTIV E CLOC K PAT H R'S R531 R530 49.9 DNI 0 0 R548 0 0 KP_ICELL 0 R532 DNI 0 R516 OUT1 OUT5 21 VDD3_OUT_4_5 3.3V_OUT_2-5 1 VDD3_CP48 LDO_PLL147 PLL1_OUT46 REF_SEL45 ZD_IN_N 44 ZD_IN 43 42 VDD_1_8_OUT_0_1 R519 SYNCB 10K 3.3V_REF USB_CSB2 CYP_SCLK CYP_SDI CYP_SDO OUT0_N40 VDD3_OUT_0_139 22 OUT4_N 23 OUT4 1.8V_OUT_0-5 24 VDD_1_8_OUT_4_5 OUT4_N OUT4 2 3 100 C520 A A C C CR501 CR502 0.1UF C521 0.1UF 10UF C526 R501 49.9 R541 DNI R542 DNI KP_ICELL DNI 0 R547 0 DNI R544 R538 10K 10K R545 AGND AGND CLK_OUT- CLK_OUT+ AGND 10UF C534 R510 10UF C527 PECL/CML/LVD S CL K CIRCUITRY 10UF C525 Rev. B | Page 30 of 48 C524 Figure 33. AD9641 Clock Input Circuits 10UF 09941-033 UG-294 Evaluation Board User Guide Evaluation Board User Guide UG-294 09941-034 Figure 34. AD9641 SPI Configuration Circuit and FIFO Connections Rev. B | Page 31 of 48 Evaluation Board User Guide 09941-035 UG-294 Figure 35. AD9641 Top Side Rev. B | Page 32 of 48 UG-294 09941-036 Evaluation Board User Guide Figure 36. AD9641 Ground Plane (Layer 2) Rev. B | Page 33 of 48 Evaluation Board User Guide 09941-037 UG-294 Figure 37. AD9641 Power Plane (Layer 3) Rev. B | Page 34 of 48 UG-294 09941-038 Evaluation Board User Guide Figure 38. AD9641 Power Plane (Layer 4) Rev. B | Page 35 of 48 Evaluation Board User Guide 09941-039 UG-294 Figure 39. AD9641 Ground Plane (Layer 5) Rev. B | Page 36 of 48 UG-294 09941-040 Evaluation Board User Guide Figure 40. AD9641 Bottom Side Rev. B | Page 37 of 48 UG-294 Evaluation Board User Guide ORDERING INFORMATION BILL OF MATERIALS Table 4. AD9644 Board BOM Item 1 Qty 1 Reference Designator N/A 2 21 3 6 C101, C102, C103, C104, C105, C106, C109, C110, C111, C112, C113, C114, C115, C116, C119, C120, C514, C515, C516, C520, C521 C107, C117, C118, C121, C122, C212 4 46 5 6 C123, C231, C233, C235, C237, C239, C301, C305, C306, C307, C311, C312, C401, C402, C403, C404, C405, C406, C407, C408, C409, C411, C413, C414, C419, C420, C501, C502, C504, C505, C506, C507, C512, C517, C518, C519, C522, C529, C530, C531, C532, C533, C535, C536, C601, C604 C201, C232, C234, C236, C238, C240 6 4 C202, C203, C204, C207 7 6 C206, C209, C225, C227, C228, C230 8 6 C210, C211, C220, C221, C223, C224 9 1 C213 10 2 C214, C216 11 5 C215, C217, C218, C226, C229 12 7 13 7 14 2 C302, C303, C304, C308, C309, C310, C537 C410, C412, C524, C525, C526, C527, C534 C503, C508 15 2 C509, C510 16 2 C511, C513 17 1 CR201 18 1 CR202 19 1 CR203 20 3 CR204, CR205, CR206 21 2 CR501, CR502 22 1 CR503 Description PCBZ, AD9644 customer board Capacitor ceramic X5R 0201 Value Capacitor monolithic ceramic 0402 Capacitor ceramic X7R 0402 1 µF 0.1 µF 0.1 µF Capacitor tantalum 10 µF Capacitor ceramic X5R 0805 Capacitor monolithic ceramic X5R Capacitor ceramic chip 4.7 µF 4.7 µF 22 µF Capacitor ceramic X7R 0402 Capacitor chip monolithic ceramic C0G 0402 Capacitor ceramic X7R 0402 Capacitor ceramic NP0 0402 Capacitor ceramic monolithic Capacitor ceramic X5R 2200 pF Capacitor ceramic monolithic Capacitor chip ceramic X7R 0603 Diode rectifier GPP SMD 0.001 µF Diode Schottky 3 A rectifier LED green surface mount Diode recovery rectifier LED green surface mount Diode Schottky dual series Rev. B | Page 38 of 48 100 pF 0.01 µF 8.2 pF 10 µF 0.33 µF 0.47 µF S1AB-13 SK33A-TP LNJ314G8TRA (green) S2A-TP Manufacturer/Part No. Analog Devices AD9644CE01 Rev. A Murata GRM033R60J104KE19D Murata GRM155R60J105KE19D Murata GRM155R71C104KA88D AVX Corporation TAJA106K010RNJ Taiyo Yuden EMK212BJ475KG-T Murata GRM188R60J475KE19 Murata GRM21BR60J226ME39L Phycomp (Yageo) CC0402KRX7R9BB222 Murata GRM1555C1H101JD01D Murata GRM155R71H103KA01D Yageo 0402CG829D9B200 Murata GRM21BR61C106KE15L Murata GRM155R61A334KE15D Murata GRM155R71H102KA01D Murata GCM188R71C474KA55D Diodes Incorporated S1AB13 Micro Commercial Components SK33A-TP Panasonic LNJ314G8TRA LNJ314G8TRA (green) Micro Commercial Components S2A-TP Panasonic LNJ314G8TRA HSMS-2812BLK Avago HSMS-2812BLK Evaluation Board User Guide Item 23 Qty 12 24 25 2 1 Reference Designator E201, E202, E204, E205, E207, E210, E211, E212, E213, E214, E215, E216 E501, E502 F201 26 1 FL201 27 4 J101, J301, J303, J505 28 2 J401, J402 29 1 J501 30 4 JP201, JP202, JP203, JP204 31 32 33 2 6 4 L201, L202 L501, L502, L503, L504, L505, L506 P101, P401, P402, P501 34 1 P201 35 1 P202 36 1 P203 37 1 P601 38 36 39 40 2 1 R101, R107, R217, R219, R241, R303, R307, R319, R320, R323, R328, R339, R340, R409, R413, R506, R522, R523, R524, R525, R532, R538, R547, R551, R552, RS201, RS202, RS203, RS204, RS205, RS206, RS207, RS208, RS209, RS210, RS211 R102, R103 R201 41 22 42 1 R202, R416, R417, R418, R419, R420, R421, R422, R423, R424, R425, R509, R515, R516, R517, R518, R519, R544, R545, R601, R609, R610 R203 43 2 R205, R222 44 1 R206 45 5 R207, R208, R602, R611, R612 46 47 1 1 R209 R210 48 49 50 2 1 1 R211, R212 R213 R214 51 52 2 4 R302, R322 R313, R314, R333, R334 UG-294 Description Inductor ferrite bead Value 100 MHz Manufacturer/Part No. Panasonic EXC-ML20A390U Chip bead core Fuse polyswitch PTC device 1812 Filter noise suppression LC combined type Connector-PCB SMA ST edge mount Connector-PCB header ST 10-pin Connector-PCB BERG header ST male 3-pin Resistor jumper SMD 0805 (SHRT) Inductor surface mount Inductor SMT power Connector-PCB header two-position Connector-PCB dc power jack surface mount Connector-PCB header six-position Connector-PCB, pluggable header Connector-PCB 60-pin RA connector Resistor film SMD 0402 45 Ω 1.1 A BNX016-01 Panasonic EXCCL3225U1 Tyco Electronics NANOSMDC110F-2 Murata BNX016-01 SMA-J-P-X-ST-EM1 Samtec SMA-J-P-X-ST-EM1 TSW-105-08-G-D Samtec TSW-105-08-G-D SAMTECTSW10308GS3PIN Samtec TSW-103-08-G-S 0 Panasonic ERJ-6GEYJ0.0 2.2 µH 1 µH TSW-102-08-G-S Toko FDV0630-2R2M Coilcraft ME3220-102MLB Samtec TSW-102-08-G-S PJ-202A CUI STACK PJ-202A Z5.531.3625.0 Wieland Z5.531.3625.0 Z5.531.3425.0 Wieland Z5.531.3425.0 6469169-1 Tyco 6469169-1 0 Panasonic ERJ-2GE0R00X Resistor film SMD 0402 Resistor film chip thick 2.0k 261 Resistor precision thick film chip R0402 10k Multicomp CR10B202JT NIC COMP CORP NRC06F2610TRF Panasonic ERJ-2RKF1002X Resistor precision thick film chip R0402 Resistor precision thick film chip R0402 Resistor precision thick film chip R0402 Resistor precision thick film chip R0402 Resistor chip SMD 0402 Resistor precision thick film chip R0402 Resistor chip SMD 0402 Resistor film SMD 0402 Resistor precision thick film chip R0402 Resistor film SMD 0603 Resistor film SMD 0402 1.91k Panasonic ERJ-2RKF1911X 1.00k Panasonic ERJ-2RKF1001X 10 Panasonic ERJ-2RKF10R0X 100k Panasonic ERJ-2RKF1003X 27k 4.64k Panasonic ERJ-2RKF2702X Panasonic ERJ-2RKF4641X 15k 13k 10.5k Panasonic ERJ-2RKF1502X Yageo 9C04021A1302FLHF3 Panasonic ERJ-2RKF1052X 0 36 Panasonic ERJ-3GEY0R00V Panasonic ERJ-2GEJ360X Rev. B | Page 39 of 48 UG-294 Evaluation Board User Guide Item 53 54 Qty 4 8 55 56 5 1 Reference Designator R315, R316, R335, R336 R317, R318, R337, R338, R501, R503, R505, R604 R401, R402, R603, R605, R626 R502 57 3 R510, R511, R512 58 2 R513, R514 59 1 R543 60 1 R555 61 12 62 5 R606, R613, R616, R618, R619, R620, R621, R622, R623, R624, R625, R628 T302, T303, T306, T307, T503 63 64 2 1 T401, T402 U101 65 1 U201 66 2 U202, U203 67 2 U204, U205 68 1 U206 69 2 U300, U602 70 1 U401 71 1 U501 72 1 U503 73 1 U601 74 1 Y502 75 1 2 C205, C208 761 2 C219, C222 771 4 C415, C416, C421, C422 781 2 791 Description Resistor film SMD 0402 Resistor precision thick film chip R0402 Resistor film SMD 0402 Resistor ultra-precision ultra-reliability MF chip Resistor precision thick film chip R0201 Resistor precision thick film chip R0402 Resistor film SMD 0402 Value 33 49.9 Manufacturer/Part No. Panasonic ERJ-2GEJ330X Panasonic ERJ-2RKF49R9X 1.1k 1k Panasonic ERJ-2GEJ112X Susumu RG1005P-102-B-T5 100 Panasonic ERJ-1GEF1000C 200 Panasonic ERJ-2RKF2000X 100 Venkel CR0402-16W1000FPT Susumu RG1005P-102-B-T5 Resistor ultra-precision ultra-reliability MF chip Resistor thick film chip 1k Transformer RF 1:1 MABA-007159-000000 Transformer RF IC serial output ADC prelim IC low dropout CMOS linear regulator IC 150 mA ultralow noise, CMOS linear regulator IC low dropout CMOS linear regulator IC dual configurable sync PWM step-down regulator IC tiny logic UHS dual buffer IC ultralow distortion IF dual VGA IC AD9524 prelim TC3-1T+ AD9644BCPZ-155 IC 3.3 V LVDS 1-bit high speed differential driver IC tiny logic UHS dual buffer ACMOS/LSTTL compatible clock oscillator Capacitor ceramic X7R 0402 C0603 0 ADP1708ARDZ-R7 ADP150AUJZ-3.3-R7 ADP1706ARDZ-1.8-R7 ADP2114_PRELIM Multicomp 0402WGF0000TCE Macom MABA-007159000000 Mini Circuits TC3-1T+ Analog Devices AD9644BCPZ-155 Analog Devices ADP1708ARDZ-R7 Analog Devices ADP150AUJZ-3.3-R7 Analog Devices ADP1706ARDZ-1.8-R7 Analog Devices ADP2114_PRELIM NC7WZ16P6X Fairchild NC7WZ16P6X AD8376ACPZ NC7WZ07P6X Analog Devices AD8376ACPZ Analog Devices AD9524_PRELIM Analog Devices ADN4661BRZ Fairchild NC7WZ07P6X 80 MHz Valpey Fisher VFAC3HL80 0.01 µF Murata GRM155R71H103KA01D 0603 AD9524_PRELIM ADN4661 0603 0.001 µF C417, C423 Capacitor ceramic monolithic Capacitor ceramic 2.7 pF 2 C418, C424 Capacitor ceramic 22 pF 801 4 C523, C528, C602, C603 0.1 µF 811 4 E203, E206, E208, E209 Capacitor ceramic X7R 0402 Inductor ferrite bead 100 MHz Phycomp (YAGEO) 0402CG220J9B200 Murata GRM155R71C104KA88D Panasonic EXC-ML20A390U 821 5 J302, J304, J502, J503, J506 Connector-PCB SMA ST SMA-J-P-X-ST-EM1 Samtec SMA-J-P-X-ST-EM1 Rev. B | Page 40 of 48 Murata GRM155R71H102KA01D Samsung CL05C2R7CBNC Evaluation Board User Guide Item Qty Reference Designator 831 11 841 4 L301, L302, L403, L404, L405, L406, L409, L410, L411, L412, L507 L401, L402, L407, L408 851 1 P102 861 1 P602 871 7 881 43 891 UG-294 Description edge mount Inductor surface mount Value Manufacturer/Part No. 100 nH Coilcraft 0603CS-R10XGLU Inductor surface mount 1 µH Coilcraft 0603LS-102XGLB TSW-102-08-G-S Samtec TSW-102-08-G-S 6469169-1 Tyco 6469169-1 49.9 Panasonic ERJ-2RKF49R9X 0 Panasonic ERJ-2GE0R00X 2 R105, R301, R304, R321, R324, R529, R530 R106, R108, R109, R110, R204, R216, R218, R221, R306, R308, R309, R310, R311, R312, R326, R327, R329, R330, R331, R332, R403, R404, R406, R407, R410, R411, R414, R415, R508, R526, R527, R531, R533, R534, R537, R541, R542, R548, R549, R550, R553, R554, R608 R215, R220 Connector-PCB header two-position Connector-PCB 60-pin RA connector Resistor precision thick film chip R0402 Resistor film SMD 0402 R0603 0603 0603 901 2 R305, R325 Resistor film SMD 0603 0 Panasonic ERJ-3GEY0R00V 911 2 R405, R408 130 Panasonic ERJ-2RKF1300X 921 2 R412, R426 Resistor precision thick film chip R0402 Resistor film SMD 0402 300 Panasonic ERJ-2GEJ301X 931 1 R507 R0402 0402 0402 941 2 R520, R521 200 Panasonic ERJ-2RKF2000X 951 2 R539, R540 24.9 Panasonic ERJ-2RKF24R9X 961 3 R607, R614, R617 Resistor precision thick film chip R0402 Resistor precision thick film chip R0402 Resistor thick film chip 0 971 3 R615, R627, R629 10k 981 5 T301, T304, T305, T308, T502 Resistor precision thick film chip R0402 Transformer RF Multicomp 0402WGF0000TCE Panasonic ERJ-2RKF1002X ADT1-1WT+ Mini Circuits ADT1-1WT+ 991 1 U603 ADG734BRUZ 1001 1 Y501 Analog Devices ADG734BRUZ Epson Toyocom TCO-2111 1 IC CMOS, quad SPDT switches IC oscillator voltage controlled 60 MHz to 800 MHz Do not install. Table 5. AD9641 Board BOM Item 1 Qty 1 Reference Designator N/A 2 17 3 6 C101, C104, C105, C107, C109, C110, C111, C112, C115, C116, C119, C120, C514, C515, C516, C520, C521 C103, C117, C118, C121, C122, C212 Description PCBZ, AD9641 customer board Capacitor ceramic X5R 0201 Value Capacitor monolithic ceramic 0402 1 µF Rev. B | Page 41 of 48 0.1 µF Manufacturer/Part No. Analog Devices AD9641CE01 Rev. A Murata GRM033R60J104KE19D Murata GRM155R60J105KE19D UG-294 Evaluation Board User Guide Item 4 Qty 31 5 7 6 8 7 4 Reference Designator C123, C231, C233, C235, C237, C239, C301, C305, C306, C401, C402, C403, C404, C501, C502, C504, C505, C506, C507, C512, C517, C518, C519, C523, C529, C530, C531, C532, C533, C601, C604 C201, C232, C234, C236, C238, C240, C405 C204, C206, C207, C209, C225, C227, C228, C230 C205, C208, C226, C229 8 2 C210, C211 9 3 C302, C303, C304 10 2 C503, C508 11 1 C510 12 2 C511, C513 13 5 C524, C525, C526, C527, C534 14 4 CR201, CR204, CR205, CR206 15 1 CR202 16 1 CR203 17 2 CR501, CR502 18 1 CR503 19 10 20 21 2 1 E201, E202, E204, E205, E207, E212, E213, E214, E215, E216 E501, E502 F201 22 1 FL201 23 3 J101, J301, J506 24 1 J501 25 2 JP201, JP203 26 27 6 3 L501, L502, L503, L504, L505, L506 P101, P102, P401 28 1 P201 29 1 P202 30 1 P203 Description Capacitor ceramic X7R 0402 Value 0.1 µF Manufacturer/Part No. Murata GRM155R71C104KA88D Capacitor tantalum 10 µF AVX TAJA106K010RNJ Capacitor monolithic ceramic X5R Capacitor ceramic chip X8R Capacitor ceramic X5R 0603 Capacitor ceramic NP0 0402 Capacitor ceramic X5R 4.7 µF Murata GRM188R60J475KE19 TDK C1005X8R1E103K Capacitor ceramic monolithic Capacitor chip ceramic X7R 0603 Capacitor ceramic monolithic Diode rectifier GPP SMD Diode Schottky 3 A rectifier LED green surface mount LED green surface mount Diode Schottky dual series Inductor ferrite bead Chip bead core Fuse polyswitch PTC device 1812 Filter noise suppression LC combined type Connector-PCB SMA ST edge mount Connector-PCB BERG header ST male 3-pin Resistor jumper SMD 0805 (SHRT) Inductor SMT power Connector-PCB header two-position Connector-PCB DC power jack surface mount Connector-PCB header six-position Connector-PCB, pluggable header Rev. B | Page 42 of 48 0.01 µF 10 µF 8.2 pF 0.33 µF Murata GRM188R60J106ME47D Yageo 0402CG829D9B200 S1AB-13 Murata GRM155R61A334KE15D Murata GRM155R71H102KA01D Murata GCM188R71C474KA55D Murata GRM21BR61C106KE15L Diode Incorp S1AB-13 SK33A-TP MCC SK33A-TP LNJ314G8TRA (green) Panasonic LNJ314G8TRA LNJ314G8TRA (green) Panasonic LNJ314G8TRA HSMS-2812BLK Avago HSMS-2812BLK 100 MHz Panasonic EXC-ML20A390U 45 Ω 1.1 A BNX016-01 Panasonic EXCCL3225U1 Tyco Electronics NANOSMDC110F-2 Murata BNX016-01 SMA-J-P-X-ST-EM1 Samtec SMA-J-P-X-ST-EM1 SAMTECTSW10308GS3PIN Samtec TSW-103-08-G-S 0 Panasonic ERJ-6GEYJ0.0 1 µH TSW-102-08-G-S Coilcraft ME3220-102MLB Samtec TSW-102-08-G-S PJ-202A CUI Stack PJ-202A Z5.531.3625.0 Wieland Z5.531.3625.0 Z5.531.3425.0 Wieland Z5.531.3425.0 0.001 µF 0.47 µF 10 µF Evaluation Board User Guide Item 31 Qty 1 Reference Designator P601 32 19 33 1 R101, R303, R307, R319, R320, R404, R405, R506, R522, R523, R524, R525, R531, R537, R548, R551, R552, RS201, RS205 R201 34 1 R222 35 36 37 38 1 2 2 5 R302 R313, R314 R315, R316 R317, R318, R501, R503, R604 39 2 R401, R402 40 41 4 1 R407, R603, R605, R626 R502 42 11 43 3 R509, R515, R516, R517, R518, R519, R544, R545, R601, R609, R610 R510, R511, R512 44 2 R513, R514 45 46 1 3 R543 R602, R611, R612 47 8 48 49 3 1 R606, R613, R616, R618, R620, R624, R625, R628 T302, T303, T401 T503 50 6 51 1 TP201, TP501, TP502, TP503, TP504, TP505 U101 52 2 U202, U203 53 2 U204, U205 54 1 U206 55 2 U300, U602 56 1 U401 57 1 U501 58 1 U503 UG-294 Description Connector-PCB 60-pin RA connector Resistor film SMD 0402 Value 6469169-1 Manufacturer/Part No. Tyco 6469169-1 0 Panasonic ERJ-2GE0R00X Resistor film chip thick 261 Resistor precision thick film chip R0402 Resistor film SMD 0603 Resistor film SMD 0402 Resistor film SMD 0402 Resistor precision thick film chip R0402 Resistor precision thick film chip R0402 Resistor film SMD 0402 Resistor ultra-precision ultra-reliability MF chip Resistor precision thick film chip R0402 Resistor precision thick film chip R0201 Resistor precision thick film chip R0402 Resistor film SMD 0402 Resistor precision thick film chip R0402 Resistor thick film chip 1.00k NIC Comp Corp NRC06F2610TRF Panasonic ERJ-2RKF1001X 0 36 33 49.9 Panasonic ERJ-3GEY0R00V Panasonic ERJ-2GEJ360X Panasonic ERJ-2GEJ330X Panasonic ERJ-2RKF49R9X 40.2 Panasonic ERJ-2RKF40R2X 1.1k 1k Panasonic ERJ-2GEJ112X Susumu RG1005P-102-B-T5 10k Panasonic ERJ-2RKF1002X 100 Panasonic ERJ-1GEF1000C 200 Panasonic ERJ-2RKF2000X 100 100k Venkel CR0402-16W-1000FPT Panasonic ERJ-2RKF1003X 0 Multicomp 0402WGF0000TCE Macom ETC1-1-13 Macom MABA-007159000000 P/O PCB NONE Transformer RF 1:1 Transformer RF 1:1 ETC1-1-13 MABA-007159-000000 TEK probe Test pad IC-Analog Devices AD9641 prelim IC-Analog Devices 300 mA low dropout CMOS linear regulator IC-Analog Devices low dropout CMOS linear regulator IC-Analog Devices compact 600 mA, 3 MHz step-down DCto-DC converter IC tiny logic UHS dual buffer IC 2.6 GHz ultralow distortion differential IF/RF amplifier IC-Analog Devices AD9524 prelim IC-Analog Devices CMOS LVDS differential driver AD9641_PRELIM Rev. B | Page 43 of 48 ADP1713AUJZ-3.3-R7 Analog Devices AD9641_PRELIM Analog Devices ADP1713AUJZ-3.3-R7 ADP1706ARDZ-1.8-R7 Analog Devices ADP1706ARDZ-1.8-R7 ADP2108AUJZ-1.8-R7 Analog Devices ADP2108AUJZ-1.8-R7 NC7WZ16P6X Fairchild NC7WZ16P6X ADL5562_PRELIM Analog Devices ADL5562_PRELIM AD9524_PRELIM Analog Devices AD9524_PRELIM Analog Devices ADN4661BRZ ADN4661BRZ UG-294 Evaluation Board User Guide Item 59 Qty 1 Reference Designator U601 60 1 4 C213, C214, C215, C216 611 7 621 2 C406, C407, C408, C522, C528, C602, C603 C409, C410 631 1 C509 641 651 6 4 E203, E206, E208, E209, E210, E211 J302, J502, J503, J505 661 2 JP202, JP204 671 1 JP401 681 691 701 711 2 3 4 1 L201, L202 L301, L405, L406 L401, L402, L403, L404 P602 721 731 2 6 R102, R103 R105, R301, R304, R505, R529, R530 741 751 1 1 R106 R204 761 771 1 36 781 2 R305 R306, R308, R309, R310, R311, R312, R403, R406, R408, R409, R412, R508, R526, R527, R528, R532, R533, R534, R538, R541, R542, R547, R549, R550, R553, R554, R608, RS202, RS203, RS204, RS206, RS207, RS208, RS209, RS210, RS211 R410, R411 791 801 1 2 R507 R520, R521 811 2 R539, R540 821 3 R607, R614, R617 831 2 R615, R627 841 851 3 12 861 1 T301, T304, T502 TP601, TP602, TP603, TP604, TP605, TP606, TP607, TP608, TP609, TP610, TP611, TP612 U603 871 1 Y501 1 Description IC tiny logic UHS dual buffer Capacitor ceramic X5R 0603 Capacitor ceramic X7R 0402 Capacitor monolithic ceramic C0G 0402 Capacitor ceramic monolithic Inductor ferrite bead Connector-PCB SMA ST edge mount Resistor jumper SMD 0805 (SHRT) Solder pads R0402 jumper Inductor SMT power Inductor SM Inductor SM CONN_PCB 60-pin RA connector Resistor film SMD 0402 Resistor precision thick film chip R0402 Resistor film SMD 0402 Resistor precision thick film chip R0402 Resistor film SMD 0603 Resistor film SMD 0402 Resistor precision thick film chip R0402 Do not install (R0402) Resistor precision thick film chip R0402 Resistor precision thick film chip R0402 Resistor thick film chip Resistor precision thick film chip R0402 Transformer RF TEK probe IC-Analog Devices CMOS, quad SPDT switches IC oscillator voltage controlled Do not install. Rev. B | Page 44 of 48 Value NC7WZ07P6X Manufacturer/Part No. Fairchild NC7WZ07P6X 10 µF 100 MHz SMA-J-P-X-ST-EM1 Murata GRM188R60J106ME47D Murata GRM155R71C104KA88D Murata GRM1555C1H5R0CZ01D Murata GRM155R71H102KA01D Panasonic EXC-ML20A390U Samtec SMA-J-P-X-ST-EM1 0 Panasonic ERJ-6GEYJ0.0 JPR0402 N/A JPR0402 2.2 µH 82 nH 120 nH 6469169-1 Coilcraft EPL2014-222MLB Murata LQW18AN82NG00D Panasonic ELJ-RER12JF3 Tyco 6469169-1 2.0k 49.9 Multicomp CR10B202JT Panasonic ERJ-2RKF49R9X 100 100k Venkel CR0402-16W-1000FPT Panasonic ERJ-2RKF1003X 0 0 Panasonic ERJ-3GEY0R00V Panasonic ERJ-2GE0R00X 1.00k Panasonic ERJ-2RKF1001X 0402 200 0402 Panasonic ERJ-2RKF2000X 24.9 Panasonic ERJ-2RKF24R9X 0 10k Multicomp 0402WGF0000TCE Panasonic ERJ-2RKF1002X ADT1-1WT+ Test pad Mini Circuits ADT1-1WT+ P/O PCB NONE ADG734BRUZ Analog Devices ADG734BRUZ 60 MHz to 800 MHz Epson Toyocom TCO-2111 0.1 µF 5 pF 0.001 µF Evaluation Board User Guide UG-294 NOTES Rev. B | Page 45 of 48 UG-294 Evaluation Board User Guide NOTES Rev. B | Page 46 of 48 Evaluation Board User Guide UG-294 NOTES Rev. B | Page 47 of 48 UG-294 Evaluation Board User Guide NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. 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This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2011–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG09941-0-3/13(B) Rev. B | Page 48 of 48