AN-1169 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Linear Gain Setting Mode: A Detailed Description by Miguel Usach INTRODUCTION Digipots are commonly used to digitally program the gain in an amplifier or set the output voltage of a power supply regulator as shown in Figure 1 and Figure 2. If the resistances R1 and R2 are directly replaced with a digital potentiometer, then the transfer function becomes logarithmic. Figure 4 shows an example for the LDO. 4.5 ADP123 4.0 VOUT R1 3.5 11057-001 OUTPUT VOLTAGE (V) ADJ R2 Figure 1. Adjustable Output Voltage LDO VIN AD8515 R1 2.0 1.5 0.5 0 CODE Figure 2. Noninverting Amplifier Figure 4. Logarithmic Transfer Function for the LDO In both cases, the transfer equation depends on two different variables, R1 and R2, as shown in Equation 1 for the LDO and in Equation 2 for the noninverting amplifier. R VOUT = 0.5 × 1 + 1 R2 2.5 1.0 11057-002 R2 VOUT 3.0 (1) R VOUT = VIN × 1 + 1 R 2 (2) Using the digipot in potentiometer mode in these transfer equations is not straightforward since both resistors strings, RAW and RWB, are complementary; in other words, RAW = RAB − RWB, as shown in Figure 3. 11057-004 VOUT This logarithmic transfer function can be desirable in some applications, such as light or audio control, because the human body is not a linear receptor of those stimuli, but in many electronic applications a linear transfer function is preferred. LINEARIZING THE OUTPUT There are three different methods to achieve a linear output directly proportional to the code loaded in the digipot. These three methods are described in detail in the sections that follow. Use the Digipot in Rheostat Mode The digipot can be used in rheostat mode, where only two terminals are used, as shown in Figure 5. A A RAW W W B 11057-003 RWB B 11057-005 RAB Figure 5. Rheostat Mode Figure 3. Potentiometer Resistance Rev. A | Page 1 of 4 AN-1169 Application Note This mode requires using a discrete resistor in conjunction with the digipot. An example of the noninverting amplifier is shown in Figure 6. VIN AD8515 R2 The consequences are similar to the previous approach, that is, the adjustable output gain is reduced, but, in this case, the settling time is reduced due to the lower RWB’ value, as defined in Equation 4. RWB ' = VOUT (4) The overall parallel resistance value is smaller, thus the resistor noise is lower than the series resistance approach. 11057-006 RWB RHEOSTAT MODE R2 × RWB R2 + RWB Figure 6. Noninverting Amplifier with Rheostat Control The main benefit of using this solution is the simplicity in the circuit, the wide output ranges, and the fast settling time. As a trade-off, the overall output error may be quite high because the typical tolerance error in a digipot is around ±20% maximum. Given that R2 is fixed, this can cause resistor mismatches. Analog Devices, Inc., offers ±8% and ±1% resistor tolerance error digipots to improve the performance in these configurations as shown in the selection table. As a precaution, remember that the digipot has internal leakage current. If you choose the parallel resistor, R2, to be small enough to force not enough current through the digipot, the linearity errors, R-INL and R-DNL, could be considerable higher than specified in the data sheet. Linearize the Potentiometer Configuring the digipot as a vernier DAC, as shown in Figure 9, the voltages in the Terminal A and Terminal B are limited by the placement of the in-series resistors, R1 and R2. +IN Additionally, the output error can be reduced by using a serial resistor with the digipot, as shown in Figure 7, for the LDO. RAB A R1 RAW W ADP123 R2 R1 ADJ RWB’ –IN R2 RHEOSTAT MODE RWB 11057-009 VOUT Figure 9. Vernier DAC RWB 11057-007 The idea of this approach is to reduce the output range resulting in a more linear output, as shown in Figure 10, for two different configurations. Figure 7. Reduced Tolerance Error with Series Resistance 1.2 In this case, to assume the 20% tolerance error is negligible R2 >> RWB; or, in other words, the output error can be improved by reducing the adjustable output gain and increasing the settling time. The final resistance is defined in Equation 3. R1 = 1kΩ, R2 = 50kΩ R1 = 1kΩ, R2 = 10kΩ LINEAR (R1 = 1kΩ, R2 = 50kΩ) LINEAR (R1 = 1kΩ, R2 = 10kΩ) 1.0 OUTPUT VOLTAGE (V) RWB ' = R2 + RWB (3) A second way to reduce the error is by placing a parallel resistance with the digipot as shown in Figure 8. ADP123 0.8 0.6 0.4 VOUT 0 R1 ADJ CODE RWB’ RWB 11057-010 0.2 VOUT Figure 10. LDO Voltage with a Vernier DAC R2 This configuration provides lower linearity error than using the digipot in rheostat mode and it results in a lower tempco. 11057-008 RHEOSTAT MODE OUT B VOUT Figure 8. Reduced Tolerance Error with Parallel Resistance In this case, the assumption is that R2 << RWB due to the nominal end-to-end resistor values, 10 kΩ, 50 kΩ and 100 kΩ. The final resistance between terminals is defined in Equation 5 and Equation 6. Rev. A | Page 2 of 4 R1 ' = R1 + R AW (5) R2 ' = R2 + RWB (6) Application Note AN-1169 Enable the Linear Gain Setting Mode It is recommended to use a low resistor tolerance error digipot, ±8% and ±1%. Note that the higher the tolerance, the greater the mismatch resistance error. In linear gain setting mode, the internal resistors strings, RAW and RWB, are dependant. The newly patented architecture implemented in the AD5144, AD5142, AD5124A, and AD5141 improves flexibility, allowing independent programming of the value for each string, RAW and RWB, as shown in Figure 13. In this case, using a typical 20% resistance tolerance error, a parallel resistor should be used with the digipot to reduce the overall error as shown in Figure 11. +IN RDAC REGISTER AW R1 RAB A RAW RAW R3 OUT RAB = RAW + RWB –IN RDAC REGISTER WB Again, it is important to consider the effect of the leakage current in this configuration. Selecting a low parallel value could force the current through R3. Figure 13. Linear Gain Setting Mode Enabling this mode, the output voltage can be linear, fixing the value of one resistor string, that is, RWB, and setting the other string, RAW. The mode of operation is similar to using the digipot in rheostat mode in conjunction with a discrete resistor, but in this case the overall tolerance error is below 1% without using any external parallel or series resistance combination. To calculate the final resistance between terminals can be quite complex, thus the best approach is to use a Y-Δ transform as shown in Figure 12. RAW +IN R3 +IN RWB RAB R1 R4 OUT This is achieved because the gain is set by the resistance ratios, and the overall resistor tolerance error, as is common in both string arrays, can be disregarded. RAW’ R6 OUT R5 R4 –IN R6 R5 R2 RWB’ 11057-012 R2 –IN Figure 12. Y-Δ Transform Figure 14 shows an example of sweeping RAW from zero scale to full scale, fixing RWB at midscale for a 10 kΩ digipot. Analyzing the plot in detail, at lower codes when the resistances, RAW or RWB, are small, the mismatch becomes higher than ±1%. This is due to an error added by the non-negligible effect in the internal CMOS switches resistance. where: 5 R AW xR3 R AB + R3 (7) R5 = RWB xR3 R AB + R3 (8) R AW ' = R1 + R4 (9) RBW ' = R2 + R5 (10) 4 MISMATCH ERROR (%) R4 = R6 should be connected to a high impedance input so that the effect of this resistance can be considered negligible. 3 2 1 0 –1 0 50 100 150 200 RAW DECIMAL CODE Figure 14. 10 kΩ Resistance Match Error Rev. A | Page 3 of 4 250 11057-114 R3 11057-013 11057-011 RWB B Figure 11. Reduced Tolerance Error in Vernier DAC R1 W RWB R2 AN-1169 Application Note The switches effect can be cancelled by selecting codes higher than quarter scale. RWB at code 250 is −2 ppm/C The gain error due to RAW is Enabling linear setting mode, the maximum resistance between Terminal A and Terminal B can be set to double the nominal digipot resistance. In other words, if the RAB resistance is 10 kΩ in potentiometer mode, in lineal setting mode when programming both string resistors at full scale, the RAB = 20 kΩ. ErrorRAW = The gain error due to RWB ErrorRBW = 0.04% Thus, the total error is defined as, GAIN ERROR = ErrorRAW + ErrorRWB = 0.17% 75 Similar to the resistance match error, at lower codes the switch resistance tempco is dominant, but the effect is minimizing at higher codes. 55 35 If a lower error vs. temperature is required, a higher end-to-end resistance value needs to be used as shown in Figure 17 for 100 kΩ. In this particular case, the tempco is much more flat in all the code range, so the error expected should be smaller. 0 –5 0 50 100 150 200 CODE 255 20 TEMPERATURE COEFFICIENT (ppm/°C) Figure 15. 10 kΩ Resistance Tempco Take, for example, the circuit in Figure 16. Choosing a gain of 3, the codes ratio is defined in equation 11. AD5141 A B RAW RWB W 11057-117 VOUT VIN Gain = 1 + RWB ⇒ 2 × R AW = RWB R AW (11) Fixing the RWB code to 250, the RAW code is 125. As a rough estimate, the overall error due tempco over the full temperature range is defined as, RAW at code 125 is 20 ppm/C 10 0 –10 –20 –30 –40 Figure 16. Noninverting Amplifier and AD5141 in Linear Gain Setting Mode RWA RWB 0 50 100 150 200 CODE 255 11057-017 15 11057-016 TEMPERATURE COEFFICIENT (ppm/°C) = 9765.625 3 − 1 + 4882.8125 + 9.765 = 0.13% = 3 TEMPCO RWB TEMPCO RAW 95 Gain RW B (250) 3 − 1 + 20 × R AW (125) × 100 ( 125 ) + R AW 1e6 = = 3 Similar performance can be achieved by using a dual channel digipot, but this solution increases the cost and size with degradation in the settling time. Another additional benefit of using this configuration is the reduced temperature coefficient, as shown in Figure 14. In this case, the importance is not the absolute tempco for each string resistor, but the difference between the tempco for the specific codes that define the ratio. Gain − Gain RAW Figure 17. 100 kΩ Resistance Tempco REVISION HISTORY 8/13—Rev. 0 to Rev. A Changes to Equation 2 ......................................................................1 12/12—Revision 0: Initial Version ©2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN11057-0-8/13(A) Rev. A | Page 4 of 4

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