AN1236

AN1236
Using C30 and a Timer to Interface dsPIC33 DSCs and PIC24
MCUs with UNI/O® Bus-Compatible Serial EEPROMs
The main features of 11XXX serial EEPROMs are:
Martin Kvasnicka
Microchip Technology Inc.
INTRODUCTION
As embedded systems become smaller, a growing
need exists to minimize I/O pin usage for communication between devices. Microchip has addressed this
need by developing the UNI/O® bus, a low-cost, easyto-implement solution requiring only a single I/O pin for
bidirectional communication.
UNI/O bus-compatible serial EEPROMs can be used to
enhance any application facing restrictions on available I/O. Such restrictions can potentially stem from
connectors, board space, or from the master device
itself.
The 11XXX family is the newest addition to Microchip
Technology’s broad serial EEPROM product line, and
is compatible with the newly developed UNI/O bus.
FIGURE 1:
•
•
•
•
•
•
•
•
Single I/O pin used for communication
EEPROM densities from 1 Kb to 16 Kb
Extremely small packages
Bus speed from 10 kHz up to 100 kHz
Wide voltage range from 1.8V to 5.5V
Low-power operation
Wide temperature range from -40°C to +125°C
Over 1,000,000 erase/write cycles
This application note is part of a series that provide
source code to help the user implement the protocol
with minimal effort.
Figure 1 describes the hardware schematic for the
interface between the Microchip 11XXX series of
UNI/O bus-compatible serial EEPROMs and the
dsPIC33FJ256GP710 Digital Signal Controller or the
PIC24FJ128GA010 microcontroller. The schematics
show the connections necessary between the Digital
Signal Controller and the serial EEPROM as tested.
The software was written assuming these connections.
The single I/O connection between the Digital Signal
Controller and the serial EEPROM includes a
recommended pull-up resistor.
CIRCUIT FOR dsPIC33FJ256GP710 OR PIC24FJ128GA010 AND 11XXX
SERIAL EEPROM
100 Pin TQFP
dsPIC33FJ256GP710
PIC24FJ128GA010
U2TX/CN18/RF5
U1TX/RF3
U2RX/CN17/RF4
51
50
U1RX/RF2
49
SDO1/RF8
52
U1RTS/CN21/RD15
53
U1CTS/CN20/RD14
SDI1/RF7
48
54
VDD
SCK1/INT0/RF6
47
VSS
Note 1:
2:
SDA1/RG3
55
46
45
VCC (2)
56
VCC(2)
SOT-23
VSS
3
11XXX
Author:
2
VCC
20 kΩ (1)
1
SCIO
A pull-up resistor (typically 20 kΩ) on SCIO is recommended to ensure bus idle during power-up.
Decoupling capacitors (typically 0.1 μF) should be used to filter noise on VCC.
© 2008 Microchip Technology Inc.
DS01236B-page 1
AN1236
FIRMWARE DESCRIPTION
The purpose of the firmware is to show how to generate
specific UNI/O bus transactions using a general I/O pin
on the Digital Signal Controller or microcontroller. The
focus is to provide the designer with a strong understanding of communication with the 11XXX serial
EEPROMs, thus allowing for more complex programs
to be written in the future. The firmware was written in
C language and tested using the Microchip Explorer 16
development board. The code can easily be modified to
use any I/O pin that is available.
No additional libraries are required with the provided
code. The main program is organized into five sections:
•
•
•
•
•
Initialization
Write Enable
Page Write
WIP Polling
Sequential Read
The program utilizes the WIP polling feature for detecting the completion of the write cycle after the page write
operation. The read operation allows for verification
that the data was properly written. No method of displaying the input data is provided, but an oscilloscope
can be used.
The code was tested using the 11LC160 serial
EEPROM. This device features 2K x 8 (16 Kbits) of
memory and 16-byte pages. Oscilloscope screen shots
are labeled for ease in reading. The data sheet versions of the waveforms are shown below the oscilloscope screen shots. An external 8 MHz crystal
oscillator is used to clock the Digital Signal Controller or
microcontroller with the PLL enabled. During testing, a
50 kHz serial bus frequency was used. If a different
clock is used, the code must be modified to generate
the proper timings. All values represented in this application note are decimal values unless otherwise noted.
DS01236B-page 2
© 2008 Microchip Technology Inc.
AN1236
INITIALIZATION
Before initiating communication with the 11XXX, the
master device (DSC or MCU) must generate a low-tohigh edge on SCIO to release the serial EEPROM from
Power-on Reset (POR). Because bus idle is high, the
DSC or MCU creates a high-low-high pulse on SCIO.
Once the serial EEPROM has been released from
POR, a standby pulse with a minimum timing of TSTBY
is performed to place the serial EEPROM into Standby
mode, as shown in Figure 2.
FIGURE 2:
Note that once a command has successfully executed
– indicated by the reception of a Slave Acknowledge
(SAK) following the No Master Acknowledge
(NoMAK) – the serial EEPROM enters Standby mode
immediately and a standby pulse is not necessary. In
this case, only the Start Header Setup time (TSS) must
be observed before the DSC or MCU may initiate
another command to the same device.
STANDBY PULSE
TSTBY
SCIO
Standby
mode
POR
Release
from POR
© 2008 Microchip Technology Inc.
DS01236B-page 3
AN1236
WRITE ENABLE
Start Header and Device Address
Before a write operation to the array or the STATUS
register can occur, the Write Enable Latch (WEL) must
be set. This is done by issuing a Write Enable (WREN)
instruction.
To issue a WREN instruction, the DSC or MCU transmits
the start header. This consists of a low pulse (THDR),
followed by the start header (‘01010101’or 0x55),
and a Master Acknowledge (MAK), followed by a
NoSAK. Next, the DSC or MCU transmits the device
address (‘10100000’or 0xA0) and another MAK. The
serial EEPROM then responds with a SAK if the start
header and device address were received correctly.
Figure 3 shows the details of the start header and
device address.
The WEL can be cleared by issuing a Write Disable
(WRDI) instruction. It is also cleared upon termination of
a write cycle to either the array or STATUS register, and
upon POR.
The Write Enable operation has been broken down into
the following components: the start header, which is
followed by the device address and the command byte.
Start Header
MAK
SAK
START HEADER AND DEVICE ADDRESS
MAK
NoSAK
FIGURE 3:
Device Address
SCIO
0 1 0 1 0 1 0 1
DS01236B-page 4
1 0 1 0 0 0 0 0
© 2008 Microchip Technology Inc.
AN1236
Write Enable (WREN) Command Byte
Once the SAK is received following the device address,
the DSC or MCU sends the WREN command byte
(‘10010110’ or 0x96) and performs a final Acknowledge sequence. During this last sequence, the DSC or
MCU sends a NoMAK to signal the end of the operation. Once again, the serial EEPROM responds with a
SAK, indicating it received the byte successfully.
WRITE ENABLE COMMAND
Command
NoMAK
SAK
FIGURE 4:
Figure 4 shows an example of the WREN command
byte.
SCIO
1 0 0 1 0 1 1 0
© 2008 Microchip Technology Inc.
DS01236B-page 5
AN1236
PAGE WRITE
Write Command and Word Address
Once the WREN instruction has been performed, a page
write operation can be executed to write data to the
array. The serial EEPROM features a 16-byte page, so
up to 16 bytes of data can be written within a single
operation.
After the start header and device address have been
sent, the DSC or MCU transmits the Write command
(‘01101100’ or 0x6C) and the word address. The
serial EEPROM uses a 16-bit word address to access
the array, so two bytes must be transmitted for the
entire word address, with the Most Significant Byte sent
first. After every byte, the DSC or MCU transmits a
MAK and the serial EEPROM responds with a SAK.
The page write operation consists of the following components: the Write command, followed by the word
address and the data bytes. Note that the start header
and device address are not illustrated in this section but
are still required to initiate the operation.
Figure 5 shows an example of the Write command and
the word address.
Before beginning the WRITE instruction, a period of TSS
must be observed following the WREN operation. This
period can be used in place of the standby pulse after
a command has been executed successfully when
addressing the same slave device. After the TSS period,
the start header and device address are transmitted as
described on page 4.
Word Address MSB
15 14 13 12 11 10 9 8
SCIO
Word Address LSB
MAK
SAK
Command
MAK
SAK
WRITE COMMAND AND WORD ADDRESS
MAK
SAK
FIGURE 5:
7 6 5 4 3 2 1 0
0 1 1 0 1 1 0 0
DS01236B-page 6
© 2008 Microchip Technology Inc.
AN1236
Once all data bytes have been sent, the DSC or MCU
terminates the command by generating a NoMAK in
place of the MAK, and the serial EEPROM again
responds with a SAK. This will also initiate the internal
write cycle (TWC).
Data Bytes
Once the word address has been transmitted and the
last SAK has been received, the data bytes can be
sent. Up to 16 bytes of data can be sent within a single
operation. After each byte is transmitted, the DSC or
MCU sends a MAK and the serial EEPROM responds
with a SAK. If at any point a NoSAK is received, this
indicates an error occurred and the operation must be
restarted, beginning with a standby pulse.
Data Byte n-1
SCIO
© 2008 Microchip Technology Inc.
7 6 5 4 3 2 1 0
Data Byte n
NoMAK
SAK
WRITE COMMAND FINAL TWO DATA BYTES
MAK
SAK
FIGURE 6:
Figure 6 shows the final two data bytes sent by the
DSC or MCU, as well as the NoMAK and SAK.
7 6 5 4 3 2 1 0
DS01236B-page 7
AN1236
WRITE-IN-PROCESS POLLING
Write-In-Process Polling Routine
After an array or STATUS register WRITE instruction is
executed, the DSC or MCU must observe a write cycle
time (TWC). Write cycle time is a maximum, so the
actual time required is typically less. Therefore, to
transfer data as efficiently as possible, using the WriteIn-Process (WIP) polling feature is highly recommended. Because the STATUS register can be read
during a write cycle, the WIP bit can be continuously
monitored to determine the completion of the write
cycle.
The process of WIP polling consists of the DSC or MCU
sending a start header and device address after
observing the TSS period. The DSC or MCU follows this
by sending the Read Status Register (RDSR) command (‘00000101’ or 0x05). After sending the subsequent SAK, the serial EEPROM transmits the STATUS
register. At this point, the STATUS register can be
requested again by sending a MAK. The WEL and WIP
values sent are updated dynamically, so the DSC or
MCU can continuously check the STATUS register.
Sending a NoMAK terminates the command.
Figure 7 shows an example of WIP polling to check if a
write operation has finished. In this example, the WIP
bit is set (‘1’), which indicates that the write cycle has
not yet completed.
Command
STATUS Register Data
MAK
SAK
WIP POLLING ROUTINE (SHOWING WRITE-IN-PROCESS)
MAK
SAK
FIGURE 7:
SCIO
0 0 0 0 0 1 0 1
DS01236B-page 8
0 0 0 0 0 0 1 1
© 2008 Microchip Technology Inc.
AN1236
WIP Polling Complete
Figure 8 shows the final read of the STATUS register
after the page write operation, in which the WIP bit is
clear (‘0’). This indicates that the write cycle is
complete and the serial EEPROM is ready to continue.
STATUS Register Data
STATUS Register Data
NoMAK
SAK
WIP POLLING FINISHED (SHOWING WRITE COMPLETE)
MAK
SAK
FIGURE 8:
SCIO
0 0 0 0 0 0 1 1
© 2008 Microchip Technology Inc.
0 0 0 0 0 0 0 0
DS01236B-page 9
AN1236
SEQUENTIAL READ
Command and Word Address for Read
The serial EEPROM allows data to be read from the
array in a random access manner. Reading data from
the array is very similar to the write operation, except
that the read is not limited to a single page. In order to
read from the array, the start header and device
address must first be sent after observing the TSS
period. The Read command byte and word address
bytes are transmitted next. The DSC or MCU generates a MAK after every byte, and the serial EEPROM
responds with a SAK if no errors occurred.
Figure 9 shows an example of the Read command
(‘00000011’ or 0x03) followed by the word address.
Word Address MSB
15 14 13 12 11 10 9 8
SCIO
Word Address LSB
MAK
SAK
Command
MAK
SAK
READ – COMMAND BYTE AND WORD ADDRESS
MAK
SAK
FIGURE 9:
7 6 5 4 3 2 1 0
0 0 0 0 0 0 1 1
DS01236B-page 10
© 2008 Microchip Technology Inc.
AN1236
The read operation is not limited to a single page, so
the entire array can be read within a single operation if
the DSC or MCU continues to request data. At the end
of the array, the internal word address is automatically
reset back to 0x000. A NoMAK terminates the
operation.
Reading Data Back
After the Read command and word address have been
sent and acknowledged, the serial EEPROM sends the
first data byte from the array, starting at the address
specified. In order to continue the read, the DSC or
MCU must send a MAK after each data byte, with the
serial EEPROM responding with a SAK if there are no
errors. After each data byte has been sent, the serial
EEPROM automatically increments the internal word
address to output the next data byte.
Data Byte n-1
SCIO
© 2008 Microchip Technology Inc.
7 6 5 4 3 2 1 0
Data Byte n
NoMAK
SAK
READ – FINAL TWO DATA BYTES
MAK
SAK
FIGURE 10:
Figure 10 shows the DSC or MCU reading the final two
bytes of data. The DSC or MCU sends a NoMAK after
the last byte to indicate that no more data is requested
and to terminate the command.
7 6 5 4 3 2 1 0
DS01236B-page 11
AN1236
CONCLUSION
This application note provides examples of the basic
commands for communicating with the UNI/O buscompatible family of serial EEPROMs. These functions
are designed to be used in an end application with very
little modification. The code generated for this
application note was tested using the Explorer 16
Development Board with the connections shown in
Figure 1.
DS01236B-page 12
© 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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Information contained in this publication regarding device
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Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
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SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM,
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© 2008, Microchip Technology Incorporated, Printed in the
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Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
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are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2008 Microchip Technology Inc.
DS01236B-page 13
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DS01236B-page 14
© 2008 Microchip Technology Inc.
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