ADG613-EP Data Sheet

1 pC Charge Injection, 100 pA Leakage,
CMOS, ±5 V/5 V/3 V, Quad SPST Switches
ADG613-EP
Enhanced Product
FEATURES
FUNCTIONAL BLOCK DIAGRAM
1 pC charge injection
±0.01 nA maximum at 25°C leakage currents
85 Ω on resistance
Rail-to-rail switching operation
Fast switching times
16-lead TSSOP
Typical power consumption: ≤11 nW
TTL-/CMOS-compatible inputs
VSS to VDD analog signal range
±2.7 V to ±5.5 V dual supply operation
2.7 V to 5.5 V single-supply operation
Fully specified at ±5 V, 3 V, and 5 V
ADG613-EP
S1
IN1
D1
S2
IN2
D2
S3
IN3
D3
D4
14533-001
S4
IN4
Figure 1.
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications
(AQEC standard)
Military temperature range: −55°C to +125°C
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Enhanced product change notification
Qualification data available on request
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Communications systems
Sample-and-hold systems
Audio signal routing
Relay replacement
Avionics
GENERAL DESCRIPTION
The ADG613-EP is a monolithic CMOS device containing four
independently selectable switches. This switch offers ultralow
charge injection of 1 pC over the full input signal range and
typical leakage currents of 0.01 nA at 25°C.
The device is fully specified for ±5 V, 5 V, and 3 V supplies. It
contains four independent single-pole, single-throw (SPST)
switches. The ADG613-EP contains two switches with digital
control logic that turns on with logic low and two switches in
which the logic is inverted.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG613-EP exhibits break-before-make switching action.
Rev. 0
The ADG613-EP is available in a small, 16-lead TSSOP package.
The ADG613-EP is also a TTL-compatible device.
Additional application and technical information can be found
in the ADG613 data sheet.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
Ultralow charge injection (1 pC typically).
Dual ±2.7 V to ±5.5 V or single 2.7 V to 5.5 V operation.
Temperature range: −55°C to +125°C.
Small, 16-lead TSSOP.
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©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADG613-EP
Enhanced Product
TABLE OF CONTENTS
Features .............................................................................................. 1
Single-Supply Operation ..............................................................4
Enhanced Product Features ............................................................ 1
Absolute Maximum Ratings ............................................................6
Applications ....................................................................................... 1
ESD Caution...................................................................................6
Functional Block Diagram .............................................................. 1
Pin Configuration and Function Descriptions..............................7
General Description ......................................................................... 1
Typical Performance Characteristics ..............................................8
Product Highlights ........................................................................... 1
Test Circuits..................................................................................... 10
Revision History ............................................................................... 2
Outline Dimensions ....................................................................... 12
Specifications..................................................................................... 3
Ordering Guide .......................................................................... 12
Dual-Supply Operation ............................................................... 3
REVISION HISTORY
6/2016—Revision 0: Initial Revision
Rev. 0 | Page 2 of 12
Enhanced Product
ADG613-EP
SPECIFICATIONS
DUAL-SUPPLY OPERATION
VDD = 5 V ± 10%, VSS = −5 V ± 10%, GND = 0 V, unless otherwise noted. VS is the source voltage. VD is the drain voltage.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match Between Channels, ΔRON
On-Resistance Flatness, RFLAT(ON)
LEAKAGE CURRENTS
Source Off Leakage, IS(OFF)
Drain Off Leakage, ID(OFF)
Channel On Leakage, ID(ON), IS(ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
25°C
85
115
2
4
25
40
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
−55°C to +125°C
Unit
VSS to VDD
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
160
6.5
60
±2
±2
±6
2.4
0.8
Delay from Digital Control Input and Output
Switching Off, tOFF
Break-Before-Make Time Delay, tBBM
2
45
ns typ
RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
0.005
90
ns max
ns typ
RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
40
15
50
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18
RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20
RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21
RL = 50 Ω, CL = 5 pF; see Figure 22
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = +5.5 V, VSS = −5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
−0.5
−65
−90
680
5
5
5
0.001
1.0
Negative Supply Current, ISS
0.001
1.0
±2.7
±5.5
VDD/VSS
Power Consumption
1
VIN = VINL or VINH
VIN = VINL or VINH
65
25
10
Charge Injection
Off Isolation
Channel to Channel Crosstalk
−3 dB Bandwidth
Off Switch Source Capacitance, CS(OFF)
Off Switch Drain Capacitance, CD(OFF)
On Switch Capacitance, CD(ON), CS(ON)
POWER REQUIREMENTS
Positive Supply Current, IDD
VS = ±3 V, IS = −1 mA; see Figure 14
VS = ±3 V, IS = −1 mA; see Figure 14
VS = ±3 V, IS = −1 mA
VS = ±3 V, IS = −1 mA
VS = ±3 V, IS = −1 mA
VS = ±3 V, IS = −1 mA
VDD = +5.5 V, VSS = −5.5 V
VD = ±4.5 V, VS = +4.5 V; see Figure 15
VD = ±4.5 V, VS = +4.5 V; see Figure 15
VD = ±4.5 V, VS = +4.5 V; see Figure 15
VD = ±4.5 V, VS = +4.5 V; see Figure 15
VD = VS = ±4.5 V; see Figure 16
VD = VS = ±4.5 V; see Figure 16
V min
V max
μA typ
μA max
pF typ
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
Delay from Digital Control Input and Output
Switching On, tON
nA typ
nA max
nA typ
nA max
nA typ
nA max
Test Conditions/Comments
11
11
Guaranteed by design; not subject to production test.
Rev. 0 | Page 3 of 12
μA typ
μA max
μA typ
μA max
V min
V max
nW typ
µW max
ADG613-EP
Enhanced Product
SINGLE-SUPPLY OPERATION
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. VS is the source voltage. VD is the drain voltage.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
On-Resistance Match
Between Channels, ΔRON
LEAKAGE CURRENTS
Source Off Leakage, IS(OFF)
Drain Off Leakage, ID(OFF)
Channel On Leakage, ID(ON), IS(ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
25°C
−55°C to +125°C
Unit
Test Conditions/Comments
0 to VDD
V
Ω typ
Ω max
Ω typ
VS = 3.5 V, IS = −1 mA; see Figure 14
VS = 3.5 V, IS = −1 mA; see Figure 14
VS = 3.5 V, IS = −1 mA
210
290
3
380
10
13
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
±2
nA typ
nA max
nA typ
nA max
VS = 3.5 V, IS = −1 mA
VDD = 5.5 V
VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15
VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15
VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15
VS = 1 V or 4.5 V, VD = 4.5 V or 1 V; see Figure 15
±6
nA typ
nA max
VS = VD = 1 V or 4.5 V; see Figure 16
VS = VD = 1 V or 4.5 V; see Figure 16
±2
2.4
0.8
0.005
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
tOFF
Break-Before-Make Time Delay, tBBM
2
70
100
25
40
25
150
50
10
Charge Injection
Off Isolation
Channel to Channel Crosstalk
−3 dB Bandwidth
CS(OFF)
CD(OFF)
CD(ON), CS(ON)
POWER REQUIREMENTS
IDD
1
−62
−90
680
5
5
5
0.001
1.0
2.7
5.5
VDD
Power Consumption
1
5.5
5.5
Ω max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
V min
V max
nW typ
µW max
Guaranteed by design; not subject to production test.
Rev. 0 | Page 4 of 12
VIN = VINL or VINH
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS = 3.0 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18
RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 3.0 V; see Figure 18
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20
RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21
RL = 50 Ω, CL = 5 pF; see Figure 22
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = 5.5 V
Digital inputs = 0 V or 5.5 V
Digital inputs = 0 V or 5.5 V
Enhanced Product
ADG613-EP
VDD = 3 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. VS is the source voltage. VD is the drain voltage.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance, RON
LEAKAGE CURRENTS
Source Off Leakage, IS(OFF)
Drain Off Leakage, ID(OFF)
Channel On Leakage, ID(ON), IS(ON)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
25°C
−55°C to +125°C
Unit
380
0 to VDD
460
V
Ω typ
±0.01
±0.1
±0.01
±0.1
±0.01
±0.1
±2
±2
±6
2.0
0.8
0.005
±0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
tOFF
Break-Before-Make Time Delay, tBBM
2
130
185
40
55
50
260
65
10
Charge Injection
Off Isolation
Channel to Channel Crosstalk
−3 dB Bandwidth
CS(OFF)
CD(OFF)
CD(ON), CS(ON)
POWER REQUIREMENTS
IDD
1.5
−62
−90
680
5
5
5
0.001
1.0
2.7
5.5
VDD
Power Consumption
1
3.3
3.3
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
V min
V max
nW typ
µW max
Guaranteed by design; not subject to production test.
Rev. 0 | Page 5 of 12
Test Conditions/Comments
VS = 1.5 V, IS = −1 mA; see Figure 14
VDD = 3.3 V
VS = 1 V or 3 V, VD = 3 V or 1 V; see Figure 15
VS = 1 V or 3 V, VD = 3 V or 1 V; see Figure 15
VS = 1 V or 3 V, VD = 3 V or 1 V; see Figure 15
VS = 1 V or 3 V, VD = 3 V or 1 V; see Figure 15
VS = VD = 1 V or 3 V; see Figure 16
VS = VD = 1 V or 3 V; see Figure 16
VIN = VINL or VINH
VIN = VINL or VINH
RL = 300 Ω, CL = 35 pF, VS = 2 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS = 2 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS = 2 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS = 2 V; see Figure 17
RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 2 V; see Figure 18
RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 2 V; see Figure 18
VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 19
RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 20
RL = 50 Ω, CL = 5 pF, f = 10 MHz; see Figure 21
RL = 50 Ω, CL = 5 pF; see Figure 22
f = 1 MHz
f = 1 MHz
f = 1 MHz
VDD = 3.3 V
Digital inputs = 0 V or 3.3 V
Digital inputs = 0 V or 3.3 V
ADG613-EP
Enhanced Product
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted
Table 4.
Parameter
VDD to VSS1
VDD to GND1
VSS to GND1
Analog Inputs2
Digital Inputs2
Peak Current, Sx or Dx
Continuous Current, Sx or Dx
3 V Operation, 85°C to 125°C
Operating Temperature Range
Storage Temperature Range
Junction Temperature
θJA Thermal Impedance
16-Lead TSSOP
Lead Soldering
Lead Temperature, Soldering
(10 sec)
IR Reflow, Peak Temperature
(<20 sec)
Pb-Free Soldering
Reflow, Peak Temperature
Time at Peak Temperature
1
2
Rating
13 V
−0.3 V to +6.5 V
+0.3 V to −6.5 V
VSS − 0.3 V to VDD + 0.3 V
GND − 0.3 V to VDD + 0.3 V or
30 mA, whichever occurs first
20 mA (pulsed at 1 ms, 10%
duty cycle maximum)
10 mA
7.5 mA
−55°C to +125°C
−65°C to +150°C
150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Only one absolute maximum rating can be applied at any one time.
ESD CAUTION
150.4°C/W
300°C
220°C
260 (+0/−5)°C
20 sec to 40 sec
Tested at −55°C to +125°C.
Overvoltages at INx, Sx, or Dx are clamped by internal diodes. Limit the
current to the maximum ratings given. Tested at −55°C to +125°C.
Rev. 0 | Page 6 of 12
Enhanced Product
ADG613-EP
IN1 1
16
IN2
D1 2
15
D2
S1 3
14
S2
ADG613-EP
VSS 4
GND 5
TOP VIEW
(Not to Scale)
13
VDD
12
NIC
S4 6
11
S3
D4 7
10
D3
IN4 8
9
IN3
NIC = NOT INTERNALLY CONNECTED
14533-002
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
IN1
D1
S1
VSS
GND
S4
D4
IN4
IN3
D3
S3
NIC
VDD
S2
D2
IN2
Description
Switch 1 Digital Control Input.
Drain Terminal of Switch 1. This pin can be an input or output.
Source Terminal of Switch 1. This pin can be an input or output.
Most Negative Power Supply Terminal. Tie this pin to GND when using the device with single-supply voltages.
Ground (0 V) Reference.
Source Terminal of Switch 4. This pin can be an input or output.
Drain Terminal of Switch 4. This pin can be an input or output.
Switch 4 Digital Control Input.
Switch 3 Digital Control Input.
Drain Terminal of Switch 3. This pin can be an input or output.
Source Terminal of Switch 3. This pin can be an input or output.
Not Internally Connected.
Most Positive Power Supply Terminal.
Source Terminal of Switch 2. This pin can be an input or output.
Drain Terminal of Switch 2. This pin can be an input or output.
Switch 2 Digital Control Input.
Table 6. Truth Table
Logic
0
1
S1 and S4
Off
On
S2 and S3
On
Off
Rev. 0 | Page 7 of 12
ADG613-EP
Enhanced Product
TYPICAL PERFORMANCE CHARACTERISTICS
250
600
TA = 25°C
VDD = +5V
VSS = 0V
500
±3.3V
ON RESISTANCE (Ω)
ON RESISTANCE (Ω)
200
150
±4.5V
±3.0V
±2.7V
100
400
+125°C
300
+85°C
+25°C
200
±5.5V
50
100
±5.0V
–2
–1
0
1
2
3
4
5
VD, VS (V)
0
1
IS(OFF)
LEAKAGE CURRENT (nA)
VDD = 3.0V
VDD = 3.3V
300
VDD = 4.5V
200
100
VDD = 5.0V
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
–1
ID(OFF)
–2
IS(ON), ID(ON)
–3
–4
–5
0
0
0
4.5
5.0
VD, VS (V)
–6
0
20
40
60
80
100
120
TEMPERATURE (°C)
14533-007
400
14533-004
ON RESISTANCE (Ω)
5
4
VDD = +5V
VSS = –5V
VDD = 2.7V
500
3
Figure 6. On Resistance vs. VD, VS for Various Temperatures, Single Supply
2
TA = 25°C
VSS = 0V
2
VD, VS (V)
Figure 3. On Resistance vs. VD, VS; Dual Supplies
600
1
0
14533-006
–3
–4
14533-003
0
–5
–40°C
–55°C
Figure 7. Leakage Current vs. Temperature, Dual Supplies
Figure 4. On Resistance vs. VD, VS; Single Supply
250
2
VDD = +5V
VSS = –5V
VDD = 5V
VSS = 0V
1
IS(OFF)
LEAKAGE CURRENT (nA)
+125°C
150
+85°C
+25°C
100
50
–1
ID(OFF)
–2
–3
IS(ON), ID(ON)
–4
–55°C
–5
–40°C
–4
–3
–2
–1
0
VD, VS (V)
1
2
3
4
5
–6
14533-005
0
–5
0
0
20
40
60
80
100
120
TEMPERATURE (°C)
Figure 5. On Resistance vs. VD, VS for Various Temperatures, Dual Supplies
Rev. 0 | Page 8 of 12
Figure 8. Leakage Current vs. Temperature, Single Supply
14533-008
ON RESISTANCE (Ω)
200
Enhanced Product
2.0
ADG613-EP
0
VDD = +3V
VSS = 0V
TA = 25°C
1.5
VDD = –5V
VSS = +5V
–10 T = 25°C
A
–20
VDD = +5V
VSS = 0V
0.5
0
–0.5
VDD = +5V
VSS = –5V
–1.0
–30
–40
–50
–60
–70
–1.5
–3
–1
–2
2
1
0
4
3
5
VS (V)
–90
0.3
14533-009
–4
0
–10
100
1k
VDD = +5V
VSS = –5V
TA = 25°C
–20
tON
VDD = +5V
VSS = 0V
CROSSTALK (dB)
TIME (ns)
100
Figure 12. Off Isolation vs. Frequency
120
tON
VDD = +5V
VSS = –5V
60
tOFF
40
VDD = +5V
VSS = 0V
–30
–40
–50
–60
–70
–80
20
tOFF
VDD = +5V
VSS = –5V
–35
–15
5
25
45
65
85
105
–90
125
TEMPERATURE (°C)
–100
0.3
14533-010
0
–55
0
VDD = –5V
VSS = +5V
–4
VDD = +5V
VSS = 0V
–6
–8
–10
–12
–14
1
10
100
FREQUENCY (MHz)
1k
14533-011
–16
–18
0.3
10
100
Figure 13. Crosstalk vs. Frequency
TA = 25°C
–2
1
FREQUENCY (MHz)
Figure 10. tON/tOFF Times vs. Temperature
ON RESPONSE (dB)
10
FREQUENCY (MHz)
Figure 9. Charge Injection (QINJ) vs. Source Voltage (VS)
80
1
14533-012
–80
–2.0
–5
Figure 11. On Response vs. Frequency
Rev. 0 | Page 9 of 12
1k
14533-013
QINJ (pC)
OFF ISOLATION (dB)
1.0
ADG613-EP
Enhanced Product
TEST CIRCUITS
ID(OFF)
IS(OFF)
Sx
A
Dx
A
VS
VD
14533-015
IDS
Figure 15. Off Leakage
V1
ID(ON)
Dx
NC
14533-014
RON = V1/IDS
VS
Sx
Dx
A
VD
NC = NO CONNECT
14533-016
Sx
Figure 16. On Leakage
Figure 14. On Resistance
VDD
VSS
0.1µF
0.1µF
VIN2, VIN3
VDD
Sx
VS
50%
50%
50%
50%
VSS
VOUT
Dx
RL
300Ω
INx
CL
35pF
VIN1, VIN4
90%
90%
GND
tON
tOFF
14533-017
VOUT
Figure 17. Switching Times
VSS
VIN
0.1µF
50%
0V
VDD
VSS
VS1
S1
D1
VS2
S2
D2
IN1,
IN2
RL2
300Ω
CL2
35pF
CL1
35pF
0V
90%
VOUT2
ADG613-EP
90%
90%
VOUT1
90%
0V
GND
tBBM
tBBM
Figure 18. Break-Before-Make Time Delay
RS
VDD
VSS
VDD
VSS
Sx
Dx
VIN2, VIN3
VOUT
ON
CL
1nF
VS
INx
GND
OFF
VIN1, VIN4
VOUT
Figure 19. Charge Injection
Rev. 0 | Page 10 of 12
QINJ = CL × ΔVOUT
ΔVOUT
14533-019
VIN
RL1
300Ω
VOUT2
VOUT1
50%
14533-018
VDD
0.1µF
Enhanced Product
ADG613-EP
VSS
VDD
0.1µF
NETWORK
ANALYZER
VSS
VDD
Sx
NETWORK
ANALYZER
VSS
Sx
50Ω
INx
VS
Dx
VS
Dx
RL
50Ω
GND
VOUT
VIN
OFF ISOLATION = 20 log
VOUT
VS
INSERTION LOSS = 20 log
Figure 20. Off Isolation
0.1µF
VDD
VSS
50Ω
Dx
Sx
VIN1
VS
VIN2
GND
RL
50Ω
CHANNEL-TO-CHANNEL CROSSTALK = 20 log |VS/VOUT|
VOUT
14533-021
Dx
Sx
Figure 21. Channel-to-Channel Crosstalk
Rev. 0 | Page 11 of 12
VOUT
VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Figure 22. Bandwidth
VSS
VDD
0.1µF
RL
50Ω
GND
14533-020
VIN
NIC
0.1µF
VDD
50Ω
50Ω
INx
VSS
0.1µF
14533-022
VDD
0.1µF
ADG613-EP
Enhanced Product
OUTLINE DIMENSIONS
5.10
5.00
4.90
16
9
4.50
4.40
4.30
6.40
BSC
8
1
PIN 1
1.20
MAX
0.15
0.05
0.20
0.09
0.30
0.19
0.65
BSC
COPLANARITY
0.10
SEATING
PLANE
8°
0°
0.75
0.60
0.45
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 23. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADG613SRUZ-EP
ADG613SRUZ-EP-RL7
1
Temperature Range
−55°C to +125°C
−55°C to +125°C
Package Description
16-Lead Thin Shrink Small Outline Package [TSSOP]
16-Lead Thin Shrink Small Outline Package [TSSOP]
Z = RoHS Compliant Part.
©2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14533-0-6/16(0)
Rev. 0 | Page 12 of 12
Package Option
RU-16
RU-16
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