NAND Flash Module Preliminary 29F32G08 FEATURES: NAND Flash Interface Single Level Cell (SLC) Technology ONFI 2.2 Compliant Operating Voltage VCC 3.0 - 3.6V VCCQ 1.7 - 1.95V or 3.0-3.6V High density 32Gbit per FLASH NAND die Supports higher speed designs with less capacitance/fewer I/O's to drive Page Size 8640 bytes (8192 + 448 spare bytes) Supports external BCH correction algorithms (16 bit correction per 540 bytes) Features High reliability data storage for demanding space applications Ceramic hermetic package with built-in TID shielding Class E, I, B or S Speed Can be used in asynch or synch mode Asynch: Up to asynch timing mode 5 (50MT/sec) Synch: Up to synchronous timing mode 5 (200MT/sec) Temperature Range -55⁰C to 125⁰C Endurance 60,000 cycles June 2015 Maxwell Technologies Preliminary NAND Flash 32Gb X 08 Supported Features ONFI 1.0, 2.0, 2.1, 2.2 Interleaved (multi-plane) operations Multiple LUN operations Small Data Move Interleaved Address restrictions for cache operations No interleaved block address restrictions Overlapped/concurrent interleaving supported Supports timing modes: 0 thru 5 Supports driver strength settings: underdrive, overdrive 1 and 2 Supported Commands: Reset Synchronous Reset Reset LUN Get Features Set Features Read Status Read Status Enchanced Change Row Address Read Mode Read Page Interleaved Read Page Cache Sequential Read Page Cache Random Read Page Cache Last Program Page Program Page Interleaved Program Page Cache Erase Block Erase Block Interleaved Copyback Read Copyback Program Copyback Program Interleaved Read Unique ID Read Parameter Page Read ID Not Supported Odd to Even Page Copyback Non-sequential page programming 16 bit data bus width per Target/LUN Extended ECC Synchronous Mode: clock stopped for data input June 2015 Maxwell Technologies Preliminary NAND Flash 32Gb X 08 Array Organization Cycle First Second Third Fourth Fifth DQ7 CA7 L BA7 BA15 L DQ6 CA6 L PA6 BA14 L DQ5 CA5 CA13 PA5 BA13 L DQ4 CA4 CA12 PA4 BA12 L DQ3 CA3 CA11 PA3 BA11 LUN DQ2 CA2 CA10 PA2 BA10 BA18 DQ1 CA1 CA9 PA1 BA9 BA17 DQ0 CA0 CA8 PA0 BA8 BA16 CA[n] = Column Address PA[n] = Page Address BA[n] = Bank Address LUN = Logical Unit Address Row Address = LUN, Bank, Page Address BA[7] = Plane select Column Addresses above 8639 are invalid (page size = 8192 + 448) Memory Organizatoin Bytes per page: 8192 Spare ECC bytes per page: 448 Pages per block: 128 Blocks per LUN: 4096 LUNs per chip enable: 2; 64G16 is 1 LUN per chip enable Column address cycles: 2 Row address cycles: 3 Bits per cell: 1 Bad blocks maximum per LUN: 80 Block endurance: 60,000 Programs per page: 4 Number of bits ECC required: 8 (for 512 Bytes) Number of interleave address bits: 1 June 2015 Maxwell Technologies Preliminary NAND Flash 32Gb X 08 Package Organization Sync Async CE# CLE ALE CLK W/R# DQ[7-0] DQS WP# CE# CLE ALE WE# RE# DQ[7-0] N/A WP# 29F32G08 Package Target-1 LUN 1 R/B# Architecture Independent 8 bit buses per package: 1 Targets per 8 bit bus: 1 LUNS per Target: 1 (1 die per 8 bit bus) (1 die per package) June 2015 Maxwell Technologies Preliminary NAND Flash June 2015 32Gb X 08 Maxwell Technologies Preliminary NAND Flash 32Gb X 08 Pinout 32G08 Pin Description VSS VCC WP# WE#/CLK ALE CLE NC CE RE#/WR# RB# VSS VCC VSS VSSQ VCCQ DQ7 DQ6 DQ5 DQ4 VSSQ VCCQ VCC VSS DQS VCCQ VSSQ DQ3 DQ2 DQ1 DQ0 VCCQ VSSQ VSS VCC Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Pin # 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 32G08 Pin Description VSS NC NC NC NC NC NC NC NC NC VSS NC VSS NC NC NC NC NC NC NC NC NC VSS NC NC NC NC NC NC NC NC NC VSS NC 1. NC = Not internally connected June 2015 Maxwell Technologies Preliminary NAND Flash 32Gb X 08 Product Ordering Options 29F 32 G 8 RP F X Screening Flow S = Maxwell Class S B = Maxwell Class B I = Industrial (testing @ -55⁰C, +25⁰C +125⁰C ) E = Engineering (testing at +25⁰C ) Package F = Flat Pack Radiation Feature RP = RAD -PAK® Package Shielding Data Width 08 = 08 bits wide Total Gbits 32 = 32Gb Base Product 3.3V by 08 NAND FLASH SLC Nomenclature June 2015 Maxwell Technologies Preliminary