79LV0832 - EEPROM, 8 Mb (256kb x 32)

79LV0832
8 Megabit (256K x 32-Bit)
Low Voltage EEPROM MCM
DESCRIPTION:
• 256k x 32-bit EEPROM MCM
• RAD-PAK® radiation-hardened against natural
space radiation
• Total dose hardness:
- >100 krad (Si) - Dependent upon orbit
• Excellent Single event effects @ 25°C
- SEL > 120 MeV cm2/mg (Device)
- SEU > 85 MeV cm2/mg(Memory Cells)
- SEU > 18 MeV cm2/mg (Write Mode)
- SET > 40 MeV cm2/mg (Read Mode)
• High endurance
- 10,000 cycles/dword, 10 year data retention
• Page Write Mode: 2 X 128 dword page
• High Speed:
- 200 and 250 ns maximum access times
• Automatic programming
- 15 ms automatic Page/dword write
Maxwell Technologies’ 79LV0832 multi-chip module (MCM)
memory features a greater than 100 krad (Si) total dose tolerance, dependent upon orbit. Using Maxwell Technologies’ patented radiation-hardened RAD-PAK® MCM packaging
technology, the 79LV0832 is the first radiation-hardened 8
megabit MCM EEPROM for space application. The 79LV0832
uses eight 1 Megabit high speed CMOS die to yield an 8
megabit product. The 79LV0832 is capable of in-system electrical dword and page programmability. It has a 128 x 32 byte
page programming function to make its erase and write operations faster. It also features Data Polling and a Ready/Busy
signal to indicate the completion of erase and programming
operations. In the 79LV0832, hardware data protection is provided with the RES pin. Software data protection is implemented using the JEDEC standard algorithm.
Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, RAD-PAK®‘ provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to MAxwell Technologies’ self-defined Class
K.
12.02.15 Rev 15
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
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Memory
FEATURES:
79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
Memory
TABLE 1. 79LV0832 PINOUT DESCRIPTION
PIN
SYMBOL
DESCRIPTION
84-77, 29-37
ADDR0 to ADDR16
48-55, 66-73, 96,
1-7, 18-25
I/O0 to I/O31
61
OE
41, 43
CE0-1
45
WE
Write Enable
10, 17, 28, 40, 44,
58, 65, 76, 87, 93
3.3V
Power Supply
8, 9, 11-16, 26, 27,
38, 42, 46, 56, 57,
59, 60, 62-64, 74,
75, 85, 86, 88-92,
94, 95
GND
Ground
39
RDY/BUSY
47
RES
Address Input
Data Input/Output
Output Enable
Chip Enable 0 through 1
Ready/Busy
Reset
12.02.15 Rev 15
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79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 2. 79LV0832 ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Supply Voltage
VCC
-0.6
7.0
V
Input Voltage
VIN
-0.51
7.0
V
Package Weight
RP
45
RT
38
Thermal Impedance (RP and RT Packages; XP TBD)
FJC
3
Operating Temperature Range
TOPR
-55
125
°C
Storage Temperature Range
TSTG
-65
150
°C
Grams
°C/W
1. VIN min = -3.0V for pulse width <50ns.
TABLE 3. 79LV0832 RECOMMENDED DC OPERATING CONDITIONS
SYMBOL
MIN
MAX
UNIT
VCC
3.0
3.6
V
VIL
VIH
VH
-0.31
2.2
VCC-0.5
0.8
VCC +0.3
VCC +1
V
V
V
TOPR
-55
125
°C
Supply Voltage
Input Voltage
RES_PIN
Operating Temperature Range
Memory
PARAMETER
1. VIL min = -1.0V for pulse width < 50 ns
TABLE 4. DELTA LIMITS1
PARAMETER
VARIATION2
ICC1A
+/- 10 %
ICC2A
+/- 10 %
ICC2C
+/- 10 %
ILI - ADDR, CE, OE, WE
+/- 10 %
ILo - D0 - D31
+/- 10 %
1. Delta limits are calculated from test data taken at preburn-in and post burn-in as defined in
MIL-STD-883
2. Specified value in Table 6
12.02.15 Rev 15
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79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 5. 79LV0832 CAPACITANCE
(TA = 25 °C, f = 1 MHz)
PARAMETER
Input Capacitance: VIN = 0V1
Output Capacitance: VOUT = 0V1
SYMBOL
MIN
MAX
UNIT
CIN
--
6
pF
CIN OE
--
6
CIN WE
--
6
CIN CE0-1
--
6
CIN A0-A16
--
6
CIN RES
--
48
COut RDY/BSY
--
6
CO ut D0-D31
--
12
pF
1. Guaranteed by design.
TABLE 6. 79LV0832 DC ELECTRICAL CHARACTERISTICS
(VCC = 3.3V ±10%, TA = -55 TO +125°C)
TEST CONDITION
SYMBOL
SUBGROUPS
MIN
MAX
UNITS
ILI
1, 2, 3
--
42
µA
VIN=VIH
7202
µA
VIN=0V
7202
µA
4
µA
Input Leakage Current1 VIN = VCC
A0-A16, CE,WE, OE
Input Leakage Current
D0-D31
VIN=VCC
ILI
1, 2, 3
ILO
1, 2, 3
--
4
µA
CE = ADDR=WE=OE =VCC
ICC1A
1, 2, 3
--
80
µA
CE = ADDR=WE=OE =VIH
ICC1B
--
15
mA
CE = VIH; ADDR=WE=OE =0V
ICC1C
--
15
mA
OE = 0V; ADDR=WE=VCC
IOUT = 0mA, CE Duty = 100%,
Cycle = 1 us at VCC = 3.6V
ICC2A
1, 2, 3
24
mA
OE =ADDR=WE=0V
IOUT = 0mA, CE Duty = 100%,
Cycle = 1 us at VCC = 3.6V
ICC2B
1, 2, 3
40
mA
OE = 0V; ADDR=WE=VCC
IOUT = 0mA, CE Duty = 100%,
Cycle = 200 ns at VCC =3.6V
ICC2C
1, 2, 3
60
mA
OE =ADDR=WE=0V
IOUT = 0mA, CE Duty = 100%,
Cycle = 200 ns at VCC = 3.6V
ICC2D
1, 2, 3
100
mA
VIL
VIH
1, 2, 3
0.8
V
Output Leakage Current (VCC = 3.6V, VOUT = 3.6V/0.4V)
Standby VCC
Current1
Operating
VCC Current1,3
Input Voltage
VH
RES_PIN
12.02.15 Rev 15
--
--
Memory
PARAMETER
2.2
VCC -0.5
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79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 6. 79LV0832 DC ELECTRICAL CHARACTERISTICS
(VCC = 3.3V ±10%, TA = -55 TO +125°C)
PARAMETER
TEST CONDITION
SYMBOL
SUBGROUPS
MIN
MAX
UNITS
1, 2, 3
--
0.4
0.4
---
V
V
V
V
V
VOL
Data Lines: VCCMin, IOL = 2.1mA
RDY/BSY_Line: VCC Min, IOL = 12mA
VOL
Data Lines: VCC Min, IOH = -400µA
VOH
RDY/BSY_Line: VCC Min, IOH = -12mA
VOH
All Outputs: VCCMin, IOH=-100uA
1. All Inputs are tied to Vcc with a 5.5KW resistor, except for RES which is 30KW.
Output Voltage
2.4
2.4
VCC-0.3V
2. For RES ILI=800uA max.
3. Only one CE active (low) at a time
TABLE 7. 79LV0832 AC ELECTRICAL CHARACTERISTICS FOR READ OPERATION 1
(VCC = 3.3V ±10%, TA = -55 TO +125°C)
PARAMETER
SUBGROUPS
Address Access Time CE = OE = VIL, WE = VIH
-200
-250
tACC
9, 10, 11
Chip Enable Access Time OE = VIL, WE = VIH
-200
-250
tCE
9, 10, 11
Output Enable Access TIme CE = VIL, WE = VIH
-200
-250
tOE
9, 10, 11
Output Hold to Address Change CE = OE =VIL, WE = VIH
-200
-250
tOH
9, 10, 11
Output Disable to High-Z 2
CE = VIL, WE = VIH
-200
-250
CE = OE = VIL, WE = VIH
-200
-250
RES to Output Delay CE = OE = VIL, WE = VIH3
-200
-250
MIN
MAX
---
200
250
---
200
250
0
0
110
120
0
0
---
0
0
50
50
0
0
300
350
0
0
525
550
UNIT
ns
Memory
SYMBOL
ns
ns
ns
9, 10, 11
ns
tDF
ns
tDFR
TRR
9, 10, 11
ns
1. Test conditions: input pulse levels = 0.4V to 2.2V; input rise and fall times < 20 ns; output load = 1 TTL gate + 100 pF (including
scope and jig); reference levels for measuring timing = 0.8 V/1.8 V.
2. tDF and tDFR are defined as the time at which the output becomes an open circuit and data is no longer driven.
3. Guaranteed by design.
12.02.15 Rev 15
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79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 8. 79LV0832 AC ELECTRICAL CHARACTERISTICS
PAGE/DWORD ERASE AND PAGE/DWORD WRITE OPERATION
(VCC = 3.3V ±10%, TA = -55 TO +125°C)
PARAMETER
SYMBOL
SUBGROUPS
Address Setup Time
-200
-250
tAS
9, 10, 11
Chip Enable to Write Setup Time (WE controlled)
-200
-250
tCS
9, 10, 11
MAX
0
0
---
0
0
---
200
250
---
200
250
---
200
250
---
150
200
---
10
10
---
0
0
---
0
0
---
0
0
---
0
0
---
0
0
---
---
15
15
UNITS
ns
ns
9, 10, 11
ns
tCW
ns
tWP
Address Hold Time
-200
-250
tAH
9, 10, 11
Data Setup Time
-200
-250
tDS
9, 10, 11
Data Hold Time
-200
-250
tDH
9, 10, 11
Chip Enable Hold Time (WE controlled)
-200
-250
tCH
9, 10, 11
Write Enable to Write Setup Time (CE controlled)
-200
-250
tWS
9, 10, 11
Write Enable Hold Time (CE controlled)
-200
-250
tWH
9, 10, 11
Output Enable to Write Setup Time
-200
-250
tOES
9, 10, 11
Output Enable Hold Time
-200
-250
tOEH
9, 10, 11
Write Cycle Time 2
-200
-250
tWC
9, 10, 11
12.02.15 Rev 15
Memory
Write Pulse Width
CE controlled
-200
-250
WE controlled
-200
-250
MIN 1
ns
ns
ns
ns
ns
ns
ns
ns
ms
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79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 8. 79LV0832 AC ELECTRICAL CHARACTERISTICS
PAGE/DWORD ERASE AND PAGE/DWORD WRITE OPERATION
(VCC = 3.3V ±10%, TA = -55 TO +125°C)
PARAMETER
SUBGROUPS
Data Latch Time
-200
-250
tDL
9, 10, 11
Byte Load Window
-200
-250
tBL
9, 10, 11
Byte Load Cycle
-200
-250
tBLC
9, 10, 11
Time to Device Busy
-200
-250
tDB
9, 10, 11
Write Start Time 3
-200
-250
tDW
9, 10, 11
RES to Write Setup Time4
-200
-250
tRP
9, 10, 11
VCC to RES Setup Time4
-200
-250
tRES
9, 10, 11
MIN 1
MAX
700
750
---
100
200
---
1
1
30
30
100
120
---
250
250
---
100
100
---
1
1
---
UNITS
ns
µs
µs
ns
Memory
SYMBOL
ns
µs
µs
1. Use this device in a longer cycle than this value.
2. tWC must be longer than this value unless polling techniques or RDY/BUSY are used. This device automatically completes the
internal write operation within this value.
3. Next read or write operation can be initiated after tDW if polling techniques or RDY/BUSY are used.
4. Guaranteed by desgin.
12.02.15 Rev 15
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79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
TABLE 9. 79LV0832 MODE SELECTION 1, 2
PARAMETER
CE 3
OE
WE
I/O
RES
RDY/BUSY
Read
VIL
VIL
VIH
DOUT
VH
VOH
Standby
VIH
X
X
High-Z
X
VOH
Write
VIL
VIH
VIL
DIN
VH
VOH --> VOL
Deselect
VIL
VIH
VIH
High-Z
VH
VOH
Write Inhibit
X
X
VIH
--
X
--
X
VIL
X
--
X
--
Data Polling
VIL
VIL
VIH
Data Out (I/O7)
VH
VOL
Program Reset
X
X
X
High-Z
VIL
VOH
1. X = Don’t care.
2. Refer to the recommended DC operating conditions.
3. For CE0-1 only one CE can be enabled (Low) at a time.
Memory
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Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
FIGURE 1. READ TIMING WAVEFORM
High
Memory
FIGURE 2. DWORD WRITE TIMING WAVEFORM (1) (WE CONTROLLED)
12.02.15 Rev 15
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Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
FIGURE 3. DWORD WRITE TIMING WAVEFORM (2) (CE CONTROLLED)
Memory
FIGURE 4. PAGE WRITE TIMING WAVEFORM (1) (WE CONTROLLED)
12.02.15 Rev 15
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Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
FIGURE 5. PAGE WRITE TIMING WAVEFORM (2) (CE CONTROLLED)1,2
Memory
1) A7-A16 ARE PAGE ADDRESSES AND MUST BE THE SAME WITHIN A PAGE WRITE OPERATION
2) REFER TO TABLE 7 AND 8 FOR TIMING CHARACTERISTICS
FIGURE 6. DATA POLLING TIMING WAVEFORM1
I/O7, 15, 23, 31
1) REFER TO TABLE 7 AND 8 FOR TIMING CHARACTORISTICS
12.02.15 Rev 15
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Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
FIGURE 7. SOFTWARE DATA PROTECTION TIMING WAVEFORM (1) (IN PROTECTION MODE)1
1)REPEAT THE DATA PATTERN IN EACH OF THE FOUR BYTES.
Memory
FIGURE 8. SOFTWARE DATA PROTECTION WAVEFORM (2) (IN NON-PROTECTION MODE)1
1) REPEAT THE DATA PATTERN IN EACH OF THE FOUR BYTES.
EEPROM APPLICATION NOTES
This application note describes the programming procedures for the EEPROM modules and with details of various
techniques to preserve data integrity.
Automatic Page Write
Page-mode write feature allows 1 to 128 dwords of data to be written into the EEPROM in a single write cycle. Loading
the first dword of data, the data load window opens 30µs for the second dword. In the same manner each additional
dword of data can be loaded within 30µs of the preceding falling edge of either WE or CE. When CE and WE are kept
12.02.15 Rev 15
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Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
high for 100µs after data input, the EEPROM enters the write mode automatically and the data input is written into the
EEPROM.
WE, CE Pin Operation
During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the rising edge of
WE or CE.
Data Polling
Data Polling function allows the status of the EEPROM to be determined. If EEPROM is set to read mode during a
write cycle, an inversion of the last dword of data to be loaded outputs from I/O 7, 15, 23, 31 to indicate that the
EEPROM is performing a write operation.
RDY/Busy Signal
RDY/Busy signal also allows a comparison operation to determine the status of the EEPROM. The RDY/Busy signal
goes low (VOL) after the first write signal. At the end of the write cycle, the RDY/Busy returns to a high state ( VOH).
RES Signal
Data Protection
To protect the data during operation and power on/off, the EEPROM has the internal functions described below.
1. Data Protection at VCC on/off
When VCC is turned on or off, noise on the control pins generated by external circuits, such as CPUs, may turn the EEPROM to
programming mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in an unprogrammable
state during VCC on/off by using a CPU reset signal to RES pin.
12.02.15 Rev 15
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Memory
When RES is LOW (VL), the EEPROM cannot be read or programmed. The EEPROM data must be protected by
keeping RES low when VCC is power on and off. RES should be high (VH) during read and programming operations.
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
Data Protection
To protect the data during operation and power on/off, the EEPROM has the internal functions described below.
1. Data Protection against Noise of Control Pins (CE, OE, WE) during Operation.
During readout or standby, noise on the control pins may act as a trigger and turn the EEPROM to programming mode by mistake. To prevent this phenomenon, the EEPROM has a noise cancellation function that cuts noise if its width is 20ns or less in
programming mode. Be careful not to allow noise of a width of more than 20ns on the control pins.
Memory
2. RES Signal
RES should be kept at VSS level when VCC is turned on or off. The EEPROM breaks off programming operation when RES
become low, programming operation doesn’t finish correctly in case that RES falls low during programming operation. RES
should be kept high for 10 ms after the last data is input
12.02.15 Rev 15
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79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
.
15mS
3. Software Data Protection Enable
.
Software Data Protection Enable Sequence
Address
Data
5555
AA AA AA AA
AAAA or 2AAA
55 55 55 55
5555
A0 A0 A0 A0
4. Writing to the Memory with Software Data Protection Enabled
To write to the device once Software protection is enabled, the enable sequence must precede the data to be written. This
sequence allows the write to occur while at the same time keeping the software protection enabled
Sequence for Writing Data with Software Protection Enabled.
Address
Data
5555
AA AA AA AA
AAAA or 2AAA
55 55 55 55
5555
A0 A0 A0 A0
Write Address(s)
Normal Data Input
12.02.15 Rev 15
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Memory
The 79LV0832 contains a software controlled write protection feature that allows the user to inhibit all write operations to the
device. This is useful in protecting the device from unwanted write cycles due to uncontrollable circuit noise or inadvertent
writes caused by minor bus contentions. Software data protection is enabled by writing the following data sequence to the
EEPROM and allowing the write cycle period (tWC) of 10ms to elapse:
79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
5. Disabling Software Protection
Software data protection mode can be disabled by inputting the following data sequence. Once the software protection sequence has been written, no data can be written to the memory until the write cycle (TWC) has elapsed.
Software Protection Disable Sequence
Address
Data
5555
AA AA AA AA
AAAA or 2AAA
55 55 55 55
5555
80 80 80 80
5555
AA AA AA AA
AAAA or 2AAA
55 55 55 55
5555
20 20 20 20
12.02.15 Rev 15
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16
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Memory
Devices are shipped in the “unprotected” state, meaning that the contents of the memory can be changed as required
by the user. After the software data protection is enabled, the device enters the Protect Mode where no further write
commands have any effect on the memory contents.
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
Memory
96-PIN RAD-PAK® QUAD FLAT PACKAGE
DIMENSION
SYMBOL
MIN
NOM
MAX
A
0.184
0.200
0.216
b
0.010
0.012
0.013
c
--
0.009
0.012
D
1.408
1.420
1.432
D1
1.162
e
0.050
S1
0.129
L
--
2.528
2.543
L1
2.485
2.500
2.505
L2
A1
1.700
0.152
0.165
N
0.178
96
Note: All dimensions in inches
Top and Bottom of the package are internally connected to ground.
12.02.15 Rev 15
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Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
Memory
96 PIN RAD-TOLERANT QUAD FLAT PACKAGE
DIMENSION
SYMBOL
MIN
NOM
MAX
A
0.180
0.195
0.210
b
0.010
0.012
0.014
c
--
0.009
0.012
D
1.408
1.420
1.432
D1
1.162
e
0.050
S1
0.129
F1
1.175
1.180
1.185
L
2.485
2.500
2.505
L2
A1
1.700
0.148
0.160
N
0.0172
96
Note: All dimensions in inches
Top and Bottom of the package are internally connected to ground.
12.02.15 Rev 15
All data sheets are subject to change without notice
18
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Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
79LV0832
Important Notice:
These data sheets are created using the chip manufacturers published specifications. Maxwell Technologies verifies
functionality by testing key parameters either by 100% testing, sample testing or characterization.
The specifications presented within these data sheets represent the latest and most accurate information available to
date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no
responsibility for the use of this information.
Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems
without express written approval from Maxwell Technologies.
Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
Memory
12.02.15 Rev 15
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79LV0832
Low Voltage 8 Megabit (256K x 32-Bit) EEPROM MCM
Product Ordering Options
Model Number
79LV0832
XX
Q
Feature
X
Option Details
-XX
Access Time
20 = 200 ns
25 = 250 ns
Screening Flow
Multi Chip Module (MCM)1
K = Maxwell Self-Defined Class K
H = Maxwell Self-Defined Class H
I = Industrial (Testing @-55C, +25C , +125C)
E = Engineering (Testing @ +25C)
Memory
Package
Q = Quad Flat Pack
Radiation Features2 RP = Rad-Pak® Package
RT = No Radiation Guarentee
Class E and I only
RT1 = 10 krad (Read/Write)
RT2 = 25 krad (Read/Wite)
RT4 = 40 krad (Read/Write)
RT6 = 60 krad (Read/Write)
RT4R = 40 krad (Read); 25 krad (Write)
RT6R = 60 krad (Read), 25 krad (Write)
Base Product
Nomenclature
8 Megabyte (256K x 32-Bit) EEPROM
1) Products are manufacturered and screened to Maxwell Technologies’ self-defined Class H and Class K.
2) The device will meet the specified read mode TID level, at the die level, if it is not written to during irradiation.
Writing to the device during irradiation will reduce the device’s TID tolerance to the specified write mode TID level.
12.02.15 Rev 15
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