RClamp0524J Datasheet

RClamp0524J
RailClamp®
Ultra Low Capacitance TVS Arrays
PROTECTION PRODUCTS - RailClamp®
Description
PRELIMINARY
Features
RailClamps® are ultra low capacitance TVS arrays
designed to protect high speed data interfaces. This
series has been specifically designed to protect sensitive
components which are connected to high-speed data
and transmission lines from overvoltage caused by ESD
(electrostatic discharge), CDE (Cable Discharge Events),
and EFT (electrical fast transients).
The RClampTM0524J has a typical capacitance of only
0.30pF between I/O pins. This allows it to be used on
circuits operating in excess of 3GHz without signal
attenuation. They may be used to meet the ESD
immunity requirements of IEC 61000-4-2,
Level 4 (±15kV air, ±8kV contact discharge). Each
device is designed to protect four lines (two differential
pairs).
The RClamp0524J is in a 8-pin, RoHS/WEEE compliant,
SLP2710P8 package. It measures 2.7 x 1.0 x 0.5mm.
The leads are spaced at a pitch of 0.5mm and are finished with lead-free NiPdAu. They are designed for easy
PCB layout by allowing the traces to run straight through
the device. The combination of small size, low capacitance, and high level of ESD protection makes them a
flexible solution for applications such as HDMI,
DisplayPortTM, MDDI, and eSATA interfaces.
‹ ESD protection for high-speed data lines to
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IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
IEC 61000-4-5 (Lightning) 5A (8/20μs)
IEC 61000-4-4 (EFT) 40A (5/50ns)
Package design optimized for high speed lines
Flow-Through design
Protects four I/O lines
Low capacitance: 0.3pF typical (I/O to I/O)
Low clamping voltage
Low operating voltage: 5V
Solid-state silicon-avalanche technology
Mechanical Characteristics
‹
‹
‹
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SLP2710P8 8-pin package (2.7 x 1.0 x 0.5mm)
RoHS/WEEE Compliant
Lead Pitch: 0.5mm
Lead finish: NiPdAu
Marking: Marking Code
Packaging: Tape and Reel per EIA 481
Applications
‹
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‹
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Dimensions
High Definition Multi-Media Interface (HDMI)
Digital Visual Interface (DVI)
DisplayPortTM Interface
MDDI Ports
LVDS
Serial ATA
PCI Express
Circuit Diagram
2.70
0.40
1
2
1.00
Pin 1
0.60
Pin 2
Pin 3
Pin 4
0.20
0.50
GND
0.50
Nominal Dimensions in mm
Revision 07/20/2010
4-Line Protection
1
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Absolute Maximum Rating
Rating
Symbol
Value
Units
Peak Pulse Power (tp = 8/20μs)
Ppk
150
Watts
Peak Pulse Current (tp = 8/20μs)
IPP
5
A
ESD per IEC 61000-4-2 (Air)
ESD per IEC 61000-4-2 (Contact)
VESD
+/- 17
+/- 12
kV
TJ
-55 to +125
°C
TSTG
-55 to +150
°C
Operating Temperature
Storage Temperature
Electrical Characteristics (T=25oC)
Parameter
Symbol
Conditions
Reverse Stand-Off Voltage
VRWM
Any I/O pin to ground
Reverse Breakdown Voltage
V BR
It = 1mA
Any I/O pin to ground
Reverse Leakage Current
IR
VRWM = 5V, T=25°C
Any I/O pin to ground
1
μA
Clamping Voltage
VC
IPP = 1A, tp = 8/20μs
Any I/O pin to ground
15
V
Junction Capacitance
Cj
VR = 0V, f = 1MHz
Between I/O pins
0.4
pF
Junction Capacitance
Cj
VR = 0V, f = 1MHz
Any I/O pin to ground
0.8
pF
© 2011 Semtech Corp.
2
Minimum
Typical
Maximum
Units
5
V
6
V
0.30
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Power Derating Curve
10
110
% of Rated Power or IPP
Peak Pulse Power - PPP (kW)
100
1
0.1
90
80
70
60
50
40
30
20
10
0
0.01
0.1
1
10
100
0
1000
25
Pulse Waveform
Percent of I
PP
80
e-t
50
td = IPP/2
30
20
30
150
Line to Line
25
20
Line to Gnd
15
Waveform
Parameters:
tr = 8µs
td = 20µs
10
5
10
0
0
0
5
10
15
20
25
0
30
2
3
4
5
6
ESD Clamping for +8kV pulse per IEC 61000-4-2
Normalized Capacitance vs. Reverse Voltage
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1
Peak Pulse Current - IPP (A)
Time (µs)
CJ(VR) / CJ(VR=0)
125
35
Clamping Voltage -VC (V)
90
40
100
40
Waveform
Parameters:
tr = 8µs
td = 20µs
100
60
75
Clamping Voltage vs. Peak Pulse Current
110
70
50
Ambient Temperature - TA (oC)
Pulse Duration - tp (us)
f = 1 MHz
0
1
© 2011 Semtech Corp.
2
3
Reverse Voltage - VR (V)
4
5
3
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Typical Characteristics (Con’t)
Insertion Loss S21 - I/O to I/O
CH1 S21
LOG
Insertion Loss S21 - I/O to GND
6 dB / REF 0 dB
CH1 S21
LOG
6 dB / REF 0 dB
1: -0.076 dB
900 MHz
3
0 dB
1
1: -0.086 dB
900 MHz
2: -0.062 dB
1.8 GHz
3
0 dB
2
1
3: -0.1087 dB
2.5 GHz
-6 dB
3: -0.126 dB
2.5 GHz
-6 dB
-12 dB
-12 dB
-18 dB
-18 dB
-24 dB
-24 dB
-30 dB
-30 dB
-36 dB
-36 dB
-42 dB
-42 dB
-48 dB
2: -0.0336 dB
1.8 GHz
2
-48 dB
1
MHz
START . 030 MHz
© 2011 Semtech Corp.
10
MHz
100
MHz
1
MHz
3
1
GHz GHz
STOP 3000. 000000 MHz
START . 030 MHz
4
10
MHz
100
MHz
3
1
GHz GHz
STOP 3000. 000000 MHz
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Applications Information
Design Recommendations for HDMI Protection
Adding external ESD protection to HDMI ports can be
challenging. First ESD protection devices have an
inherent junction capacitance. However, adding even a
small amount of capacitance will cause the impedance
of the differential pair to drop. Second, large packages
and land pattern requirements cause discontinuities
that adversely affect signal integrity. The
RClamp0524J is specifically designed for protection of
high-speed interfaces such as HDMI. They present
<0.3pF capacitance between the pairs while being
rated to handle >±8kV ESD contact discharges
(>±15kV air discharge) as outlined in IEC 61000-4-2.
Each device is in a leadless SLP package that is less
than 1.1mm wide. They are designed such that the
traces flow straight through the device. The narrow
package and flow-through design reduces
discontinuities and minimizes impact on signal integrity.
This becomes even more critical as signal speeds
increase.
8
7
GND
6
5
1
2
GND
3
4
Pin
Identification
1, 2, 3, 4
Inp ut Lines
5, 6, 7, 8
Outp ut Lines
(N o Internal Connection)
GN D
Ground
SLP2710P8 Pin Configuration (Top View)
Pin Configuration
Figure 1 is an example of how to route the high speed
differential traces through the RClamp0524J. The
solid line represents the PCB trace. The PCB traces
are used to connect the pin pairs for each line (pin 1 to
pin 8, pin 2 to pin 7, pin 3 to pin 6, pin 4 to pin 5). For
example, line 1 enters at pin 1 and exits at Pin 8 and
the PCB trace connects pin 1 and 8 together. This is
true for lines connected at pins 2, 3, and 4 also.
Ground is connected at the center tabs. One large
ground pad should be used in lieu of two separate
pads.
HDMI Connector
12
11
10
TDR Measurements for HDMI
The combination of low capacitance, small package, and
flow-through design means it is possible to use these
devices to meet the HDMI impedance requirements of
100 Ohm ±15% without any PCB board modification.
Figures 3 and 4 show impedance test results for a TDR
risetime of 200ps and 100ps respectively, using a
Semtech evaluation board with 100 Ohm traces throughout. Measurements were taken using a TDR method as
outlined in the HDMI Compliance Test Specification
(CTS). In each case, the device meets the HDMI CTS
© 2011 Semtech Corp.
1
GND
GND
9
8
7
1
6
5
4
GND
GND
3
2
1
Figure 1. Flow through Layout Using
R Clam
p052
4J
Clamp052
p0524J
5
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Applications Information
requirement of 100 Ohm ±15% with plenty of margin.
For signal integrity purposes, the best results will be
obtained by using the RClamp0524J to protect the
high-speed differential pairs. This is because the
device is designed such that the data lines from the
connector line up with the I/O pins of the device
without altering the trace routing. Either the
RClamp0504P or RClamp0524J may be used to
protect the remaining lines (I2C, CEC, and hot plug)
depending on layout constraints.
B
A
Layout Guidelines for Optimum ESD Protection
Good circuit board layout is critical not only for signal
integrity, but also for effective suppression of ESD induced transients. For optimum ESD protection, the
following guidelines are recommended:
z Place the device as close to the connector as possible. This practice restricts ESD coupling into
adjacent traces and reduces parasitic inductance.
z The ESD transient return path to ground should be
kept as short as possible. Whenever possible, use
multiple micro vias connected directly from the device
ground pad to the ground plane.
z Avoid running critical signals near board edges.
X-axis
Y-axis
A
1.905
101.0
B
2.081
107.0
(nsec)
(Ohm)
Figure 2 - TDR Measurement with 200ps risetime
using Semtech Evaluation Board
B
A
X-axis
Y-axis
A
1.80
96
B
2.076
108.0
(nsec)
(Ohm)
Figure 3 - TDR Measurement with 100ps risetime
using Semtech Evaluation Board
Note: Measurements were taken on SLP HDMI EVAL Rev C Board that has 100Ω
differential traces impedance throughout (No trace Compensation).
© 2011 Semtech Corp.
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Applications Information
RClamp0524J
Data 2+
Data 2Data 1+
Data 1-
To HDMI
Graphics Chip
Data 0+
Data 0Clk+
Clk-
RClamp0524J
CEC
SCL
SDA
Gnd
5VPower
HP Detect
1
6
RClamp0504P
Figure 4. HDMI Protection Example
A+
Host Rx Host Rx +
B-
A-
1
RClamp0524J
A+
ESATA
Host Plug
Host Tx +
Host Tx -
B+
1
ESATA Device
Plug
A-
BB+
-
RClamp0524J
Figure 5. eSA
TA Pr
o t ection Exam
ple
eSAT
Pro
Example
© 2011 Semtech Corp.
7
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Applications Information
1
RClamp0524J
DISPLAY PORT
CONNECTOR
1
RClamp0524J
Ohm
μ
1
RClamp0524J
Figure 6. Displa
yP
or
ot ection Exam
ple
DisplayP
yPor
ortt Pr
Pro
Example
© 2011 Semtech Corp.
8
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Applications Information Spice Model
RClamp0524J Spice Model
R Clamp0524J Spice Parameters
© 2011 Semtech Corp.
Parameter
Unit
D1 (LCR D)
D2 (LCR D)
D3 (T VS)
IS
Amp
1E-20
1E-20
2E-12
BV
Volt
100
100
9.36
VJ
Volt
0.7
0.7
0.6
RS
Ohm
0.458
1.0
2.6
IB V
A mp
1E-3
1E-3
1E-3
CJO
Farad
0.4E-12
0.6E-12
56E-12
TT
sec
2.541E-9
2.541E-9
2.541E-9
M
--
0.01
0.01
0.23
N
--
1.1
1.1
1.1
EG
eV
1.11
1.11
1.11
9
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Outline Drawing - SO-8
Outline
SLP2710P8
A
D
DIMENSIONS
MILLIMETERS
MIN NOM MAX
B
DIM
E
PIN 1
INDICATOR
(LASER MARK)
A
SEATING
PLANE
aaa C
A1
C
b1xN
bbb
C A B
A2
R0.125
0.47 0.50 0.53
0.00 0.03 0.05
(0.13)
0.15 0.20 0.25
0.35 0.40 0.45
2.60 2.70 2.80
0.90 1.00 1.10
0.50 BSC
0.60 BSC
0.30 0.38 0.43
8
0.08
0.10
2
1
E/2
A
A1
A2
b
b1
D
E
e
e1
L
N
aaa
bbb
LxN
2X R0.075
7 PLACES
N
e1
bxN
e
NOTES:
bbb
C A B
D/2
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
Land Pattern - SLP2710P8
P1
P
DIMENSIONS
DIM
C
G
P
P1
X
X1
Y
Y1
Z
Y
Z (C)
(Y1)
G
X
X1
INCHES
(.034)
.008
.020
.024
.008
.016
.027
(.061)
.061
MILLIMETERS
(0.875)
0.20
0.50
0.60
0.20
0.40
0.675
(1.55)
1.55
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
© 2011 Semtech Corp.
10
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RClamp0524J
PRELIMINARY
PROTECTION PRODUCTS
Marking Codes
Ordering Information
0524J
PIN 1
INDICATOR
YYWW
Part Number
Number
of Lines
Qty per
Reel
Reel
Size
RClamp0524J.TCT
4
3000
7 Inch
Note: Lead finish is lead-free NiPdAu.
YYWW = Date Code
Tape and Reel Specification
Pin 1 Location
User Direction of feed
Device Orientation in Tape
Part Number
RClamp 0524J
Tape
Width
8 mm
A0
1.21 +/-0.10 mm
B, (Max)
D
4.2 mm
1.5 + 0.1 mm
- 0.0 mm )
B0
K0
2.91 +/-0.10 mm
D1
E
0.5 mm
±0.05
1.750±.10
mm
0.66 +/-0.10 mm
F
3.5±0.05
mm
K
(MAX)
P
P0
P2
2.4 mm
4.0±0.1
mm
4.0±0.1
mm
2.0±0.05
mm
T(MAX)
0.4 mm
W
8.0 mm
+ 0.3 mm
- 0.1 mm
Contact Information
Semtech Corporation
Protection Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
© 2011 Semtech Corp.
11
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