cd00245890

AN3032
Application note
STEVAL-ILB007V1, 2 x 58 W/T8 ballast
based on the L6585DE suitable for 2 x 36 W/T8 lamp
Introduction
This application note describes a demonstration board able to drive 2 x 58 W linear T8
fluorescent tubes. The last section of the document describes the changes that need to be
made to adapt the same board for 2 x 36 W linear T8 fluorescent tubes.
The ballast is controlled by the new L6585DE IC that integrates the PFC and half-bridge
control circuits, relevant drivers, and the circuitry that manages all the operating phases
(preheating, ignition and run mode) of the lamp. Protections against failures such as lamp
disconnection, anti-capacitive mode and PFC overvoltage are guaranteed and obtained with
a minimum number of external components. In addition to the description of the circuit and
design criteria, this document provides a short overview of the ballast performances.
Fluorescent lamps are driven more and more by electronic ballasts rather than by
electromagnetic ones, primarily because fluorescent lamps can produce around 20% more
light for the same input power when driven above 20 kHz instead of 50/60 Hz. Operation at
this frequency also eliminates both light flickering (the response time of the discharge is too
slow for the lamp to have a chance to extinguish during each cycle) and audible noise.
Electronic ballasts consume less power and therefore dissipate less heat than
electromagnetic ballasts. The energy saved can be estimated in the range of 20-25% for a
given lamp power. Finally, the electronic solution allows better control of the filament current
and lamp voltage during preheating with the unquestionable benefit of increasing the
average lamp life.
Figure 1.
2 x 58 W T8 ballast demonstration board
!-V
June 2010
Doc ID 16165 Rev 2
1/26
www.st.com
Contents
AN3032
Contents
1
Basis of half-bridge inverter topology . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Main characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Ballast design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1
L6585DE pin-by-pin biasing circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2
Design of the PFC power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3
4
3.2.1
Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2.2
Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2.3
Boost inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2.4
Power MOSFET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2.5
Boost diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Design of the half bridge inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1
Start sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.2
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.3
Conducted emissions test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.4
Guidelines for connecting the two lamps to the ballast . . . . . . . . . . . . . . 19
5
Adapting the design for a 2 x 36 W T8 electronic ballast . . . . . . . . . . 20
6
Automatic restart circuit for lamp replacement . . . . . . . . . . . . . . . . . . 21
7
Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26
Doc ID 16165 Rev 2
AN3032
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
2 x 58 W T8 ballast demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Electronic lamp ballast capacitor-to-ground configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electronic lamp ballast lamp-to-ground configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Dual lamp ballast series configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Dual lamp ballast parallel configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical schematic 2 x 58 W T8 - main wide range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
EOL circuit for first lamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
L6585DE start-up sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
One lamp ignition phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Low-side current in run mode condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Lamp voltage and current in run mode condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Run mode, rectifying effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Ignition phase with a broken lamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Conducted emissions at 110 Vac 50 Hz - line 1 peak detector . . . . . . . . . . . . . . . . . . . . . 17
Conducted emissions at 110 Vac 50 Hz - line 2 peak detector . . . . . . . . . . . . . . . . . . . . . 18
Conducted emissions at 230 Vac 50 Hz - line 1 peak detector . . . . . . . . . . . . . . . . . . . . . 18
Conducted emissions at 230 Vac 50 Hz - line 2 peak detector . . . . . . . . . . . . . . . . . . . . . 18
Connecting two lamps to the ballast . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Automatic restart circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Doc ID 16165 Rev 2
3/26
Basis of half-bridge inverter topology
1
AN3032
Basis of half-bridge inverter topology
The half-bridge inverter operates in zero voltage switching (ZVS) resonant mode to reduce
the switching losses and the electromagnetic interference generated by the output wiring
and the lamp. Voltage-fed, series-resonant, half-bridge inverters are currently used for
compact fluorescent lamp (CFL) ballasts and for many european tube lamp (TL) ballasts.
In general for lighting applications, and given the current preheating, it is possible to choose
between two different resonant circuit topologies: capacitor-to-ground or lamp-to-ground.
Figure 2.
Electronic lamp ballast capacitorto-ground configuration
Electronic lamp ballast lamp-toground configuration
&5(6
Figure 3.
/5(6
&%ORFN
/U5(6
9GF
9GF
&5(6
&%ORFN
B
B
!-V
!-V
In the presented design, a lamp-to-ground configuration has been used.
For dual lamp ballasts, the lamps can be connected in series (Figure 4) or in parallel
(Figure 5). The presented system uses a parallel configuration for the following reasons.
Figure 4.
●
Lower voltage stress on the ballast output stage components, wiring and fixture
sockets.
●
The resonant L and C associated with the lamps is less sensitive to component
tolerances due to the lower-running lamp voltages compared to the series
configuration.
●
Better lamp control. Both lamps can be monitored independently.
Dual lamp ballast series
configuration
Figure 5.
Dual lamp ballast parallel
configuration
&5(6
&5(6
/U5(6
/U5(6
/U35(
&%ORFN
!-V
4/26
Doc ID 16165 Rev 2
&%ORFN
!-V
AN3032
2
Main characteristic
Main characteristic
The electrical specifications of the lamp ballast are shown in Table 1.
Table 1.
Input and output parameters
Input parameters
VIN
Input voltage range
85 to 265 VRMS
fline
Line frequency
50/60 Hz
Tube lamp
Number
2
Type
T8 in parallel configuration
Power
58 W
Expected output parameters
PF
Power factor
= 0.9
THD%
Total harmonic distortion
= 10
η%
Efficiency
˜ 90
Doc ID 16165 Rev 2
5/26
Doc ID 16165 Rev 2
&21
-
)
$
Q)9$&;
&
Q)9$&< &
[P+$
/3)&
&
Q)9$&; 5
5
%5,'*(
'
5
.:
5
.
5
0
5
0
&
S)9
5 5
N
5
P+
/3)&
&
5
5
02KP N2KP
5
5
RKP:
4
5
2KP
67310+($76,1.
5
N2KP
%$7=
'
&
S)9
Q)9
5
N2KP
&
5
X)9 Q)9 5
02KP N2KP
&
'
677+/
5 &
Q)
,19
&RPS
0XOW
&75
(2/5
(2/3
7&+
(2,
5)
2VF
=&'
3)&6
3)*
+%&6
*1'
/6'
9&&
2XW
+6'
%RRW
&
X)9
1
1
&
Q)9
'
&
Q)9
8
/'(
&
'
9
& 5
1)B9
5 2KP
5
5
.2KP
N2KP
&
Q)B9DF;
.:
.:
Q)B9
6/26
&
Q)N9
.
&
N2KP
4
67'101
5
2KP
4
67'101
5
2KP
5
5
/
P+
/
P+
RKP:
Q)9
&
Q)9
&
&
Q)9
'
&
S)9
9
5
0
5
0
'
9
/$03
9
'
7/DPS:
/$03
&
Q)9
7/DPS:
9
'
5
0
&
Q)9
5
0
&
S)9
Figure 6.
X)B9
'
Main characteristic
AN3032
Electrical schematic 2 x 58 W T8 - main wide range
!-V
AN3032
3
Ballast design
Ballast design
This section describes the main components of the circuit.
3.1
L6585DE pin-by-pin biasing circuitry
Designed in a high-voltage BCD offline technology, the L6585DE embeds a PFC controller,
a half-bridge controller, the relevant drivers and the logic necessary to build an electronic
ballast.
●
Pin1 OSC is one of the two oscillator inputs. The value of the capacitor connected to
ground defines the half-bridge switching frequency in each operating state. C5 is set to
1 nF.
●
Pin2 RF: the choice of component and oscillator capacitance defines the half-bridge
switching frequency in each operating state. A resistor R14 connected to ground sets
the run frequency, while during the preheating phase the switching frequency is set by
the parallel of the above resistance with the R13 resistor connected between the RF
and EOI pins (the EOI pin is pulled to ground during preheating).
With the following frequencies and ignition time:
frun = 40kHz
fpre = 65kHz
t ign = 60ms
R14 can be calculated with the following formula.
Equation 1
e = 1−
1.33
(C5 )0.581
k=
499.6 ⋅ 10 3
(C 5 )0.872
⎛ k ⎞
⎟
R14 = ⎜⎜
⎟
⎝ frun ⎠
1/ e
= 33kΩ
The value of R13 is therefore given by:
Equation 2
1/ e
●
⎛ k ⎞
⎟ ⇒ R13 = 51kΩ
R13 // R14 = ⎜
⎜ fpre ⎟
⎠
⎝
Pin3 EOI is a multi-function pin. During preheating, the pin is internally shorted to
ground by the logic, so the resistor (Rpre//Rrun) connected between the RF pin and
ground sets the preheating switching frequency. During ignition it goes into a high
impedance state: the ignition time is the time necessary for the pin voltage to exponentially - rise from zero to 1.9 V. The growth is steered by the C6*R13 time
constant; since the value of R13 has already been calculated and tign at the start is
fixed, C6 is calculated with the following formula.
Equation 3
C6 =
t ign
3 ⋅ R13
= 392nF
Three capacitors in parallel have been mounted to obtain this value
(C6 = 220//150//22 nF).
Doc ID 16165 Rev 2
7/26
Ballast design
●
AN3032
Pin4 TCH is the time counter and is activated during the preheating phase as well as
after a protection is triggered (HBCS crossing during ignition/run mode, window
comparator at EOL). To achieve this, an R15C7 parallel network is connected between
this pin and ground. With a protection time tTch,reduced fixed at 0.27 seconds (needed
for the startup sequence with old or damaged lamps), C7 can then be calculated.
Equation 4
t Tch,reduced ≅ C 7 ⋅ 0.26974 ⋅ 10 6 ⇒ C 7 = 1μF
With tpre set to 1 second and considering the internal current generator ICH = 31 µA, R15 can
be calculated.
Equation 5
C7
⋅ 4.63
ICH
R15 =
= 755kΩ ⇒ 750kΩ
4.63
C 7 ⋅ ln
1 .5
Pin5 EOLP is a 2 V reference and allows programming the window comparator of Pin6
(EOL) according to the values defined inTable 4 in the L6585DE datasheet. Working in
a lamp-to-ground configuration, a fixed reference mode has been selected, and for a
window voltage amplitude of ± 240 mV, R16 has been set to 75 kΩ.
t pre −
●
●
Pin6 EOL is the input of the window comparator. Concerning this comparator, the fixed
reference configuration requires two Zener diodes to shift the mean value of the lamp
voltage to 2.5 V. The values of the two Zener diodes relate to the symmetry of the
protection intervention, and the best symmetry is obtained by choosing two values
whose difference is equal to twice the reference voltage.
Referring to the first series lamp (Figure 7):
Equation 6
VK max = 2.5 + VfD15 + VZD16 + W 2
VK min = 2.5 − (VzD15 + VfD16 ) − W 2
2 ⋅ 2.5 = VzD15 − VzD16 ⇒ VzD16 = 5.1V, VzD15 = 10V
If we consider that VfD15 = VfD16 = 0.7 V and take into account that W/2 = 0.240 V, the
maximum/minimum voltage on the low resistance of the voltage divider of the lamp is
V K = 8.2V .
With R56 equaling 1.8 MΩ, considering the current capability of EOL and fixing the maximum
deviation voltage lamp Vlamp = 18V , the value of R57 can be calculated as 1.5 MΩ.
8/26
Doc ID 16165 Rev 2
AN3032
Ballast design
Figure 7.
EOL circuit for first lamp
!-V
The same design procedure can be used for the EOL circuit of the second series
lamp.
●
Pin7 CTR is a multi-function pin (PFC overvoltage, feedback disconnection, reference
for EOL in case of tracking reads), connected through a resistive divider to the PFC
output bus. By establishing a maximum PFC overvoltage (PFC output overshoot, for
example, at start-up) VOVPBUSpfc of 480 V and considering that the corresponding
threshold on the CTR pin (VthrCTR ) must be 3.4 V, R7+R12 can be calculated as
1.82 MΩ and R19 as 13 kΩ.
●
Pin8 MULT: first, the maximum peak value for VMULT, VMULTmax is selected. This value,
which is reached at the maximum mains voltage, should be 3 V (linearity limit) or nearly
so in wide-range mains and less in case of single mains. The PFC sense resistor
selected is RS = R22 = 0.100 Ω and is described in the section on Pin12. Considering
that the maximum slope of the multiplier (maxslope) is 0.75, it is possible to calculate
the maximum peak value occurring at the maximum mains voltage and the multiplier
divider ε.
Equation 7
VMULT max
ε=
ILpk ⋅ R 22
V
=
⋅ AC max =
max slope VAC min
R17
2⋅ 2 ⋅
Pout
⋅ R 22
V
η ⋅ Vin min ⋅ PF
⋅ AC max = 1.97
max slope
VAC min
V
R17
= MULT max =
+ (R 5 + R 9 )
2 ⋅VAC max
1.97
2 ⋅ 265
= 5.28 ⋅ 10 − 3
Supposing there is a 150 µA current flowing into the divider, the value of the lower resistor
R17 can be calculated, and then the value of the upper resistance R5+R9.
Equation 8
VMULT max
= 13kΩ
150μA
1− ε
R5 + R9 =
⋅ R17 = 2.44MΩ ⇒ R 5 + R 9 = 2MΩ
ε
R17 =
Doc ID 16165 Rev 2
9/26
Ballast design
AN3032
The voltage on the multiplier pin with the selected component values is recalculated at a
minimum line voltage of 0.77 V and at a maximum line voltage of 2.41 V.
As a result, the multiplier operates correctly within its linear region. To obtain noise immunity,
a capacitor C30 equal to 220 pF is mounted in parallel to R17.
●
Pin9 COMP is the output of the E/A and also one of the two inputs of the multiplier. The
feedback compensation network, placed between this pin and INV (10), is a
capacitor C2 calculated as follows (considering that R6+R11 is the upper resistance of
the voltage divider between the PFC bus and the COMP pin).
Equation 9
C2 =
10
= 530nF
2 ⋅ π ⋅ (R 6 + R11 )
C2 has been set to a commercial value of 470//100 nF.
●
Pin10 INV: to implement the voltage control loop, a resistive divider (Figure 6) must be
connected between the regulated output voltage (VBUSpfc = 420 V) of the boost and the
pin. The internal reference on the non-inverting input of the E/A is 2.5 V so R6 and R11
(Figure 6) can then be selected fixing R18 to 18 kΩ.
Equation 10
R 6 + R11 VBUSpfc
=
−1
R18
2 .5
R 6 + R 11 = 3 M Ω
●
Pin11 ZCD is the input to the zero current detector circuit. The ZCD pin is connected to
the auxiliary winding of the boost inductor through a limiting resistor. The ZCD circuit is
negative-going, edge-triggered: when the voltage on the pin falls below 0.7 V, the PWM
latch is set and the MOSFET is turned on. However, the circuit must first be armed:
prior to falling below 0.7 V, the voltage on pin 11 must experience a positive-going,
edge-exceeding 1.4 V (due to the MOSFET switching off). The maximum main-toauxiliary winding turn ratio (m) has to ensure that the voltage delivered to the pin during
the MOSFET's OFF time is sufficient to arm the ZCD circuit.
Equation 11
m≤
VBUSpfc − 2 ⋅ VinRMS(max)
1 .4
= 33.10
m has been set to 10.
Considering the upper and lower clamp voltages of the ZCD pin and its minimum sink
current capability according to the maximum and minimum voltages of the PFC bus,
R10 has been calculated and set to 6.8 kΩ.
10/26
Doc ID 16165 Rev 2
AN3032
Ballast design
●
Pin12 PFCS is the inverting input of the current sense comparator. As the voltage
across the sense resistor (proportional to the instantaneous inductor current) crosses
the threshold set by the multiplier output, the power MOSFET is turned off. Equation 12
determines the PFC sense resistor.
Equation 12
PoutTOT
η
= 4.27A
Vin min ⋅ PF
2⋅ 2 ⋅
IL max =
V CSmin
1
R 22 < ------------------- = ----------- = 0.23Ω ⇒ R 22 = 100mΩ
I Lmax
4.27
R22 has been set to 100 mΩ with a power rating of 1 W.
●
Pin13 PFG: to drive the external MOSFET correctly, R21 has been set to 130 Ω.
●
Pin 14 HBCS: assuming that during each lamp’s ignition phase there is a maximum
current IIGNmax of 2.5 A and an HBCS threshold during the ignition phase
VHBCS-ign of 1.6 V, we can calculate that RsenseHB = R31.
Equation 13
R 31 =
VHBCS −ign
IIGN max TOT
= 0.32Ω
R31 has been set to 0.33 Ω with a power rating of 1 W.
●
Pin 15 GND: device ground.
●
Pin 16 LSD: to drive the external half-bridge low-side MOSFET correctly, the resistor
R23 has been set to 10 Ω.
●
Pin 17 Vcc: this pin is externally connected to the startup circuit (by means of R34, R36,
R37, R52 and D11) and to the self-supply circuit made of a charge pump composed by
the net C16, C17, C18, D8, D9 and R29.
●
Pin 18 out: floating reference of the high-side driver. This pin is connected close to the
source of the high-side power MOSFET.
●
Pin 19 HSD: to drive the external half-bridge low-side MOSFET correctly, the resistor
R20 has been set to 10 Ω.
●
Pin 20 boot: for the high-side section C13 has been set to 100 nF.
3.2
Design of the PFC power section
3.2.1
Input capacitor
The input high-frequency filter capacitor has to attenuate the switching noise due to the high
frequency inductor current ripple. The worst conditions will occur on the peak of the
minimum rated input voltage (Vin min = 85 V). The following values have been established.
●
The coefficient of the maximum high-frequency voltage ripple r = 0.05.
●
Total system efficiency η = 0.9.
Doc ID 16165 Rev 2
11/26
Ballast design
AN3032
Taking into account a minimum half-bridge switching frequency (fswmin) of 40 kHz and a total
output power (PoutTOT) equal to 2*58 = 116 W, the input capacitor C4 can be determined by
the following equation.
Equation 14
PoutTOT
η ⋅ Vin min
C4 =
= 1.5μF
2 ⋅ π ⋅ fsw min ⋅ Vin min ⋅ r
C4 has been set to 470 nF x 2.
3.2.2
Output capacitor
The selection of the output bulk capacitor C1 depends on the DC output voltage, the
admitted overvoltage, the output power and the desired voltage ripple. With the following
values:
●
PFC output voltage VbusPFC = 420 V.
●
coefficient of the low frequency (twice the mains frequency (fmain) = 50 Hz) voltage
ripple r1 = 0.05.
the bulk capacitor can be calculated as:
Equation 15
PoutTOT
VbusPFC
C1 =
= 21μF
2π ⋅ 2fmain ⋅ VbusPFC ⋅ r1
To obtain the smallest possible ripple and good reliability, a commercial capacitor C1 of
47 µF, 450 V has been used.
3.2.3
Boost inductor
The inductance Lpfc is usually determined so that the minimum switching frequency (fmin pfc)
is greater than the maximum frequency of the internal starter to ensure correct TM
operation. Considering the minimum suggested value for the PFC section (fmin pfc) is 20 kHz
and that this last can occur at either the maximum VinrmsMax = 265 V or the minimum
VinrmsMin = 85 V mains voltage, the inductor value is defined by:
Equation 16
L pfc =
(
2
Vinrms
⋅ VbusPFC − 2 ⋅ Vinrms
P
2 ⋅ fmin pfc ⋅ out ⋅ VbusPFC
η
)
To margin from fmin pfc we have set fpfc to 40 kHz. In this condition, the lower value for the
inductor is determined by Vinrms = VinrmsMin and the result Lpfc = 0.5 mH with (as stated in
the PFCS pin description) a maximum ILmax of 4.75 A (using the inductor 1986-0002
manufactured by MAGNETICA).
12/26
Doc ID 16165 Rev 2
AN3032
3.2.4
Ballast design
Power MOSFET
The choice of MOSFET relates mainly to its RDS(on), which depends on the output power
and its breakdown voltage, the latter being fixed by the output voltage Vbuspfc = 420 V only,
plus the overvoltage ΔVOVPpfc = 60 V allowed, and a safety margin.
The MOSFET's power dissipation depends on the conduction and switching losses.
Assuming maximum total power losses PlossesAdm = 1%, PoutTOT = 1.16 W, it is easy to
verify that with the MDmeshTM V Power MOSFET STP16N65M5, the estimated total
MOSFET power losses PlossesEst are about = 0.7 W (worst case) and that this was the
correct choice. To better dissipate the power losses, we have added a small heatsink.
3.2.5
Boost diode
The boost freewheeling diode is a fast recovery one. The breakdown voltage is fixed with the
same criterion as the MOSFET. The value of its DC and RMS current, needed to choose the
current rating of the diode, are reported.
Equation 17
ID2dc =
PoutTOT
= 0.276 A
VBUSpfc
ID2rms = 2 2 ⋅ IINrmsMax ⋅
4 2 VinrmsMin
⋅
= 0.78A
9π VBUSpfc
Since the PFC works in transition mode, we have used the Turbo 2 ultrafast high-voltage
rectifier STTH3L06.
3.3
Design of the half bridge inverter
According to the criteria described in AN993 chapter 5 (design tips) with regard to the
design of the resonant circuit, the following values have been selected.
●
L res = L 1 = L 2 = 1.8 mH
●
C res = C 9 = C 14 = 10 nF, 1600 V
●
C block = C 12 = C 15 = 100 nF, 400 V
For Lres = L1 = L2 = 1.8 mH, we have used the inductor 1646-0006 manufactured by
MAGNETICA.
A second-generation MDmeshTM power MOSFET STD10NM60N has been inserted in the
half-bridge section to reduce the power losses.
Doc ID 16165 Rev 2
13/26
Experimental results
4
AN3032
Experimental results
The schematic of the tested board is shown in Figure 6. The board has been tested for
efficiency, power factor, total harmonic distortion and thermal behavior for the input voltage
range. Table 2 and Table 3 show the results obtained for a 45-minute test.
Table 2.
2 x 58 W T8 board performance
VIN(V)
PIN(W)
POUTlamp1(W)
Efficiency(%)
IIN(A)
PF
THD(%)
85
126
53.2
84.3
1.487
0.999
3.6
110
123
53.2
85.8
1.13
0.999
6.2
140
122.3
53.2
86.9
0.877
0.997
7.1
185
121.1
53.2
87.8
0.66
0.995
8.7
230
119.9
53.2
88.7
0.528
0.99
11.7
265
118.9
53.2
89.4
0.456
0.985
13
All the results are very good. Efficiency is approximately 85% and the power factor corrector
is constantly 0.99.
Table 3.
4.1
2 x 58 W T8 thermal results of critic system components
Temp
VIN(V)
Ambient
temp (°C)
Temp
MOSLowSide(°C)
Temp
MOSHighSide(°C)
Temp
MOSPFC(°C)
L6585E(°C)
85
25
85
90
99
57
110
25
85
90
87
57
140
25
85
90
81
57
185
25
85
90
75
57
230
25
85
90
64
57
265
25
85
90
56.7
57
Start sequence
As shown in Figure 8, it is during the start sequence that, as the IC supply voltage VCC
reaches VCCon, the half-bridge starts oscillating and the charge capacitor connected to TCH
begins charging. When the voltage at the TCH pin reaches VCHP (4.63 V), the same
capacitor is discharged following an exponential decrease steered by the time constant; this
defines the preheating time.
During this time, the EOI pin is forced to ground and the switching frequency is set by the
oscillator to the preheating value. When the voltage at the TCH pin drops down to
1.53 V, the EOI pin is exponentially charged according to a time constant that defines the
ignition time.
At the same time, the TCH pin goes down to ground. During this phase, the oscillator
generates a reduction of the switching frequency; when the voltage at the EOI pin exceeds
1.9 V, the chip enters run mode.
14/26
Doc ID 16165 Rev 2
AN3032
Experimental results
Figure 8.
L6585DE start-up sequence
!-V
Figure 9 shows the lamp ignition phase, across and through which the voltage and current
increase linearly.
Figure 9.
One lamp ignition phase
AM05139v1
Figure 10. Low-side current in run mode condition
AM05140v1
Doc ID 16165 Rev 2
15/26
Experimental results
AN3032
Figure 11. Lamp voltage and current in run mode condition
AM05141v1
4.2
Protections
With old lamps, abnormal behavior may occur during run mode as a result of the rectifying
effect.
This effect relates to a differential increase of the ohmic resistance of the two cathodes. The
lamp equivalent resistance is therefore higher when the lamp current flows in one direction
than in the other. The current waveform is distorted and the mean value of the lamp current
is no longer zero. Figure 12 shows the behavior of a dual lamp ballast during a rectifying
effect. In the EOL pin, as soon as the internal window comparator is triggered by a voltage
variation due to the rectifying effect, the Tch cycle starts, and if at its end the comparator is
again triggered, the L6585DE stops.
Figure 12. Run mode, rectifying effect
AM05142v1
When an old lamp is connected to the ballast, the strike voltage is higher than the nominal
voltage and may also be higher than the safety threshold. In this case, the lamp can take
longer than usual to ignite or may not ignite at all. In both cases, because of the frequency
drop, the voltage at the output of the ballast can easily reach dangerous values during this
ignition time.
The same problem occurs if one of the lamp’s tubes is broken: the lamp cannot ignite and
the lamp voltage must be limited. Figure 13 shows how the dual lamp ballast ignites when
one lamp is broken.
16/26
Doc ID 16165 Rev 2
AN3032
Experimental results
When the preheating time Tpre = tTch is finished, the L6585DE detects the lost ignition of one
of the two lamps and starts reducing the preheating time tTch,reduced. At the end of this time,
if the broken lamp is not ignited, the IC is latched.
Figure 13. Ignition phase with a broken lamp
AM05143v1
4.3
Conducted emissions test
Conducted emissions have been measured in neutral and line wires using a peak detector
and considering the limits for lighting applications specified in EN55015. The measurements
have been performed at 110 and 230 Vac lines. The results are shown in Figure 14, 15, 16
and 17.
Since the emission level is below both the quasi-peak and average limits with acceptable
margins, the power supply passes the pre-compliance test.
Figure 14. Conducted emissions at 110 Vac 50 Hz - line 1 peak detector
-XQ
5HIG%9
3HDN
/RJ
G%
$WWHQG%
: 6
6 )&
$$
6WDUWN+]
5HV%:N+]
9%:N+]
6WRS0+]
6ZHHSPVSWV
!-V
Doc ID 16165 Rev 2
17/26
Experimental results
AN3032
Figure 15. Conducted emissions at 110 Vac 50 Hz - line 2 peak detector
-XQ
5HIG%9
3HDN
/RJ
G%
$WWHQG%
: 6
6 )&
$$
6WDUWN+]
5HV%:N+]
9%:N+]
6WRS0+]
6ZHHSPVSWV
!-V
Figure 16. Conducted emissions at 230 Vac 50 Hz - line 1 peak detector
-XQ
5HIG%9
3HDN
/RJ
G%
$WWHQG%
: 6
6 )&
$$
6WDUWN+]
5HV%:N+]
9%:N+]
6WRS0+]
6ZHHSPVSWV
!-V
Figure 17. Conducted emissions at 230 Vac 50 Hz - line 2 peak detector
-XQ
5HIG%9
3HDN
/RJ
G%
$WWHQG%
: 6
6 )&
$$
6WDUWN+]
5HV%:N+]
9%:N+]
6WRS0+]
6ZHHSPVSWV
!-V
18/26
Doc ID 16165 Rev 2
AN3032
4.4
Experimental results
Guidelines for connecting the two lamps to the ballast
The following is a simple schematic that shows how to correctly connect the two lamps to
the ballast.
Figure 18. Connecting two lamps to the ballast
%DOODVW
%DOODVW
2XWSXW&RQQHFWRU
2XWSXW&RQQHFWRU
/$03 /$03 !-V
Doc ID 16165 Rev 2
19/26
Adapting the design for a 2 x 36 W T8 electronic ballast
5
AN3032
Adapting the design for a 2 x 36 W T8 electronic
ballast
The design developed for 2 x 58 W T8 tubes can be adapted to fit 2 x 36 W T8 tubes. Using
the same resonant circuit, minor adjustments need to be made to the operating frequencies
of the lamp.
Equation 18
frun = 49kHz fpreh = 65 kHz
By means of Equation 1, 2 and 3, the following components can be calculated.
Equation 19
R14 = 27kΩ
R13 = 77kΩ
C 6 = 267(220 + 47)nF
To improve the 2 x 36 W board performance, we suggest inserting a capacitor C4 set at
220 nF and a resistor R21 set at 68 Ω.
20/26
Doc ID 16165 Rev 2
Vcc
cc L6585
L6585DE
Outputt Diod
ode Bridg
idge
U1
BC547
D5
6.2V
R7
82kOhm
82
R8
820kOhm
820
1
U2
M74
74HC
HC00
C3
68nF
68n
2
3
Doc ID 16165 Rev 2
C2
68nF
C1
68nF
R4
330kOhm
330
R1
330kOhm
330
Automa
Au
omatic
ic Re
Re-sta
start
t Cir
ircui
uit
D3
6.2V
D1
6.2V
1n414
n4148
D4
1n414
n4148
D2
R5
47kOhm
47
R6
330kOhm
330
R2
47kOhm
47
R3
330kOhm
330
R10
680kOhm
680
R9
680kOhm
680
Outpu
put Diode
ode Bridge
C14
10 nF 1600
00V
Resonan
antt Circui
uitt 2
T8 Lamp2
p2-58
58W
LAMP2
Resonan
antt Circui
uitt 1
LAMP1
La
58W
T8 Lamp1-58
Outpu
put Diode
ode Bridge
C9
10 nF 1600V
1600
4
3
1
2
1
2
6
4
3
AN3032
Automatic restart circuit for lamp replacement
Automatic restart circuit for lamp replacement
The following circuit can be added to the STEVAL-ILB007V1 to implement the automatic
restart feature for lamp replacement.
Figure 19. Automatic restart circuit
AM05165v1
21/26
Bill of materials
AN3032
7
Bill of materials
Table 4.
2 x 58 W bill of materials
RS
Ref.
Value
Type
Package
Manufacturer
C1
450 V, 47 µF,
20%
Electrolytic
TH radial
EPCOS
C2
25 V, 560 nF
SMD 0805
Any
C3
25 V, 33 nF
SMD 0805
Any
C4
305 Vac, 470
nF, 10%
Polypropylene
TH radial
C5
25 V, 1 nF
COG ceramic
SMD 0805
Any
C6
25 V, 390 nF
X7R ceramic
SMD 0805
Any
C7
25 V, 1 µF
SMD 0805
Any
C8
25 V, 10 nF
SMD 0805
Any
C9,C14
1600 V, 10 nF,
5%
Polypropylene
TH radial
EPCOS
B32653A1103J
000
C10, C11
305 Vac,
470
nF, 10%
Polypropylene
TH radial
EPCOS
B32923C3474K
000
C13
50 V, 100 nF
C16
630 V, 1 nF
Polypropylene
TH pith 5 mm
50 V, 4.7 µF
Electrolytic
EPCOS
SMD 1206
Manuf. code
distrelec
other
code
B43851F5476M000
B32923C3474K
000
Any
WIMA
823242
Distrelec
TH radial
228-6868
RS
Lead spacing
2.5
C17
Φ 5xh11
C18
50 V, 100 nF
SMD 0805
Any
C20
250 Vac, 1 nF
TH radial
214-5896
RS
C21
630 V, 100 nF
TH radial
822256
Distrelec
C25
25 V, 10 pF
SMD 0805
Any
C26, C27
50 V, 22 pF
SMD 0805
Any
C28, C29
400 V, 100 nF,
10%
C30
220 pF, 25 V
D2
600 V, 3 A
D17
FBI3.7M1M
22/26
Polyester
TH pith 10
mm
WIMA
EPCOS
SMD 1206
Turbo 2
Ultrafast high
volt rectifier
Any
DO-201AD
ST
1M1
FAGOR
Doc ID 16165 Rev 2
B32561J6104K
000
STTH3L06
FBI3.7M1M 1M1
AN3032
Table 4.
Bill of materials
2 x 58 W bill of materials (continued)
RS
Ref.
Value
Type
Package
Manufacturer
Manuf. code
distrelec
other
code
D8
LL4148, 75 V,
750 mV
Switching diode
SOD-80
Diotec
601496
Distrelec
D9
16 V, 500 mW
Voltage
regulator diode
SOD80C
508-668
RS
D10
1N4007, 1000
V, 1 A
Distrelec
D11
BAT46Z,
100 V/150 mA
D13, D15
DO41
Digi-Key
2802329-ND
Small signal
Schottky diode
SOD323
STMicroelectronics
BAT46JFILM
10 V, 500 mW
Voltage
regulator diode
SOD123
545-3128
RS
D14, D16
5.1 V, 500 mW
Voltage
regulator diode
SOD80C
508-674
RS
F1
3A
377-2180
RS
J1
CON3, 500 V,
32 A
189-5972
RS
Lamp1,la
mp2
T8 lamp1
250 V/ 12 A,
58 W
Wago
739-104
Any
LPFC1
0.5 mH, 1.8 A
MAGNETICA
1986.0002
LPFC2
2 x 47 mH,
250 V, 1.3 A
EPCOS
L1,L2
1.8 mH, 0.7 A
MAGNETICA
1646.0006
STMicroelectronics
STD10NM60N
STMicroelectronics
STP16N65M5
Q2,Q4
STD10NM60N
N-channel 600
V, 0.56 Ω,7 A
MDmes™II
Power MOSFET
Heatsink
for Q3
DPAK
B82734R2
132B030
ELCART
Q3
STP16N65M5
+ heatsink
R15
750 kΩ, 5%, 1/8
W
SMD 0805
Any
R5,R9
1 MΩ, 5%,
1/4 W
SMD 1206
Any
R6,R11
1.5 MΩ, 5%, 1/4
W
SMD 1206
Any
R7,R12
910 kΩ, 5%, 1/4
W
SMD 1206
Any
R10
6.8 kΩ, 5%,
1/4 W
SMD 1206
Any
TO-220
Doc ID 16165 Rev 2
23/26
Bill of materials
Table 4.
AN3032
2 x 58 W bill of materials (continued)
RS
Type
Package
Manufacturer
Manuf. code
distrelec
other
code
Ref.
Value
R13
51 kΩ, 5%, 1/8
W
SMD 0805
Any
R14
33 kΩ, 5%, 1/8
W
SMD 0805
Any
R16
75 kΩ, 5%, 1/8
W
SMD 0805
Any
R17
13 kΩ, 5%,
1/4 W
SMD 1206
Any
R18
18 kΩ, 5%,
1/4 W
SMD 1206
Any
R19
13 kΩ, 5%,
1/4 W
SMD 1206
Any
R20, R23
10 Ω, 5%,
1/8 W
SMD 0805
Any
SMD 0805
Any
R21
130 Ω,
R22
0.100 Ω, 1%, 1
W
TH radial
Any
R29
10 Ω, 5%,
1/4 W
SMD 1206
Any
R31
0.33 Ω, 1%,
1W
TH radial
Any
R53
0, 5%, 1/8 W
SMD 0805
Any
R32, R33,
R52
0, 5%, 1/4 W
SMD 1206
Any
R34
82 kΩ, 5%,
1/4 W
TH radial
Any
R36, R37
82 kΩ, 5%,
1/4 W
TH radial
Any
R54, R56
1.8 MΩ, 5%, 1/8
W
SMD 0805
Any
R55, R57
1.5 MΩ, 5%, 1/8
W
SMD 0805
Any
U1
L6585DE
24/26
5%
Combo IC for
PFC and ballast
control
ST
STMicroelectronics
Doc ID 16165 Rev 2
L6585DE
AN3032
8
Revision history
Revision history
Table 5.
Document revision history
Date
Revision
Changes
16-Apr-2010
1
Initial release.
14-Jun-2010
2
Modified: Equation 6
Doc ID 16165 Rev 2
25/26
AN3032
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2010 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
26/26
Doc ID 16165 Rev 2
Similar pages