IR3M92N4

IR3M92N4
IR3M92N4
AC-DC conversion type IC
for LED Lighting
■Description
■Agency approvals/Compliance
IR3M92N4 is a AC/DC power supply IC for LED
lighting which built-in power factor improvement circuit,
quasi-resonant operation circuit and PWM dimming
circuit.
Primary-side control by transformer realizes the constant
current operation suitable for LED lighting.
1. Compliant with RoHS directive (2002/95/EC)
■Applications
1. Light bulb
2. Ceiling light
3. Tube light
■Features
1. Input voltage range :
10V to 18V
*VCC=23V(Max.) at start up.
2. Output current (LED current) :
Constant current control
3. Feature Function :
Power factor improvement, quasi-resonant operation,
PWM dimming operation and Standby operation
4. Error detection / Protection :
VCC under voltage lock-out
Output over voltage lock-out
Over temperature protection
Over current protection
5. P-type silicon monolithic IC
6. Radiation-proof design :
This product is not radiation-proof design.
7. Lead finish : Lead Free
8. 8 pin SOP plastic package
Notice
The content of data sheet is subject to change without prior notice.
In the absence of confirmation by device specification sheets, SHARP takes no responsibility for any defects that may occur in equipment using any SHARP
devices shown in catalogs, data books, etc. Contact SHARP in order to obtain the latest device specification sheets before using any SHARP device.
Sheet No.: OP13025EN
1
IR3M92N4
■Pin assignment
OUT
1
8
VCC
GND
2
7
FUNC
ISE
3
6
FL2
VSE
4
5
FL1
Pin name
Equivalent circuit
Pin description
VCC
Gate drive for the external switching
MOSFET
OUT
①OUT
317kΩ
GND
②GND
Ground terminal
VDD1
1kΩ
③ISE
1kΩ
ISE
Current sense of the primary winding
500Ω
GND
VDD1
1kΩ
④VSE
VSE
Voltage sense of the auxiliary winding
500Ω
GND
VDD1
100kΩ
⑤FL1
The input terminal of error amplifier.
Please connect capacitor CFL1 to this
terminal.
10kΩ
FL1
1kΩ
500Ω
GND
VDD1
⑥FL2
2.5kΩ
The output terminal of error amplifier.
Please connect capacitor CFL2 to this
terminal.
500Ω
FL2
1kΩ
VDD1
Mode setting terminal
・Flyback mode : Open
・Step-down mode : 200kohm
・PWM dimming input : pulse input
・Standby input terminal : GND
FUNC
⑦FUNC
500Ω
GND
⑧VCC
Power Supply
Sheet No.: OP13025EN
2
IR3M92N4
■Block diagram and basic connection diagram
ＡＣ
BD
～
L1
D3
Rstart
C2
R13
C4
Lp
Cvcc
Ls
R20
Cout
LED
D4
VCC
VCC
VDD1
5V Reg
VDD2
DRV
3V Reg
+
OHP
+
-
Failsafe
Logic
AMP
Rcs
1.6V
OVP_VSE
Peak Hold
2R
VCC
3kΩ
5V
+
FET
ISE
+
-
LEB
OUT
R3
D2
R
Rovp1
Delay
1kΩ
Q
200ns
S
R
LEB
VSE
+
L1
Rovp2
0.3V
PWM logic
EAMP
+
Mode
Selection
Multiplier
0.9V
LEB
OVP_VSE
600ns
FUNC
PWM sig
FL2
GND
+
2.1V
FL1
Logic signal
CFL2
CFL1
Analog signal
When not using it,
Flyback: Open
Step-down: 200kohm
Sheet No.: OP13025EN
3
IR3M92N4
■Functional description
1. Constant current function
1-1. Concept of constant current operation (Flyback mode)
By monitoring VSE and ISE signals and controlling them, LED current (output current) can be controlled
to be a constant level. Figure 1.2 shows FET Drain voltage, primary current and secondary current
waveform during FET on and off. VSE signal is resistance-divided voltage of auxiliary winding output.
Drain voltage waveform of FET and VSE waveform are same polarity and similar. As LED current (output
current) is the average of secondary current, it is shown by equation (1).
1
2
Tres
Tc
Iout = ― ･ Ipk2 ･
where
Ipk2
Tres
Tc
(1)
: secondary peak current
: period during secondary current flows
: switching cycle
It is also shown by equation (2).
1 ･
Iout = ―
2
where
Np
Tres
･ Ipk1 ･
Ns
Tc
(2)
Np : primary winding turns
Ns : secondary winding turns
Ipk1 : primary peak current
As Np/Ns value is constant in equation(2), LED current (output current) can be controlled to be a
constant value by keeping Ipk1･Tres/Tc constant. Ipk1 can be monitored by ISE terminal andTres can be
monitored by VSE terminal.
Auxiliary winding
②Primary
current
③Secondary
current
①FET drain
OUT
④VSE
ISE
Figure1.1
6.1 Circuit
Circuit diagram
Figure
diagram
FET off
FET on
FET off
FET on
FET off
①FET drain
④VSE（Similar figure）
Ipk1
②Primary current
③Secondary current
Ipk2
Ipk1
Tres
Tres
Ipk2
Tc
Ipk1
Ipk2
Tres
Tc
Figure1.2
6.2 Waveform
of each
point point
of Figure
diagram
Figure
Waveform
of each
of 6.1
Figure
1.1 diagram
Sheet No.: OP13025EN
4
IR3M92N4
1-2. Constant current operation (Flyback mode)
IC operation, how to control LED current (output current) to be a constant value, is explained as below.
Figure 1.3 shows block diagram relating constant current operation. As V ISE is proportional
to primary current and sensing resistance Rs, ISE terminal can monitor primary current.
VPHOLD is the output of peak hold circuit. It outputs the peak value of
VISE every switching cycle, shown by equation (3).
VPHOLD = Ipk1 ･ Rs
(3)
Multiplier divides Ipk1･Rs by Tres/Tc ratio.
VFL1 = Ipk1 ･ Rs ･
Tc
Tres
(4)
Time constant of FL1 terminal should be set to much larger than switching period, where time constant
of FL1 is decided by the resistance between the output of peak hold circuit and FL1 terminal
(typ: 110 k ohm) and capacitor CFL1 connected to FL1 terminal. VFL1 shown by equation (4) is input of error
amplifier, and is controlled to be equal to reference voltage Vref (0.9). FET on period is decided by the
output of error amplifier.
In case of VFL1< Vref , FET on period increases by VFL2 increase, which leads Ipk1 increase and V FL1
becomes to near Vref value. In case of VFL1>Vref , FET on period decreases by VFL2 decrease, which
leads Ipk1 decrease and VFL1 becomes to near Vref value. After all, VFL1 is controlled to be same value as
Vref, and LED current (output current) is shown by equation (5), which is derived from equation (1), (2),
(3), and (4).
Iout =
1
2
･
Np
Vref
･
Ns
Rs
(5)
Equation (5) shows that LED current (output current) is decided by circuit constant value Np, Ns,
and Rs.
Primary circuit
Secondary circuit
OUT
Peak hold circuit
3 time amplifier
VPHOLD = 3・Ipk1・Rs
VFL2
ISE
Rs
VFL1=3・Ipk1・Rs・Tres/Tc
－
＋
Vref = 0.9V
FL1
Multiplier circuit
CFL1
Figure 1.3
6.3 Block
Block diagram
diagram relating
relating constant
constant current
current operation
operation
Figure
Sheet No.: OP13025EN
5
IR3M92N4
2-1. Concept of constant current operation (Step-down mode)
Figure 1.4 shows FET Drain voltage, primary current and secondary current waveform during FET
on and off. VSE signal is resistance-divided voltage of auxiliary winding output.
Drain voltage waveform of FET and VSE waveform are same polarity and similar. As LED current (output
current) is the average of secondary current, it is shown by equation (6).
1 ･ Ipk1
Iout = ―
(6)
2
where
Ipk1
: primary peak current
LED current (output current) can be controlled to be a constant value by keeping
Ipk1 constant. Ipk1 can be monitored by ISE terminal andTres can be monitored by VSE terminal.
①MOSFET
drain
Lp
OUT
②Primary current
③VSE
ISE
Figure 1.4
6.4 Circuit
Circuit diagram
diagram
Figure
FET off
FET on
FET off
FET on
FET off
①MOSFET drain
③VSE (Similar figure)
②primary current
(LED current)
Ipk1
Ipk1
Ipk1
Figure
Figure 6.5
1.5 Waveform
Waveform of
of each
each point
point of
of Figure
Figure 6.4
1.4 diagram
diagram
Sheet No.: OP13025EN
6
IR3M92N4
2-2. Constant current operation (Step-down mode)
IC operation, how to control LED current (output current) to be a constant value, is explained as below.
Figure 1.6 shows block diagram relating constant current operation. As V ISE is proportional
to primary current and sensing resistance Rs, ISE terminal can monitor primary current.
VPHOLD is the output of peak hold circuit. It outputs the peak value of
VISE every switching cycle, shown by equation (7).
VPHOLD = Ipk1 ･ Rs
(7)
In Multiplier, VHOLD is outputted to FL1 terminal through internal 110kohm (TYP.).
VFL1 = Ipk1 ･ Rs
(8)
Time constant of FL1 terminal should be set to much larger than switching period, where time constant
of FL1 is decided by the resistance between the output of peak hold circuit and FL1 terminal
(typ: 110 k ohm) and capacitor CFL1 connected to FL1 terminal. VFL1 shown by equation (8) is input of error
amplifier, and is controlled to be equal to reference voltage Vref (0.9). FET on period is decided by the
output of error amplifier.
In case of VFL1< Vref , FET on period increases by VFL2 increase, which leads Ipk1 increase and V FL1
becomes to near Vref value. In case of VFL1>Vref , FET on period decreases by VFL2 decrease, which
leads Ipk1 decrease and VFL1 becomes to near Vref value. After all, VFL1 is controlled to be same value as
Vref, and LED current (output current) is shown by equation (9), which is derived from
equation (6),(7) and (8).
Iout =
1
2
･
Vref
Rs
(9)
Equation (9) shows that LED current (output current) is decided by circuit constant value Rs.
OUT
Peak hold circuit
3 time amplifier
Primary current
ISE
Rs
VPHOLD = 3・Ipk1・Rs
VFL2
VFL1=3・Ipk1・Rs
－
＋
Vref = 0.９V
FL1
110kΩ
CFL1
Figure
Figure 6.6
1.6 Step-down
Step-down block
block diagram
diagram relation
relation constant
constantcurrent
currentoperation
operation
Sheet No.: OP13025EN
7
IR3M92N4
3. Power factor improvement by FET constant on-time control
Power factor improvement is explained as below. Changing period of FET on-time and flattery period of
error amplifier are controlled to be much longer, compared to AC period (1/50Hz or 1/60Hz). As time
constant of FL2 terminal shown by equation (10) is much larger than AC period, FET on-time can be
considered to constant value during one AC cycle. where time constant of FL2 is decided by the output
resistance of error amplifier 78kohm (TYP.) (@FL1=0.9V±0.3) and capacitor CFL2 connected to
FL2 terminal (ex. 1uF).As Ton is constant value in equation (11), Ipk1 is proportional to Von.
τ = R･C = 78kΩ･1uF=0.078s > 0.01s@AC50Hz
Ipk1 =
where
(10)
Ton
･ Von = α ･ Von
L
L
(11)
: primary winding inductance
Von
AC voltage waveform
Ton
Average input current waveform
Figure 1.7
6.7 Power
Power factor
factor improvement
improvement
Figure
4. EMI improvement by quasi-resonant operation
EMI improvement by quasi-resonant operation is explained below. This IC operates in critical conduction
mode. If it operates in discontinuous mode, after releasing transformer’s energy, ringing occurs by parasitic
inductance and capacitor of the transformer and FET, as shown in Figure 1.8. This ringing generates EMI
noise. The moment when transformer release its energy completely is detected by VSE terminal, and this IC
turns on FET at the bottom point of ringing waveform (quasi-resonant operation) as shown in Figure 1.9.
Therefore this IC can minimizes EMI noise.
FET off
FET on
FET off
MOSFET
drain
Ringing period
Figure1.8
6.8　When
notdriven
drivenon
on transition
transition mode
Figure
When FTFTisisnot
mode
FET off
FET on
FET off
FET on
FET off
MOSFET
drain
Figure 6.9　Quasi-resonant
Figure
1.9 Quasi-resonant operation
operation
Sheet No.: OP13025EN
8
IR3M92N4
5. Mode Judging Circuit
It is necessary to set up a FUNC terminal according to operational mode.
The input circuit of a FUNC terminal is shown in Fig. 1.10.
In the case of the flyback mode, please make a FUNC terminal open.
The example of connection of PWM dimming operation is indicated to Fig. 1.10.
Mode
FUNC terminal
Flyback
4.5V>FUNC>3.2V
Step-down
2.85V>FUNC>1.45V
Standby
0.8V>FUNC（※）
（※）It is necessary to input the voltage beyond 1.3V into the return from standby mode at FUNC terminal.
IC internal
Example of FUNC connection
Flyback : open
Step-down : 200kohm
10uA
Example of connection for
PWM dimming
FUNC
+
-
PWM signal
Mode dudging
S Q
R
3V
+
1V/1.3V
Standby judging
PWM judging
Mode judging period
Figure 6.10
circuit
diagram
Figure
1.10FUNC
FUNCterminal
terminalinput
input
circuit
diagram
A mode judging sequence is shown in Fig. 1.11.
In a-point, Va is starting voltage and it starts it by VCC=18V (TYP.).
MOSFET switching is started after a mode judging (a-point~b-point).
in FUNC terminal, PWM dimming becomes effective after a mode judging.
(a)
(b)
Va
VCC
OUT
Mode judging period
100us(max)
FUNC
PWM dimming becomes effective
after a mode judging
Figure 1.11
6.11 Mode
Mode judging
judging sequence
sequence
Figure
Sheet No.: OP13025EN
9
IR3M92N4
A standby mode sequence is shown in Fig. 1.12.
When judged with standby mode in a mode judging period (a-point~b-point), a switching stop is kept.
operation is stopped at Vb(UVLO voltage 6V (TYP.)), and the operation which will restart
if the starting voltage 18V (TYP.) is reached ,is repeated.
The return from standby mode is carrying out a FUNC terminal more than 1.3V (e-point),
discharges the capacity connected to VCC and becomes normal operation from the following restart timing
(g-point).
(a)
(b)
(c)
(d)
(e)
(f)
(g)
Va
VCC
Vb
OUT
Mode judging period
100us(max)
FUNC
Figure 1.12
6.12 Standby
Standby mode
Figure
modesequence
sequence
Sheet No.: OP13025EN
10
IR3M92N4
6. PWM dimming Function
LED output current can be adjusted according to the PWM signal inputted into a FUNC terminal.
The input condition of the PWM signal of a FUNC terminal becomes as follows, and shows operation
in Fig. 1.13.
FUNC terminal
4.5V>FUNC>1.45V
OUT: switching
0.8V>FUNC
OUT: OFF(※)
(※) In FUNC < 1V , the value of FL1 and FL2 is kept and the switching-on pulse is kept constant.
When a PWM function is used, please use it after are satisfactory or checking enough with the system,
since sound may occur with a transformer, a coil, etc.
AC
H : More than 2.0V
PWM
(@1kHz)
L : Less than 1.0V
OUT
（FET gate)
PWM
OUT
（FET gate)
ISE
（FET current)
Figure 1.13 PWM dimming function
Sheet No.: OP13025EN
11
IR3M92N4
7. Error detection/Protection function
Over temperature protection, VCC under voltage lock-out, output Over voltage lock-out and Over current
protection are built in this IC.
7-1. Over temperature protection
When junction temperature of this IC is over 150°C, thermal error is detected and following operation
is performed.
･ IC shut down
･ Discharge CFL2 (Capacitor connected to CFL2)
･ Discharge capacitor connected to VCC
・Discharge stops when VCC goes down to UVLO (6V)
7-2. VCC under voltage lock-out
IC operation stops when VCC voltage goes down to 6V(typ.) or less, because of VCC voltage down or
short between VCC and GND. IC operation restarts when VCC voltage goes up to 18V or more (start up
voltage).
7-3. Output over voltage lock-out
When VCC terminal and VSE terminal goes up to VOVP (Over voltage threshold voltage) or more,
over voltage error is detected and following operation is performed.
･ IC shut down
･ Discharge CFL2 (Capacitor connected to CFL2)
･ Discharge capacitor connected to VCC
・ Discharge stops when VCC goes down to UVLO (6V).
Over voltage error is detected by VCC terminal voltage (typ. 22.7V) and VSE terminal voltage (typ. 2.1V).
Over voltage threshold voltage is shown by equation (12).
VOVP_VSE ≧ 2.1V(TYP.) & VOVP_VCC ≧ 22.7V(TYP.)
where
(12)
VOVP_VCC : Over voltage threshold voltage for VCC
VOVP_VSE : Over voltage threshold voltage for VSE
Vout
Vovp_vcc=23V
VCC
VSE
Np
Ns
R2
＋
－
R1
Na
ISE
Vovp_vse=2.1V
Figure 1.14
6.14 Circuit
Circuit diagram
diagram
Figure
Sheet No.: OP13025EN
12
IR3M92N4
7-4. FET over current protection
When FET current goes up to VOCP (Over current threshold voltage) or more, over current error is
detected and following operation is performed.
Cycle by cycle over current limit operation (default configuration).
・OUT turns Low and stops switching.
・IC do not shut down.
・OFF period will be more than 70us (typ.).
A waveform is shown in Fig. 1.16.
The voltage of ISE terminal at over-current detection is as follows.
The circuit configuration of over-current detecting is shown in Fig. 1.15.
Mode
over-current detection volgate
Flyback
ISE ≦ 1.6V(TYP.)
ISE ≦ 0.8V(TYP.)
Over Current is detected by ISE terminal voltage(typ 1.6V). Over Current threshold voltage is shown as the
figure below.
Step-down
Np
Ns
MOSFET
ISE
Current limit
OCP
+
-
RS
Vocp=1.6V
Figure 1.15 Circuit diagram relating over current protection
Toff
70us(TYP.)
Toff
70us(TYP.)
OUT
Over current judging
ISE
VSE
Figure 6.16
1.16 Over current judging waveform
Sheet No.: OP13025EN
13
IR3M92N4
8. Start-up sequence
Figure 1.17 shows start-up sequence waveform. This IC starts up at point (a) in Figure 1.17 and Va is start up
voltage, typ. 18V. MOSFET switching is started after a mode judging (a-point~b-point).
Then auxiliary winding starts to supply power to IC. Capacitor CVCC which is connected between VCC
and GND should be adjusted so that Vc, VCC voltage at point (c) ,does not go down below VCC undervoltage
lock-out threshold (6V).
Example) Cvcc: 10uF @Vout35.5V, Iout700mA
(a)
(b)
Va
VCC
OUT
Mode judging period
100us(max)
Figure
Figure6.17
1.17Start-up
Start-upsequence
sequence
9. Precautions
9-1. FL1 and FL2 terminal
The value shown below is recommended for capacitor connected to FL1 and FL2.
・ CFL1 = 0.1uF ~ 1uF
・ CFL2 = 0.2uF ~ 2uF
・ CFL1 ≦ CFL2 * 0.5
9-2. FUNC Terminal
Please connect 200kΩ between FUNC terminal and GND terminal for Step-down mode.
Although the resistance connected permits the accuracy within 5% of variation, and 100 ppm/°C,
it recommends the accuracy within 1% of variation, and 100 ppm/°C.
10. Absolute maximum ratings
Absolute maximum ratings are values or ranges which can cause permanent damage. Please do not exceed this
range even when start up or shut down.
Ta=25°C
Parameter
Symbol
Rating
unit
Applied terminal
Conditions
Power Supply Voltage
Vcc
-0.3 ~ 28.0
V
VCC
Input Terminal Voltage
VI1
-0.3 ~ 6.0
V
FL1, FL2, ISE, VSE, FUNC
Output Terminal Voltage
VO1
-0.3 ~ 28.0
V
OUT
Power Dissipation *
PD
600
mW
Ta =25°C
Thermal Resistance *
θa
166.7
°C/W
Operating Temperature
TOPR
-30 ~ 100
°C
Storage Temperature
TSTG
-40 ~ 150
°C
*Measured on JEDEC-JESD51-7 4-layer board.
Sheet No.: OP13025EN
14
IR3M92N4
11. Electrical characteristics
Unless otherwise specified, condition shall be GND=ISE=VSE=0V,VCC=16V, Ta=25°C
Parameter
Symbol
MIN TYP MAX Unit
Conditions
VCC section
VCC Input Voltage
VCC1
10
16
18
V
VCC Startup Current
ICC1
―
30
80
uA
VCC=Startup voltage – 0.1V
VCC Operating supply current
ICC2
―
1.0
2.0
mA
VCC Turn on threshold
Vst
15.5 18 .0 20.0
V
VCC Turn off threshold
Vuvlo
5.0
6.0
7.5
V
Gate driver section
Output Low Resistance
RL
―
―
15
Ω
OUT-0.1V
Output High Current
IOH
40
―
―
mA OUT<8V
Oscillator section
Frequency
fosc
135
210
300
kHz FL2=2.5V
Error Amplifier Section
Reference Voltage
VREF
2.94
3.00
3.06
V
design assurance
Feedback Voltage
VFB
873
900
927
mV VSE=1V,ISE=0.3V,FL2=2.5V
Transconductance
Gm
―
43
―
uA/V FL1=0.9V
FL2 Operating range
Vfl2
0.5
―
4.0
V
Zero Cross Detect Section
VSE Threshold Voltage
VVSE
0.2
0.3
0.4
V
FL2=2.5V
FUNC section
Threshold Voltage of
VFLY
3.2
―
4.5
V
Flyback mode
Threshold Voltage of
VStepD
1.45
―
2.85
V
StepDown mode
Threshold Voltage of
Vstby
―
―
0.8
V
Standby mode
Threshold High Voltage of
VPWMH
1.45
―
4.5
V
PWM
Threshold Low Voltage of
VPWML
―
―
0.8
V
PWM
FUNC Bias Current
IFUNC
8.7
10.0
12.5
uA
Over Current Protection Section
Threshold Voltage of Flyback
VOCP_FLY
1.45
1.60
1.75
V
FL2=2.5V
Threshold Voltage of StepDown VOCP_StepD 0.65
0.80
0.95
V
FL2=2.5V
Minimum Off Time in OCP
tmin
40
70
120
us
Leading edge blanking time
tleb1
―
200
―
ns
Over Voltage Protection Section
Threshold Voltage of VSE
VOVP_VSE
1.9
2.1
2.3
V
Threshold Voltage of VCC
VOVP_VCC
21.0
22.7
24.5
V
Leading edge blanking time
tleb2
―
600
―
ns
Over Temperature Protection Section
Junction temperature, design
Threshold Temperature
TSD
135
150
165
°C
assurance
Sheet No.: OP13025EN
15
IR3M92N4
12. Test Circuit
13. Application circuit example
C1
0.047uF 250Vac
Vbulk
L
L1
4.7mH
F1
1A
AC Input
BD
D1UBA80
N
SA1
S05K300 (5mmΦ)
C3
0.047uF 250Vac
T1
TEE10
C4
R13
4.7nF 100k
+
D3
ES2J
(Pri)
C2
0.047uF
35.5V 180mA
(Sec)
Cout
150uF 50V
R20
D4
CMF03
100k (3216)
C7
0.47nF
Q1
STD3NK60Z 600V 3.3ohm
Rstart (R1)
220k (3216)
Rcs (R11)
Rstart (R2)
220k (3216)
3.6
R3
22 (1608)
Rcs (R12)
3.0
AUX
VCC
Cvcc
10uF 50V
D2
R8(Rovp1)
30k
1SS355 (90V)
(Aux)
R9(Rovp2)
3k
VCC
FUNC
(N.C)
8
1
7
3
FL2
FL2
C11
1.0uF
6
4
5
OUT
OUT
ISE
ISE
VSE
VSE
2
FL1
GND
FL1
・Input Voltage：AC85V ~ AC265V
・Output：35.5V/180mA/6.4W
・Efficiency：86%(typ)
・Power Factor: > 0.9
・Iout ±1.5%
GND
C9
0.33uF
Sheet No.: OP13025EN
16
IR3M92N4
■Package and packing specification
[Applicability]
This specification applies to an IC package of the LEAD-FREE delivered as a standard specification.
1. Storage Conditions
Storage conditions required after opening the packing.
(1) Storage conditions for soldering. (Convection reflow*1, IR/Convection reflow.*1)
・Temperature : 5 ~ 30°C
・Humidity : 70% max.
・Period : In order to prevent oxidation of leads, please implement as soon as possible.
*1
: Air or nitrogen environment.
2. Package outline specification
2-1. Package outline
Refer to the attached drawing.
2-2. LEAD FINISH
LEAD FREE TYPE (Sn-2%Bi)
2-3. Package weight
0.08g/pcs. About
3. Surface mount conditions
The following soldering conditions are recommended to ensure device quality.
3-1. Soldering
(1) Convection reflow or IR/Convection reflow. (one-time soldering or two-time soldering in air or
nitrogen environment)
・Temperature and period :
A) Peak temperature
260°C max.
B) Heating temperature
40 seconds as 230°C
C) Preheat temperature
It is 150 to 180°C, and is 120 seconds Max.
D) Temperature increase rate
It is 1 to 3°C/seconds
・Measuring point : IC package surface
・Temperature profile:
A
IC package surface
temperature
B
C
D
Time
・Reflow times : 2 times max
Sheet No.: OP13025EN
17
IR3M92N4
4. Package outline
IR3M92
YMA
5. Markings
Marking details (The information on the package should be given as follows.)
(1) Product name ： IR3M92
(2) Date code
： (Example) YMA
Y
→
Denotes the production year. (Year code)
2012：B 2013：C 2014：D 2015：E
2016：F 2017：G 2018：H 2019：K
M
→
Denotes the production month. (1・2・~・8・9・O・N・D)
A
→
Denotes the production ref code.
パッケージ
PKG
SOP008-P-0150
単位
UNIT
mm
NOTE
Sheet No.: OP13025EN
18
IR3M92N4
6. Packing specifications (Embossed carrier tape specifications)
The embossed carrier tape specifications supplied from SHARP are generally based on those described in
JIS C 0806 (Japanese Industrial Standard)
6-1. Tape structure
The embossed carrier tape is made of conductive plastic. The embossed portions of the carrier
tape are filled with IC packages and a top covering tape is used to enclose them.
6-2. Taping reel and embossed carrier tape size
For the taping reel and embossed carrier tape sizes, refer to the attached drawing.
6-3. IC package enclosure direction in embossed carrier tape
The IC package enclosure direction in the embossed portion relative to the direction in which
the tape is pulled is indicated by an index mark on the package (indicating the No. 1 pin)
shown in the attached drawing.
6-4. Missing IC packages in embossed carrier tape
The number of missing IC packages in the embossed carrier tape per reel should be less 0.1 %
of the total contained on the tape per reel, or There should never be consecutive missing IC packages.
6-5. Tape joints
There is no joint in an embossed carrier tape.
6-6. Peeling strength of the top covering tape
Peeling strength must meet the following conditions.
(1) Peeling angle at 165 ~ 180°
(2) Peeling strength at 0.1 ~ 1.0N.
6-7. Packing
(1) The top covering tape (leader side) at the leading edge of the embossed carrier tape,
should be held in place with adhesive tape.
(2) The leading and trailing edges of the embossed carrier tape should be left empty in
the attached drawing.
(3) The number of IC packages enclosed in the embossed carrier tape per reel should generally
comply with the list given below.
Number of IC Packages / Reel
Number of IC Packages / Outer carton
1000 devices / Reel
1000 devices / Outer carton
Sheet No.: OP13025EN
19
IR3M92N4
6-8. Indications
The following should be indicated on the taping reel and the packing carton.
・Part Number (Product Name)
・Storage Quantity
・Manufacture’s Name (SHARP)
6-9. Protection during transportation
The IC packages should have no deformation and deterioration of their electrical
characteristics resulting from transportation.
7. Precautions for use
(1) Opening must be done on an anti-ESD treated workbench.
All workers must also have undergone anti-ESD treatment.
(2) The devices should be mounted within one year of the date of delivery.
8. Chemical substance information in the product
Product Information Notification based on Chinese law, Management Methods for Controlling
Pollution by Electronic Information Products.
Names and Contents of the Toxic and Hazardous Substances or Elements in the Product
Lead
(Pb)
Mercury
(Hg)
Cadmium
(Cd)
Hexavalent Chromium
(Cr(VI))
Polybrominated
Biphenyls
(PBB)
Polybrominated
Diphenyl Ethers
(PBDE)
○
○
○
○
○
○
○：indicates that the content of the toxic and hazardous substance in all the homogeneous materials
of the part is below the concentration limit requirement as described in SJ/T 11363-2006.
×：indicates that the content of the toxic and hazardous substance in at least one homogeneous material
of the part exceeds the concentration limit requirement as described in SJ/T 11363-2006 standard.
Sheet No.: OP13025EN
20
IR3M92N4
IC TAPING DIRECTION
THE DRAWING DIRECTIN OF TAPE
●Marking：First terminal position
LEADER SIDE AND END SIDE OF TAPE
Empty pocket domain
(25 pockets)
Filled emboss
(with IC package)
Adhesive tape
END SIDE
Empty pocket domain
(25 pockets)
名称
NAME
Reel for embossed carrier tape
単位
UNIT
mm
Top cover tape
NOTE
Sheet No.: OP13025EN
21
IR3M92N4
φ13±0.2
φ21±0.2
60～61
2±0.5
15.4±1.0
177～180
名称
NAME
Reel & Carrier tape drawing
13.0±0.3
単位
UNIT
mm
NOTE
Sheet No.: OP13025EN
22
IR3M92N4
Packing
Label
Pass sign
Outer carton
Pass sign
(Example)
合 格
2002. 8.25
Ａ Ｒ
Label
(a)
28F
320
(b)
BJE
28F
-PT
320
L90
BJE
(c)
-PT
28F
L90
320
BJE
-PT
(d)
L90
28F
320
BJE
-PT
L90
IR3M92N4
(3N) 1 IR3M92N4 XXXX
28F320BJE-PTL90
(3N) 2 XXXXXXXXXXXX 103120
IR3M92N4
SHARP CORPORATION MADE IN JAPAN EIAJ C-3
(a) Product name
(c) Serial No・Company code
(b) Product name・Quantity
(d) Part No. (SHARP)
"R.C." is Sharp's corporate logo indicating that the product is RoHS compliant.
名称
NAME
DRAWING NO.
NOTE
Packing specifications
単位
UNIT
mm
Sheet No.: OP13025EN
23
IR3M92N4
■Important Notices
· The circuit application examples in this publication are provided
to explain representative applications of SHARP devices and are
not intended to guarantee any circuit design or license any
intellectual property rights. SHARP takes no responsibility for
any problems related to any intellectual property right of a third
party resulting from the use of SHARP's devices.
with equipment that requires higher reliability such as:
--- Transportation control and safety equipment (i.e.,
aircraft, trains, automobiles, etc.)
--- Traffic signals
--- Gas leakage sensor breakers
--- Alarm equipment
--- Various safety devices, etc.
(iii) SHARP devices shall not be used for or in connection with
equipment that requires an extremely high level of reliability and
safety such as:
--- Space applications
--- Telecommunication equipment [trunk lines]
--- Nuclear power control equipment
--- Medical and other life support equipment (e.g.,
scuba).
· Contact SHARP in order to obtain the latest device specification
sheets before using any SHARP device. SHARP reserves the
right to make changes in the specifications, characteristics, data,
materials, structure, and other contents described herein at any
time without notice in order to improve design or reliability.
Manufacturing locations are also subject to change without
notice.
· Observe the following points when using any devices in this
publication. SHARP takes no responsibility for damage caused
by improper use of the devices which does not meet the
conditions and absolute maximum ratings to be used specified in
the relevant specification sheet nor meet the following
conditions:
(i) The devices in this publication are designed for use in general
electronic equipment designs such as:
--- Personal computers
--- Office automation equipment
--- Telecommunication equipment [terminal]
--- Test and measurement equipment
--- Industrial control
--- Audio visual equipment
--- Consumer electronics
(ii) Measures such as fail-safe function and redundant design
should be taken to ensure reliability and safety when SHARP
devices are used for or in connection
· If the SHARP devices listed in this publication fall within the
scope of strategic products described in the Foreign Exchange
and Foreign Trade Law of Japan, it is necessary to obtain
approval to export such SHARP devices.
· This publication is the proprietary product of SHARP and is
copyrighted, with all rights reserved. Under the copyright laws,
no part of this publication may be reproduced or transmitted in
any form or by any means, electronic or mechanical, for any
purpose, in whole or in part, without the express written
permission of SHARP. Express written permission is also
required before any use of this publication may be made by a
third party.
· Contact and consult with a SHARP representative if there are
any questions about the contents of this publication.
Sheet No.: OP13025EN
24