a Ultra Low-Power ARM Cortex-M3 MCU with Integrated Power Management Silicon Anomaly List ADuCM3027/9 ABOUT ADuCM3027/9 SILICON ANOMALIES These anomalies represent the currently known differences between revisions of the ADuCM3027/9 product(s) and the functionality specified in the ADuCM3027/9 data sheet(s) and the Hardware Reference book(s). SILICON REVISIONS A silicon revision number with the form "-x.x" is branded on all parts. The silicon revision can be electronically determined by reading bits <3:0> of the SYS_CHIPID register. Silicon REVISION SYS_CHIPID.REV 1.0 0x2 ANOMALY LIST REVISION HISTORY The following revision history lists the anomaly list revisions and major changes for each anomaly list revision. Date Anomaly List Revision Data Sheet Revision Additions and Changes 02/19/2016 C PrF Removed Anomaly: 21000012 12/04/2015 B PrE Removed all references to ADuCM3023/5 11/26/2014 A PrC Initial Version NR004386C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106 U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com Silicon Anomaly List ADuCM3027/9 SUMMARY OF SILICON ANOMALIES The following table provides a summary of ADuCM3027/9 anomalies and the applicable silicon revision(s) for each anomaly. No. ID Description Rev 1.0 1 21000011 I2C Master Mode Is Not Functional, Under Certain Conditions x 2 21000013 Incorrect ECC for 64-Bit Double-Word Writes Comprised Entirely of Ones x Key: x = anomaly exists in revision . = Not applicable NR004386C | Page 2 of 3 | February 2016 Silicon Anomaly List ADuCM3027/9 DETAILED LIST OF SILICON ANOMALIES The following list details all known silicon anomalies for the ADuCM3027/9 including a description, workaround, and identification of applicable silicon revisions. 1. 21000011 - I2C Master Mode Is Not Functional, Under Certain Conditions: DESCRIPTION: When the I2C clock dividers are configured in Master mode such that the sum of the I2C_DIV.LOW and I2C_DIV.HIGH register bit fields is less than 16, the I2C fails to generate a clock. WORKAROUND: Program the I2C clock dividers such that I2C_DIV.LOW + I2C_DIV.HIGH >= 16. APPLIES TO REVISION(S): 1.0 2. 21000013 - Incorrect ECC for 64-Bit Double-Word Writes Comprised Entirely of Ones: DESCRIPTION: Writing a 64-bit double-word with the value 0xFFFFFFFFFFFFFFFF erroneously sets the ECC payload to 0x00, which causes ECC errors in the application. WORKAROUND: When ECC is disabled, which is the default configuration, the anomaly is not encountered. If ECC is desired, flash loader utilities must avoid the incorrect writing to the ECC payload by skipping all writes which would program the 64-bit address to 0xFFFFFFFFFFFFFFFF. As the reset state of the flash memory has all bits set to logic high, the writes are not required and can safely be skipped during the programming process. The Board Support Package (BSP) for the ADZS-UCM3029EZLITE includes a flash loader utility that implements this workaround, which cares for loading an application to the flash via IAR/SWD. For all other writes to flash memory, this workaround must be explicitly handled as part of the user application. APPLIES TO REVISION(S): 1.0 ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. a NR004386C | Page 3 of 3 | February 2016 www.analog.com