AD7691-DSCC: Military Data Sheet

REVISIONS
LTR
DESCRIPTION
DATE
Prepared in accordance with ASME Y14.24
APPROVED
Vendor item drawing
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PMIC N/A
PREPARED BY
RICK OFFICER
Original date of drawing
YY-MM-DD
CHECKED BY
RAJESH PITHADIA
14-12-16
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DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil/
TITLE
MICROCIRCUIT, DIGITAL-LINEAR, 18 BIT,
250 kSPS DIFFERENTIAL ANALOG TO DIGITAL
CONVERTER, MONOLITHIC SILICON
APPROVED BY
CHARLES F. SAFFLE
SIZE
AMSC N/A
3
CODE IDENT. NO.
DWG NO.
V62/14632
16236
PAGE
1
OF
17
5962-V012-15
1. SCOPE
1.1 Scope. This drawing documents the general requirements of a high performance 18 bit, 250 kilo samples per second (kSPS)
differential analog to digital converter microcircuit, with an operating temperature range of -55C to +105C.
1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item
drawing establishes an administrative control number for identifying the item on the engineering documentation:
V62/14632
-
Drawing
number
01
X
E
Device type
(See 1.2.1)
Case outline
(See 1.2.2)
Lead finish
(See 1.2.3)
1.2.1 Device type(s).
Device type
Generic
01
Circuit function
AD7691-EP
18 bit, 250 kSPS differential analog to
digital converter
1.2.2 Case outline(s). The case outline(s) are as specified herein.
Outline letter
Number of pins
X
10
JEDEC PUB 95
Package style
MO-187-BA
Plastic small outline package
1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer:
Finish designator
A
B
C
D
E
Z
DLA LAND AND MARITIME
COLUMBUS, OHIO
Material
Hot solder dip
Tin-lead plate
Gold plate
Palladium
Gold flash palladium
Other
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/14632
PAGE
2
1.3 Absolute maximum ratings.
1/
Analog inputs (+INPUT, -INPUT) ............................................................................................. GND – 0.3 V to VDD + 0.3 V
or 130 mA
Reference (REF) input voltage (VREF) ..................................................................................... GND – 0.3 V to VDD + 0.3 V
Supply voltages:
Power supply (VDD), input/output interface digital power (VIO) to ground (GND) ................ -0.3 V to +7 V
VDD to VIO ........................................................................................................................... 7 V
Digital inputs to GND ................................................................................................................ -0.3 V to VIO + 0.3 V
Digital outputs to GND ............................................................................................................. -0.3 V to VIO + 0.3 V
Storage temperature range (TSTG) .......................................................................................... -65C to +150C
Junction temperature range (TJ) .............................................................................................. +150C
Lead temperature range ........................................................................................................... See JEDEC J-STD-20
Thermal resistance, junction to ambient (JC) .......................................................................... 44C/W
Thermal resistance, junction to ambient (JA) .......................................................................... 200C/W
1.4 Recommended operating conditions. 2/
Operating free-air temperature range (TA) ................................................................................ -55C to +105C
1/
2/
Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated under
“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer
and/or distributor maintain no responsibility or liability for product used beyond the stated limits.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
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PAGE
3
2. APPLICABLE DOCUMENTS
JEDEC Solid State Technology Association
JEDEC J STD-020
JEDEC PUB 95
-
Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices
Registered and Standard Outlines for Semiconductor Devices
(Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association,
3103 North 10th Street, Suite 240–S, Arlington, VA 22201-2107).
3. REQUIREMENTS
3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as
follows:
A.
B.
C.
Manufacturer’s name, CAGE code, or logo
Pin 1 identifier
ESDS identification (optional)
3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable)
above.
3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are
as specified in 1.3, 1.4, and table I herein.
3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein.
3.5 Diagrams.
3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1.
3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2.
3.5.3 Load circuit for digital interface timing. The load circuit for digital interface timing shall be as shown in figure 3.
3.5.4 Voltage levels for timing waveforms. The voltage levels for timing waveforms shall be as shown in figure 4.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
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CODE IDENT NO.
16236
REV
DWG NO.
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PAGE
4
TABLE I. Electrical performance characteristics. 1/
Test
Symbol
Conditions 2/
Temperature,
TA
Device
type
Limits
Min
Resolution
Unit
Max
-55C to +105C
01
18
Bits
+INPUT – (-INPUT)
-55C to +105C
01
-VREF
+VREF
V
Absolute input voltage
range
+INPUT, -INPUT
-55C to +105C
01
-0.1
VREF
+ 0.1
V
Common mode input
range
+INPUT, -INPUT
-55C to +105C
01
VREF/2
– 0.1
VREF/2
+ 0.1
V
Analog input
Voltage range
VIN
VREF/2 typical
Analog input common
mode rejection ratio
CMRR
Leakage current
fIN = 250 kHz
-55C to +105C
01
65 typical
dB
+25C
01
1 typical
nA
-55C to +105C
01
Acquisition phase
Throughput
Conversion rate
VDD = 4.5 V to 5.25 V
VDD = 2.3 V to 4.5 V
Transient response
Full scale step
0
250
0
180
-55C to +105C
01
No missing codes
-55C to +105C
01
18
Integral linearity error
-55C to +105C
01
-2.7
kSPS
s
1.8
Accuracy
Bits
+2
0.75 typical
-1.5
-40C to +85C
LSB
3/
+1.5
0.75 typical
Differential linearity
error
-55C to +105C
01
-1
+1.25
0.5 typical
LSB
3/
See footnotes at end of table.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
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CODE IDENT NO.
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REV
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PAGE
5
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions 2/
Temperature,
TA
Device
type
Limits
Min
Unit
Max
Accuracy – continued.
Transition noise
REF = VDD = 5 V
-55C to +105C
01
Gain error 4/
VDD = 4.5 V to 5.25 V
-55C to +105C
01
0.75 typical
-40
+40
LSB
3/
LSB
3/
2 typical
-80
VDD = 2.3 V to 4.5 V
+80
2 typical
Gain error temperature
drift
Zero error 4/
VDD = 4.5 V to 5.25 V
-55C to +105C
01
-55C to +105C
01
0.3 typical
-0.8
ppm/
C
+0.8
mV
0.1 typical
-3.5
VDD = 2.3 V to 4.5 V
+3.5
0.7 typical
-55C to +105C
01
0.3 typical
ppm/
C
VDD = 5 V 5%
-55C to +105C
01
0.25 typical
LSB
3/
VREF = 5 V
-55C to +105C
01
101
Zero error temperature
drift
Power supply
sensitivity
AC Accuracy 5/
Dynamic range
dB
102 typical
Oversampled 6/
dynamic range
fIN = 1 kSPS
-55C to +105C
01
Signal to noise
fIN = 1 kHz, VREF = 5 V
-55C to +105C
01
125 typical
dB
98.5
dB
101 typical
-40C to +85C
100
101.5 typical
See footnotes at end of table.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
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PAGE
6
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions 2/
Temperature,
TA
Device
type
Limits
Min
Unit
Max
AC Accuracy – continued. 5/
Signal to noise
-55C to +105C
fIN = 1 kHz, VREF = 2.5 V
01
94
dB
96 typical
95
-40C to +85C
96.5 typical
Spurious free dynamic
range
fIN = 1 kHz, VREF = 5 V
-55C to +105C
01
-125 typical
dB
-118 typical
dB
Total harmonic
distortion
THD
fIN = 1 kHz, VREF = 5 V
-55C to +105C
01
Signal to noise and
distortion ratio
SINAD
fIN = 1 kHz, VREF = 5 V
-55C to +105C
01
98.5
dB
101 typical
100
-40C to +85C
101.5 typical
94
-55C to +105C
fIN = 1 kHz, VREF = 2.5 V
96 typical
95
-40C to +85C
96.5 typical
Intermodulation 7/
distortion
-55C to +105C
01
115 typical
dB
-55C to +105C
01
-55C to +105C
01
60 typical
A
-55C to +105C
01
2 typical
MHz
-55C to +105C
01
2.5 typical
ns
Reference
Voltage range
Load current
250 kSPS, REF = 5 V
0.5
V
VDD
+ 0.3
Sampling dynamics
-3 dB input bandwidth
Aperture delay
VDD = 5 V
See footnotes at end of table.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
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REV
DWG NO.
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PAGE
7
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions 2/
Temperature,
TA
Device
type
Limits
Unit
Min
Max
Digital inputs
Low level input voltage
VIL
-55C to +105C
01
-0.3
+0.3 x
VIO
V
High level input voltage
VIH
-55C to +105C
01
0.7 x
VIO
VIO +
0.3
V
Low level input current
IIL
-55C to +105C
01
-1
+1
A
High level input current
IIH
-55C to +105C
01
-1
+1
A
0.4
V
Digital outputs
Data format
Serial 18 bit, twos complement
Pipeline delay 8/
Low level output
voltage
VOL
ISINK = +500 A
-55C to +105C
01
High level output
voltage
VOH
ISOURCE = -500 A
-55C to +105C
01
VIO –
0.3
VDD range
Specified performance
-55C to +105C
01
2.3
5.25
V
VIO range
Specified performance
-55C to +105C
01
2.3
VDD +
0.3
V
VIO range
Functional operation
-55C to +105C
01
1.8
VDD +
0.3
V
Standby current
VDD and VIO = 5 V
+25C
01
50
nA
V
Power supplies
9/ 10/
1 typical
Power dissipation
PD
1.4 typical
W
VDD = 2.5 V, 100 kSPS throughput
1.35 typical
mW
VDD = 2.5 V, 180 kSPS throughput
2.4 typical
VDD = 2.5 V, 100 SPS throughput
-55C to +105C
01
5
VDD = 5 V, 100 kSPS throughput
4.24 typical
12.5
VDD = 5 V, 250 kSPS throughput
10.6 typical
See footnotes at end of table.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/14632
PAGE
8
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions 2/
Temperature,
TA
Device
type
Limits
Min
Unit
Max
Power supplies – continued.
Energy per conversion
Timing specifications
-55C to +105C
01
50 typical
-55C to +105C
01
0.5
nJ /
sample
See figures 3 and 4.
CNV rising edge to data available
s
2.2
Conversion time
tCONV
Acquisition time
tACQ
-55C to +105C
01
1.8
s
Time between
conversions
tCYC
-55C to +105C
01
4
s
CNV pulse width
tCNVH
-55C to +105C
01
10
ns
tSCK
-55C to +105C
01
15
ns
-55C to +105C
01
17
ns
( CS mode)
SCK period
( CS mode)
SCK period
(chain mode)
tSCK
VIO above 4.5 V
VIO above 3 V
18
VIO above 2.7 V
19
VIO above 2.3 V
20
SCK low time
tSCKL
-55C to +105C
01
7
ns
SCK high time
tSCKH
-55C to +105C
01
7
ns
SCK falling edge to
data remains valid
tHSDO
-55C to +105C
01
4
ns
SCK falling edge to
data valid delay
tDSDO
-55C to +105C
01
CNV or SDI low to
SDO D17 MSB valid
tEN
( CS mode)
VIO above 4.5 V
14
VIO above 3 V
15
VIO above 2.7 V
16
VIO above 2.3 V
17
-55C to +105C
VIO above 4.5 V
01
ns
15
VIO above 2.7 V
18
VIO above 2.3 V
23
ns
See footnotes at end of table.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
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DWG NO.
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PAGE
9
TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions 2/
Temperature,
TA
Device
type
Limits
Min
Timing specifications – continued.
Unit
Max
See figures 3 and 4.
tDIS
-55C to +105C
01
tSSDICNV
-55C to +105C
01
15
ns
tHSDICNV
-55C to +105C
01
0
ns
SCK valid setup time
from CNV rising edge
(chain mode)
tSSCKCNV
-55C to +105C
01
5
ns
SCK valid hold time
from CNV rising edge
(chain mode)
tHSCKCNV
-55C to +105C
01
10
ns
SDI valid setup time
from SCK falling edge
(chain mode)
tSSDISCK
-55C to +105C
01
3
ns
SDI valid hold time
from SCK falling edge
(chain mode)
tHSDISCK
-55C to +105C
01
4
ns
SDI high to SDO high
(chain mode with
busy indicator)
tDSDOSDI
-55C to +105C
01
Conversion time
tCONV
Acquisition time
CNV or SDI high or last
SCK falling edge to
SDO high impedance
25
ns
( CS mode)
SDI valid setup time
from CNV rising edge
( CS mode)
SDI valid hold time
from CNV rising edge
( CS mode)
VIO above 4.5 V
15
ns
26
VIO above 2.3 V
CNV rising edge to data available
s
-55C to +105C
01
0.5
3.7
tACQ
-55C to +105C
01
1.8
s
Time between
conversions
tCYC
-55C to +105C
01
5.5
s
CNV pulse width
tCNVH
-55C to +105C
01
10
ns
( CS mode)
See footnotes at end of table.
DLA LAND AND MARITIME
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TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions 2/
Temperature,
TA
Device
type
Limits
Min
Timing specifications – continued.
SCK period
Unit
Max
See figures 3 and 4.
tSCK
-55C to +105C
01
25
ns
-55C to +105C
01
29
ns
( CS mode)
SCK period
(chain mode)
tSCK
VIO above 3 V
VIO above 2.7 V
35
VIO above 2.3 V
40
SCK low time
tSCKL
-55C to +105C
01
12
ns
SCK high time
tSCKH
-55C to +105C
01
12
ns
SCK falling edge to
data remains valid
tHSDO
-55C to +105C
01
5
ns
SCK falling edge to
data valid delay
tDSDO
-55C to +105C
01
CNV or SDI low to
SDO D17 MSB valid
tEN
( CS mode)
CNV or SDI high or last
SCK falling edge to
SDO high impedance
VIO above 3 V
24
VIO above 2.7 V
30
VIO above 2.3 V
35
-55C to +105C
VIO above 2.7 V
01
18
ns
ns
22
VIO above 2.3 V
tDIS
-55C to +105C
01
25
ns
tSSDICNV
-55C to +105C
01
30
ns
tHSDICNV
-55C to +105C
01
0
ns
( CS mode)
SDI valid setup time
from CNV rising edge
( CS mode)
SDI valid hold time
from CNV rising edge
( CS mode)
See footnotes at end of table.
DLA LAND AND MARITIME
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SIZE
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CODE IDENT NO.
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TABLE I. Electrical performance characteristics – Continued. 1/
Test
Symbol
Conditions 2/
Temperature,
TA
Device
type
Limits
Min
Timing specifications – continued.
Unit
Max
See figures 3 and 4.
SCK valid setup time
from CNV rising edge
(chain mode)
tSSCKCNV
-55C to +105C
01
5
ns
SCK valid hold time
from CNV rising edge
(chain mode)
tHSCKCNV
-55C to +105C
01
8
ns
SDI valid setup time
from SCK falling edge
(chain mode)
tSSDISCK
-55C to +105C
01
8
ns
SDI valid hold time
from SCK falling edge
(chain mode)
tHSDISCK
-55C to +105C
01
10
ns
SDI high to SDO high
(chain mode with busy
indicator)
tDSDOSDI
-55C to +105C
01
36
ns
1/
Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over
the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters
may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization
and/or design.
2/
Unless otherwise specified, VDD = 2.3 V to 5.25 V, VIO = 2.3 V to VDD, VREF = VDD, and all specifications -55C to 105C.
3/
LSB means least significant bit. With the 5 V input range, one LSB = 38.15 V.
4/
See terminology section of the manufacturer’s data sheet. These specifications include full temperature range variation but,
not the error contribution from the external reference.
5/
Unless otherwise specified, all ac accuracy specifications in dB are referred to a full scale input FSR. Tested with an input signal
at 0.5 dB below full scale.
6/
Dynamic range obtained by oversampling the ADC running at a throughput fS of 250 kSPS, followed by post digital filtering
with an output word rate fO.
7/
fIN1 = 21.4 kHz and fIN2 = 18.8 kHz, with each tone at -7 dB below full scale.
8/
Conversion results are available immediately after completed conversion.
9/
With all digital inputs forced to VIO or GND as required.
10/ During acquisition phase.
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Case X
FIGURE 1. Case outline.
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Case X - continued
Dimensions
Inches
Symbol
Millimeters
Min
Med
Max
Min
Med
Max
A
---
---
0.043
---
---
1.10
A1
0.0019
---
0.0059
0.05
---
0.15
A2
0.029
0.033
0.037
0.75
0.85
0.95
b
0.0059
---
0.012
0.15
---
0.33
c
0.0051
---
0.009
0.13
---
0.23
D
0.114
0.118
0.122
2.90
3.00
3.10
E
0.114
0.118
0.122
2.90
3.00
3.10
E1
0.183
0.192
0.202
4.65
4.90
5.15
e
L
0.019 BSC
0.015
0.021
0.050 BSC
0.027
0.40
0.55
0.70
NOTES:
1. Controlling dimensions are millimeter, inch dimensions are given for reference only.
2. Falls within reference to JEDEC MO-187-BA.
FIGURE 1. Case outline - Continued.
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Device type
01
Case outline
X
Terminal number
Terminal
symbol
Type
Description
1
REF
AI
Reference input voltage. The REF range is from 0.5 V to VDD.
It is referred to the GND pin. Decouple this pin closely with a 10 F
capacitor.
2
VDD
P
Power supply.
3
+INPUT
AI
Differential positive analog input. Referenced to –INPUT.
The input range for +INPUT is between 0 V and VREF, centered
about VREF/2 and must be driven 180 out of phase with –INPUT.
4
-INPUT
AI
Differential negative analog input. Referenced to +INPUT.
The input range for –INPUT is between 0 V and VREF, centered
about VREF/2 and must be driven 180 out of phase with +INPUT.
5
GND
P
Power supply ground.
6
CNV
DI
Convert input. This input has multiple functions. On its leading
edge, it initiates the conversions and selects the interface mode of
the device, either chain mode or CS mode. In CS mode, it enables
the SDO pin when low. In chain mode, the data should be read
when CNV is high.
7
SDO
DO
Serial data output. The conversion result is output on this pin. It is
synchronized to SCK.
8
SCK
DI
Serial data clock input. When the device is selected, the conversion
result is shifted out by this clock.
9
SDI
DI
Serial data input. This input provides multiple features. It selects the
interface mode of the ADC as follows: Chain mode is selected if SDI
is low during the CNV rising edge. In this mode, SDI is used as a
data input to daisy chain the conversion results of two or more ADCs
onto a single SDO line. The digital data level on SDI is output on
SDO with a delay of 18 SCK cycles.
CS mode is selected if SDI is high during the CNV rising edge.
In this mode, either SDI or CNV can enable the serial output signals
when low, and if SDI or CNV is low when the conversion is complete,
the busy indicator feature is enabled.
10
VIO
P
Input/output interface digital power. Nominally at the same supply as
the host interface (1.8 V, 2.5 V, 3 V, or 5 V).
AI = analog input, DI = digital input, DO = digital output, and P = power.
FIGURE 2. Terminal connections.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/14632
PAGE
15
FIGURE 3. Load circuit for digital interface timing.
NOTES:
1. 2 V if VIO above 2.5 V, VIO – 0.5 V if VIO below 2.5 V
2. 0.8 V if VIO above 2.5 V, 0.5 V if VIO below 2.5 V.
FIGURE 4. Voltage levels for timing waveforms.
DLA LAND AND MARITIME
COLUMBUS, OHIO
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/14632
PAGE
16
4. VERIFICATION
4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as
indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices,
classification, packaging, and labeling of moisture sensitive devices, as applicable.
5. PREPARATION FOR DELIVERY
5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial
practices for electrostatic discharge sensitive devices.
6. NOTES
6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum.
6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book.
The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided.
6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee
of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all
current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Vendor item drawing
administrative control
number 1/
Device
manufacturer
CAGE code
Top side
marking
Vendor part number
V62/14632-01XE
24355
C82
AD7691SRMZ-EP-RL7
1/ The vendor item drawing establishes an administrative control number for identifying
the item on the engineering documentation.
CAGE code
24355
DLA LAND AND MARITIME
COLUMBUS, OHIO
Source of supply
Analog Devices
Route 1 Industrial Park
P.O. Box 9106
Norwood, MA 02062
Point of contact: Raheen Business Park
Limerick, Ireland
SIZE
A
CODE IDENT NO.
16236
REV
DWG NO.
V62/14632
PAGE
17
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