10 Gbit/s Lithium Niobate Modulator Driver [601KB]

10 Gbit/s Lithium Niobate
Modulator Driver
Yasunori Ogawa Takayuki Izumi
As 10 Gbit/s long-distance optical communication
systems become more and more pervasive,
requirements rise relating to increased levels of
performance, as well as the miniaturization of key
devices that configure such systems. Lithium niobate
(LN) modulators are used primarily as optical modulators
that change high-speed electrical signals at 10 Gbit/s to
optical signals for long-distance communication systems.
Driver ICs intended for driving such LN modulators are
becoming key devices that impact the performance of a
system as much as LN modulators. High quality output
waveforms with little noise are required of LN modulator
drivers, since signal waveforms output by LN modulator
drivers extensively impact optical waveforms output by
LN modulators, as well as their optical transmission
characteristics. Furthermore, not only are waveform
characteristics vital but miniaturization is also essential
for long-distance transmission systems, since wavelength
division multiplexing is often incorporated in longdistance transmission systems.
At OKI we have thus far developed electro-absorption
(EA) modulator drivers and commercialized them using a
Gallium Arsenide (GaAs) Pseudomorphic High Electron
Mobility Transistor (PHEMT) structure, which offer
superior high speed and waveform characteristics1).
Using the PHEMT structure, we have also been
developing a driver amplifier that operates at 40 Gbit/s2).
LN modulator drivers, however, are required to have not
only such high speed characteristics but also a high
output amplitude of 6Vpp, more than double of EA
drivers, making it difficult to satisfy both operationg speed
and output amplitude, because they are in a trade-off
Our report on the configuration, circuit and device
design is provided, as well as operating characteristics of
the LN modulator driver, as we were able to realize highspeed operations at 11.3 Gbit/s and high output amplitude
characteristics with the 6 Vpp output amplitude through our
development of LN modulator driver by applying our device
structure and circuit design technologies that have been
nurtured over the years during our development efforts.
Configuration of LN modulator driver
For LN modulator driver to realize both high speed
operation and high output votalge of 6 Vpp, transistors used
in the drivers are required to have both high speed and a
high breakdown voltage characteristics. Since the PHEMT
used in our EA modulator drivers do have an excellent
performance as for high speed characteristics but not
enough for breakdown volatage, we adopted two chip
configuration by segregating final stage of amplification and
applied the newly developed PHEMT with high breakdown
voltage to the final stage. The configuration of LN modulator
driver is shown in Fig. 1. This driver is configured by two
chips, a preamplifier and booster amplifier, which are
mounted on a single package. Furthermore, we decided to
build a bias inductor for the booster amplifier in the package
in order to ensure that users will be able to obtain the
waveform characteristics of the LN modulator driver in a
stable manner. A sophisticated and complex high frequency
design was required for bias inductors and since their
performance impacts the waveform characteristics of
drivers the building of it in the package produced a major
valuable addition for the LN modulator driver.
Miniaturization using the built-in bias inductor was achieved
by optimizing the circuit configuration and component parts.
Fig. 1 Configuration of LN modulator driver
Oki Technical Review
October 2007/Issue 211 Vol.74 No.3
Booster amplifier
Special Issue on Devices
control of both the threshold voltage and the breakdown
voltage of device has been realized.
Design of preamplifier
A differential amplifier circuitry was adopted as our
preamplifier, as it can easily realize limiting operations,
cross-point adjustments and output amplitude varying
functions. We optimized the design for amplifier gain to
ensure that the output amplitude of the preamplifier is
performed with limiting operations constantly at all times
for a large dynamic range of input amplitude that spans
from 0.4 to 1.0 Vpp. Furthermore, we incorporated a
cross-point adjustment function for output signals from
VB1/VB2 terminals, as well as an output amplitude
varying function using a VC1 terminal. We adopted the
GaAs PHEMT structure with a gate length of 0.15 µm in
order to miniaturize the size of the chip, which was
achieved by reducing the number of steps of the
amplifier. This cutoff frequency (fT) of the PHEMT has a
superior high frequency characteristic of 103 GHz, which
made it possible to reduce the number of stages of the
amplifier, allowing us to miniaturize the chip to a size of
1.2 mm by 1.2 mm.
Fig.3 shows a comparison of I-V characteristics for a
conventional single recessed PHEMT and a double
recessed PHEMT. As compared the double recessed
PHEMT with the single recessed PHEMT, the double
recessed PHEMT has achieved the very good pinch-off
characteristic, that is a lower drain conductance of 10
mS/mm and a smaller off-state leakage current. The
breakdown voltage of the double recessed PHEMT is
about 15V, which is sufficiently high for the operation of
the booster amplifier. The current gain (h21) versus
frequency for the double recessed PHEMT is shown in
Fig.4. The cut-off frequency (fT) extrapolated from this
result was 72GHz.
Single recessed PHEMT
Double recessed PHEMT
Vgs = 0.6 V
Vgs = 0.6 V
Drain current (A/mm)
Vgs = 0.0 V
gd = 32 mS/mm
Vgs = -0.6 V
Vgs = 0.0 V
gd = 10 mS/mm
Vgs = -0.6 V
Idoff = 0.06 A/mm
Idoff = 0.01A/mm
Drain voltage (V)
Drain voltage (V)
Fig. 3 I-V characteristics of PHEMT
For a high-speed and high output amplitude
characteristic of the LN modulator driver, the transistor
used in the booster amplifier must have a deeper
threshold voltage and lower off-state leakage current,
while maintaining the high frequency performances. In
order to realize such transistor characteristics, the
PHEMT with a double recess structure was applied for
the booster amplifier. Furthermore, the booster amplifier
was designed by using the distributed amplifier
configuration, which realize the wider bandwidth, to
obtain both a high-speed operation at 10Gbit/s and a
high output amplitude of 6Vpp.2)
First of all, the PHEMT with a double recess structure
applied for the booster amplifier is explained. As shown in
the cross-sectional view of Fig.2, the device structure
consists of the source/drain electrodes and a T-shaped
gate electrode with the gate length of 0.15µm. The
double recess structure was formed by selective etching
technique using the double stopper layers, which enables
the precise control of the etching depths for both the
upper and the lower recessed regions. By applying this
double recess technology, it became possible to
arbitrarily design a carrier concentration under the gate
and also beside the gate regions, and then the accurate
Current gain (dB)
Design of booster amplifier
Drain current (A/mm)
Gate electrode
1E + 08
1E + 09
1E + 10
1E + 11
1E + 12
Frequency (Hz)
Source electrode
Fig. 4 High frequency characteristics of double recessed
Drain electrode
gap layer
stopper layer
electron supply layer
channel layer
electron supply layer
Fig. 2 Structure of double recessed PHEMT
Oki Technical Review
October 2007/Issue 211 Vol.74 No.3
Transmission line
Fig. 5 Circuit configuration of booster amplifier
Oki Technical Review
October 2007/Issue 211 Vol.74 No.3
S-parameters (dB)
Descriptions of the circuit method are provided next.
The circuit configuration of a booster amplifier comprised
of distributed amplifier circuitry is shown in Fig. 5. A
cascode amplifier with two FETs vertically stacked was
considered to comprise a single section, with eight of
these arranged parallel to comprise an eight-section
configuration. We carefully optimized the number of
sections and the size of FETs in each section since they
are important parameters to determine the frequency
bandwidth of distributed amplifier. A simulation model for
the FETs aligned with precision to the wide band of DC40 GHz was prepared, since harmonic response must be
considered in order to figure out a 10 Gbit/s waveform
with a high degree of precision in simulation. The
EEHEMT1 model from Agilent Technologies Inc. was
adopted as our FET simulation model.
The characteristic impedance and line lengths were
determined for the transmission lines that connect the
respective sections in order to ensure that the input and
output impedance of the booster amplifier is 50 Ω. With
an ideal transmission line it is possible to keep track of
the characteristics using a logical equivalent circuit
model. In order to attempt miniaturization of the chip,
however, it was necessary to deal with complex and
intricate shapes of the transmission lines inside the IC.
The characteristics of such transmission lines tend to
deviate further from logical values as the frequency is
raised, which means that there is a limit to the extent of
accuracy that can be expected from a design made by
using an equivalent circuit model. Therefore, we sought
to increase the accuracy of the circuit design by
analyzing the characteristics using electromagnetic field
analysis, particularly with regards to the transmission line
patterns of complex shapes.
The S-parameter characteristics for the booster
amplifier we developed, using a distributed amplifier, are
shown in Fig. 6. We have obtained excellent
performances with small signal gain of 18dB and 3dB
bandwidth of 11GHz. S11 and S22 were better than 12dB at up to 20GHz. These results were successfully
agreed with simulation, confirming the targeted
characteristics of the booster amplifier.
Frequency (GHz)
Fig. 6 S-parameter characteristics of booster amplifier
Evaluation of characteristics of LN
modulator driver
The preamplifier and the booster amplifier were
mounted in a 38-pin ceramic package. A bias inductor
circuit for supplying power to the booster amplifier was
also implemented in the package. We were able to
achieve a package size with dimensions of 10.9 mm × 8.0
mm × 2.5 mm, which places it into the smallest category
for LN modulator drivers with a built-in bias inductor. An
external view of the package is shown in Photo 1.
Photo 1 External view of IC
Special Issue on Devices
The characteristics for the packaged driver were
evaluated with the package mounted on the evaluation
board, as shown in Photo 2. The output waveform for
operations at 11.3 Gbit/s is shown in Fig. 7. An extremely
favorable waveform for 6 Vpp output amplitude is
depicted in this figure. The rising time (Tr) and falling time
(Tf) of the waveform are 22.7 ps and 23.6 ps respectively
(20 to 80%). The operating conditions for the
aforementioned figures include differential 0.4 Vpp for
input amplitude of the LN modulator driver (0.2 Vpp each
for IN and INB, respectively), -5.2 V for the power supply
voltage Vs of the preamplifier and 5 V for the power
supply voltage VD of the booster amplifier. Power
consumption was 1.4 W.
Photo 2 Evaluation board of LN modulator driver
We developed the LN modulator driver with a built-in
bias inductor for the purpose of implementing 10 Gbit/s
long-distance optical communication systems. The driver
is comprised of two chips, a preamplifier and a booster
amplifier. Double recessed PHEMT with a high
breakdown voltage and distributed amplifier circuitry
were adopted for the booster amplifier in order to realize
high-speed operations at 11.3 Gbit/s and high output
amplitude characteristics of 6 Vpp. A GaAs PHEMT
structure with a gate length of 0.15 µm, as well as
increased precision for distributed circuit design, were
accomplished in order to miniaturize the chip, resulting in
the successful miniaturization of the package size to 10.9
mm × 8.0 mm × 2.5 mm, which places it in the smallest
package category.
Optical communication systems are expected to
evolve to cater for longer distances and provide higher
speeds. We intend to aggressively undertake activities for
the development of drivers to increase speeds and raise
output amplitudes that can accommodate new optical
communication systems by applying a technology for
higher speeds and higher output amplitudes, obtained
through the development of the LN modulator driver.
1) Tamotsu Kimura: GaAs IC Set for Optical
Transmission Module (from 10 Gb/s to 40 Gb/s), Oki
Technical Review, Issue 190, Vol. 69, No. 2, pp. 6871, April 2002.
2) Makoto Kosugi: Amplifier IC for 40 Gbit/s Optical
Communications, Oki Technical Review, Issue 196,
Vol. 70, No. 4, pp. 84-87, October 2003.
V: 1.2 V/div.; H: 20 ps/div.
Fig. 7 Output waveform of LN modulator driver
The optical output waveform obtained during
evaluation of the LN modulator driver, in combination with
the LN modulator, is shown in Fig. 8. Favorable
characteristics with an extinction ratio of 13.0 dB and
mask margin of 29% were obtained, indicating that the
characteristics of the LN modulator driver are sufficient
for practical implementation.
Yasunori Ogawa: Optical Components Company, Design
& Development Dept., Optical Communication IC Design
Takayuki Izumi: Optical Components Company, Design &
Development Dept., Device Process Team
H: 20 ps/div.
Fig. 8 Optical output waveform for evaluation of LN modulator
driver in combination with LN modulator
Oki Technical Review
October 2007/Issue 211 Vol.74 No.3
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